arch/powerpc/boot/dts/mpc8536ds.dts

   1 /*
   2  * MPC8536 DS Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8536ds";
  16         compatible = "fsl,mpc8536ds";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26                 pci1 = &pci1;
  27                 pci2 = &pci2;
  28                 pci3 = &pci3;
  29         };
  30
  31         cpus {
  32                 #cpus = <1>;
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8536@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         next-level-cache = <&L2>;
  40                 };
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <0 0 0 0>;        // Filled by U-Boot
  46         };
  47
  48         soc@ffe00000 {
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 device_type = "soc";
  52                 compatible = "simple-bus";
  53                 ranges = <0x0 0 0xffe00000 0x100000>;
  54                 bus-frequency = <0>;            // Filled out by uboot.
  55
  56                 ecm-law@0 {
  57                         compatible = "fsl,ecm-law";
  58                         reg = <0x0 0x1000>;
  59                         fsl,num-laws = <12>;
  60                 };
  61
  62                 ecm@1000 {
  63                         compatible = "fsl,mpc8536-ecm", "fsl,ecm";
  64                         reg = <0x1000 0x1000>;
  65                         interrupts = <17 2>;
  66                         interrupt-parent = <&mpic>;
  67                 };
  68
  69                 memory-controller@2000 {
  70                         compatible = "fsl,mpc8536-memory-controller";
  71                         reg = <0x2000 0x1000>;
  72                         interrupt-parent = <&mpic>;
  73                         interrupts = <18 0x2>;
  74                 };
  75
  76                 L2: l2-cache-controller@20000 {
  77                         compatible = "fsl,mpc8536-l2-cache-controller";
  78                         reg = <0x20000 0x1000>;
  79                         interrupt-parent = <&mpic>;
  80                         interrupts = <16 0x2>;
  81                 };
  82
  83                 i2c@3000 {
  84                         #address-cells = <1>;
  85                         #size-cells = <0>;
  86                         cell-index = <0>;
  87                         compatible = "fsl-i2c";
  88                         reg = <0x3000 0x100>;
  89                         interrupts = <43 0x2>;
  90                         interrupt-parent = <&mpic>;
  91                         dfsrr;
  92                 };
  93
  94                 i2c@3100 {
  95                         #address-cells = <1>;
  96                         #size-cells = <0>;
  97                         cell-index = <1>;
  98                         compatible = "fsl-i2c";
  99                         reg = <0x3100 0x100>;
 100                         interrupts = <43 0x2>;
 101                         interrupt-parent = <&mpic>;
 102                         dfsrr;
 103                         rtc@68 {
 104                                 compatible = "dallas,ds3232";
 105                                 reg = <0x68>;
 106                                 interrupts = <0 0x1>;
 107                                 interrupt-parent = <&mpic>;
 108                         };
 109                 };
 110
 111                 spi@7000 {
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         compatible = "fsl,mpc8536-espi";
 115                         reg = <0x7000 0x1000>;
 116                         interrupts = <59 0x2>;
 117                         interrupt-parent = <&mpic>;
 118                         fsl,espi-num-chipselects = <4>;
 119
 120                         flash@0 {
 121                                 #address-cells = <1>;
 122                                 #size-cells = <1>;
 123                                 compatible = "spansion,s25sl12801";
 124                                 reg = <0>;
 125                                 spi-max-frequency = <40000000>;
 126                                 partition@u-boot {
 127                                         label = "u-boot";
 128                                         reg = <0x00000000 0x00100000>;
 129                                         read-only;
 130                                 };
 131                                 partition@kernel {
 132                                         label = "kernel";
 133                                         reg = <0x00100000 0x00500000>;
 134                                         read-only;
 135                                 };
 136                                 partition@dtb {
 137                                         label = "dtb";
 138                                         reg = <0x00600000 0x00100000>;
 139                                         read-only;
 140                                 };
 141                                 partition@fs {
 142                                         label = "file system";
 143                                         reg = <0x00700000 0x00900000>;
 144                                 };
 145                         };
 146                         flash@1 {
 147                                 compatible = "spansion,s25sl12801";
 148                                 reg = <1>;
 149                                 spi-max-frequency = <40000000>;
 150                         };
 151                         flash@2 {
 152                                 compatible = "spansion,s25sl12801";
 153                                 reg = <2>;
 154                                 spi-max-frequency = <40000000>;
 155                         };
 156                         flash@3 {
 157                                 compatible = "spansion,s25sl12801";
 158                                 reg = <3>;
 159                                 spi-max-frequency = <40000000>;
 160                         };
 161                 };
 162
 163                 dma@21300 {
 164                         #address-cells = <1>;
 165                         #size-cells = <1>;
 166                         compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
 167                         reg = <0x21300 4>;
 168                         ranges = <0 0x21100 0x200>;
 169                         cell-index = <0>;
 170                         dma-channel@0 {
 171                                 compatible = "fsl,mpc8536-dma-channel",
 172                                              "fsl,eloplus-dma-channel";
 173                                 reg = <0x0 0x80>;
 174                                 cell-index = <0>;
 175                                 interrupt-parent = <&mpic>;
 176                                 interrupts = <20 2>;
 177                         };
 178                         dma-channel@80 {
 179                                 compatible = "fsl,mpc8536-dma-channel",
 180                                              "fsl,eloplus-dma-channel";
 181                                 reg = <0x80 0x80>;
 182                                 cell-index = <1>;
 183                                 interrupt-parent = <&mpic>;
 184                                 interrupts = <21 2>;
 185                         };
 186                         dma-channel@100 {
 187                                 compatible = "fsl,mpc8536-dma-channel",
 188                                              "fsl,eloplus-dma-channel";
 189                                 reg = <0x100 0x80>;
 190                                 cell-index = <2>;
 191                                 interrupt-parent = <&mpic>;
 192                                 interrupts = <22 2>;
 193                         };
 194                         dma-channel@180 {
 195                                 compatible = "fsl,mpc8536-dma-channel",
 196                                              "fsl,eloplus-dma-channel";
 197                                 reg = <0x180 0x80>;
 198                                 cell-index = <3>;
 199                                 interrupt-parent = <&mpic>;
 200                                 interrupts = <23 2>;
 201                         };
 202                 };
 203
 204                 usb@22000 {
 205                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 206                         reg = <0x22000 0x1000>;
 207                         #address-cells = <1>;
 208                         #size-cells = <0>;
 209                         interrupt-parent = <&mpic>;
 210                         interrupts = <28 0x2>;
 211                         phy_type = "ulpi";
 212                 };
 213
 214                 usb@23000 {
 215                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 216                         reg = <0x23000 0x1000>;
 217                         #address-cells = <1>;
 218                         #size-cells = <0>;
 219                         interrupt-parent = <&mpic>;
 220                         interrupts = <46 0x2>;
 221                         phy_type = "ulpi";
 222                 };
 223
 224                 enet0: ethernet@24000 {
 225                         #address-cells = <1>;
 226                         #size-cells = <1>;
 227                         cell-index = <0>;
 228                         device_type = "network";
 229                         model = "eTSEC";
 230                         compatible = "gianfar";
 231                         reg = <0x24000 0x1000>;
 232                         ranges = <0x0 0x24000 0x1000>;
 233                         local-mac-address = [ 00 00 00 00 00 00 ];
 234                         interrupts = <29 2 30 2 34 2>;
 235                         interrupt-parent = <&mpic>;
 236                         tbi-handle = <&tbi0>;
 237                         phy-handle = <&phy1>;
 238                         phy-connection-type = "rgmii-id";
 239
 240                         mdio@520 {
 241                                 #address-cells = <1>;
 242                                 #size-cells = <0>;
 243                                 compatible = "fsl,gianfar-mdio";
 244                                 reg = <0x520 0x20>;
 245
 246                                 phy0: ethernet-phy@0 {
 247                                         interrupt-parent = <&mpic>;
 248                                         interrupts = <10 0x1>;
 249                                         reg = <0>;
 250                                         device_type = "ethernet-phy";
 251                                 };
 252                                 phy1: ethernet-phy@1 {
 253                                         interrupt-parent = <&mpic>;
 254                                         interrupts = <10 0x1>;
 255                                         reg = <1>;
 256                                         device_type = "ethernet-phy";
 257                                 };
 258                                 tbi0: tbi-phy@11 {
 259                                         reg = <0x11>;
 260                                         device_type = "tbi-phy";
 261                                 };
 262                         };
 263                 };
 264
 265                 enet1: ethernet@26000 {
 266                         #address-cells = <1>;
 267                         #size-cells = <1>;
 268                         cell-index = <1>;
 269                         device_type = "network";
 270                         model = "eTSEC";
 271                         compatible = "gianfar";
 272                         reg = <0x26000 0x1000>;
 273                         ranges = <0x0 0x26000 0x1000>;
 274                         local-mac-address = [ 00 00 00 00 00 00 ];
 275                         interrupts = <31 2 32 2 33 2>;
 276                         interrupt-parent = <&mpic>;
 277                         tbi-handle = <&tbi1>;
 278                         phy-handle = <&phy0>;
 279                         phy-connection-type = "rgmii-id";
 280
 281                         mdio@520 {
 282                                 #address-cells = <1>;
 283                                 #size-cells = <0>;
 284                                 compatible = "fsl,gianfar-tbi";
 285                                 reg = <0x520 0x20>;
 286
 287                                 tbi1: tbi-phy@11 {
 288                                         reg = <0x11>;
 289                                         device_type = "tbi-phy";
 290                                 };
 291                         };
 292                 };
 293
 294                 usb@2b000 {
 295                         compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
 296                         reg = <0x2b000 0x1000>;
 297                         #address-cells = <1>;
 298                         #size-cells = <0>;
 299                         interrupt-parent = <&mpic>;
 300                         interrupts = <60 0x2>;
 301                         dr_mode = "peripheral";
 302                         phy_type = "ulpi";
 303                 };
 304
 305                 sdhci@2e000 {
 306                         compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
 307                         reg = <0x2e000 0x1000>;
 308                         interrupts = <72 0x2>;
 309                         interrupt-parent = <&mpic>;
 310                         clock-frequency = <250000000>;
 311                 };
 312
 313                 serial0: serial@4500 {
 314                         cell-index = <0>;
 315                         device_type = "serial";
 316                         compatible = "ns16550";
 317                         reg = <0x4500 0x100>;
 318                         clock-frequency = <0>;
 319                         interrupts = <42 0x2>;
 320                         interrupt-parent = <&mpic>;
 321                 };
 322
 323                 serial1: serial@4600 {
 324                         cell-index = <1>;
 325                         device_type = "serial";
 326                         compatible = "ns16550";
 327                         reg = <0x4600 0x100>;
 328                         clock-frequency = <0>;
 329                         interrupts = <42 0x2>;
 330                         interrupt-parent = <&mpic>;
 331                 };
 332
 333                 crypto@30000 {
 334                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 335                                      "fsl,sec2.1", "fsl,sec2.0";
 336                         reg = <0x30000 0x10000>;
 337                         interrupts = <45 2 58 2>;
 338                         interrupt-parent = <&mpic>;
 339                         fsl,num-channels = <4>;
 340                         fsl,channel-fifo-len = <24>;
 341                         fsl,exec-units-mask = <0x9fe>;
 342                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 343                 };
 344
 345                 sata@18000 {
 346                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 347                         reg = <0x18000 0x1000>;
 348                         cell-index = <1>;
 349                         interrupts = <74 0x2>;
 350                         interrupt-parent = <&mpic>;
 351                 };
 352
 353                 sata@19000 {
 354                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 355                         reg = <0x19000 0x1000>;
 356                         cell-index = <2>;
 357                         interrupts = <41 0x2>;
 358                         interrupt-parent = <&mpic>;
 359                 };
 360
 361                 global-utilities@e0000 {        //global utilities block
 362                         compatible = "fsl,mpc8548-guts";
 363                         reg = <0xe0000 0x1000>;
 364                         fsl,has-rstcr;
 365                 };
 366
 367                 mpic: pic@40000 {
 368                         clock-frequency = <0>;
 369                         interrupt-controller;
 370                         #address-cells = <0>;
 371                         #interrupt-cells = <2>;
 372                         reg = <0x40000 0x40000>;
 373                         compatible = "chrp,open-pic";
 374                         device_type = "open-pic";
 375                         big-endian;
 376                 };
 377
 378                 msi@41600 {
 379                         compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
 380                         reg = <0x41600 0x80>;
 381                         msi-available-ranges = <0 0x100>;
 382                         interrupts = <
 383                                 0xe0 0
 384                                 0xe1 0
 385                                 0xe2 0
 386                                 0xe3 0
 387                                 0xe4 0
 388                                 0xe5 0
 389                                 0xe6 0
 390                                 0xe7 0>;
 391                         interrupt-parent = <&mpic>;
 392                 };
 393         };
 394
 395         pci0: pci@ffe08000 {
 396                 compatible = "fsl,mpc8540-pci";
 397                 device_type = "pci";
 398                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 399                 interrupt-map = <
 400
 401                         /* IDSEL 0x11 J17 Slot 1 */
 402                         0x8800 0 0 1 &mpic 1 1
 403                         0x8800 0 0 2 &mpic 2 1
 404                         0x8800 0 0 3 &mpic 3 1
 405                         0x8800 0 0 4 &mpic 4 1>;
 406
 407                 interrupt-parent = <&mpic>;
 408                 interrupts = <24 0x2>;
 409                 bus-range = <0 0xff>;
 410                 ranges = <0x02000000 0 0x80000000 0 0x80000000 0 0x10000000
 411                           0x01000000 0 0x00000000 0 0xffc00000 0 0x00010000>;
 412                 clock-frequency = <66666666>;
 413                 #interrupt-cells = <1>;
 414                 #size-cells = <2>;
 415                 #address-cells = <3>;
 416                 reg = <0 0xffe08000 0 0x1000>;
 417         };
 418
 419         pci1: pcie@ffe09000 {
 420                 compatible = "fsl,mpc8548-pcie";
 421                 device_type = "pci";
 422                 #interrupt-cells = <1>;
 423                 #size-cells = <2>;
 424                 #address-cells = <3>;
 425                 reg = <0 0xffe09000 0 0x1000>;
 426                 bus-range = <0 0xff>;
 427                 ranges = <0x02000000 0 0x98000000 0 0x98000000 0 0x08000000
 428                           0x01000000 0 0x00000000 0 0xffc20000 0 0x00010000>;
 429                 clock-frequency = <33333333>;
 430                 interrupt-parent = <&mpic>;
 431                 interrupts = <25 0x2>;
 432                 interrupt-map-mask = <0xf800 0 0 7>;
 433                 interrupt-map = <
 434                         /* IDSEL 0x0 */
 435                         0000 0 0 1 &mpic 4 1
 436                         0000 0 0 2 &mpic 5 1
 437                         0000 0 0 3 &mpic 6 1
 438                         0000 0 0 4 &mpic 7 1
 439                         >;
 440                 pcie@0 {
 441                         reg = <0 0 0 0 0>;
 442                         #size-cells = <2>;
 443                         #address-cells = <3>;
 444                         device_type = "pci";
 445                         ranges = <0x02000000 0 0x98000000
 446                                   0x02000000 0 0x98000000
 447                                   0 0x08000000
 448
 449                                   0x01000000 0 0x00000000
 450                                   0x01000000 0 0x00000000
 451                                   0 0x00010000>;
 452                 };
 453         };
 454
 455         pci2: pcie@ffe0a000 {
 456                 compatible = "fsl,mpc8548-pcie";
 457                 device_type = "pci";
 458                 #interrupt-cells = <1>;
 459                 #size-cells = <2>;
 460                 #address-cells = <3>;
 461                 reg = <0 0xffe0a000 0 0x1000>;
 462                 bus-range = <0 0xff>;
 463                 ranges = <0x02000000 0 0x90000000 0 0x90000000 0 0x08000000
 464                           0x01000000 0 0x00000000 0 0xffc10000 0 0x00010000>;
 465                 clock-frequency = <33333333>;
 466                 interrupt-parent = <&mpic>;
 467                 interrupts = <26 0x2>;
 468                 interrupt-map-mask = <0xf800 0 0 7>;
 469                 interrupt-map = <
 470                         /* IDSEL 0x0 */
 471                         0000 0 0 1 &mpic 0 1
 472                         0000 0 0 2 &mpic 1 1
 473                         0000 0 0 3 &mpic 2 1
 474                         0000 0 0 4 &mpic 3 1
 475                         >;
 476                 pcie@0 {
 477                         reg = <0 0 0 0 0>;
 478                         #size-cells = <2>;
 479                         #address-cells = <3>;
 480                         device_type = "pci";
 481                         ranges = <0x02000000 0 0x90000000
 482                                   0x02000000 0 0x90000000
 483                                   0 0x08000000
 484
 485                                   0x01000000 0 0x00000000
 486                                   0x01000000 0 0x00000000
 487                                   0 0x00010000>;
 488                 };
 489         };
 490
 491         pci3: pcie@ffe0b000 {
 492                 compatible = "fsl,mpc8548-pcie";
 493                 device_type = "pci";
 494                 #interrupt-cells = <1>;
 495                 #size-cells = <2>;
 496                 #address-cells = <3>;
 497                 reg = <0 0xffe0b000 0 0x1000>;
 498                 bus-range = <0 0xff>;
 499                 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
 500                           0x01000000 0 0x00000000 0 0xffc30000 0 0x00010000>;
 501                 clock-frequency = <33333333>;
 502                 interrupt-parent = <&mpic>;
 503                 interrupts = <27 0x2>;
 504                 interrupt-map-mask = <0xf800 0 0 7>;
 505                 interrupt-map = <
 506                         /* IDSEL 0x0 */
 507                         0000 0 0 1 &mpic 8 1
 508                         0000 0 0 2 &mpic 9 1
 509                         0000 0 0 3 &mpic 10 1
 510                         0000 0 0 4 &mpic 11 1
 511                         >;
 512
 513                 pcie@0 {
 514                         reg = <0 0 0 0 0>;
 515                         #size-cells = <2>;
 516                         #address-cells = <3>;
 517                         device_type = "pci";
 518                         ranges = <0x02000000 0 0xa0000000
 519                                   0x02000000 0 0xa0000000
 520                                   0 0x20000000
 521
 522                                   0x01000000 0 0x00000000
 523                                   0x01000000 0 0x00000000
 524                                   0 0x00100000>;
 525                 };
 526         };
 527 };