arch/powerpc/boot/dts/mpc8536ds.dts

   1 /*
   2  * MPC8536 DS Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8536ds";
  16         compatible = "fsl,mpc8536ds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26                 pci1 = &pci1;
  27                 pci2 = &pci2;
  28                 pci3 = &pci3;
  29         };
  30
  31         cpus {
  32                 #cpus = <1>;
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8536@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         next-level-cache = <&L2>;
  40                 };
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <00000000 00000000>;      // Filled by U-Boot
  46         };
  47
  48         soc@ffe00000 {
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 device_type = "soc";
  52                 compatible = "simple-bus";
  53                 ranges = <0x0 0xffe00000 0x100000>;
  54                 reg = <0xffe00000 0x1000>;
  55                 bus-frequency = <0>;            // Filled out by uboot.
  56
  57                 memory-controller@2000 {
  58                         compatible = "fsl,mpc8536-memory-controller";
  59                         reg = <0x2000 0x1000>;
  60                         interrupt-parent = <&mpic>;
  61                         interrupts = <18 0x2>;
  62                 };
  63
  64                 L2: l2-cache-controller@20000 {
  65                         compatible = "fsl,mpc8536-l2-cache-controller";
  66                         reg = <0x20000 0x1000>;
  67                         interrupt-parent = <&mpic>;
  68                         interrupts = <16 0x2>;
  69                 };
  70
  71                 i2c@3000 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <0>;
  75                         compatible = "fsl-i2c";
  76                         reg = <0x3000 0x100>;
  77                         interrupts = <43 0x2>;
  78                         interrupt-parent = <&mpic>;
  79                         dfsrr;
  80                 };
  81
  82                 i2c@3100 {
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         cell-index = <1>;
  86                         compatible = "fsl-i2c";
  87                         reg = <0x3100 0x100>;
  88                         interrupts = <43 0x2>;
  89                         interrupt-parent = <&mpic>;
  90                         dfsrr;
  91                         rtc@68 {
  92                                 compatible = "dallas,ds3232";
  93                                 reg = <0x68>;
  94                                 interrupts = <0 0x1>;
  95                                 interrupt-parent = <&mpic>;
  96                         };
  97                 };
  98
  99                 dma@21300 {
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102                         compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
 103                         reg = <0x21300 4>;
 104                         ranges = <0 0x21100 0x200>;
 105                         cell-index = <0>;
 106                         dma-channel@0 {
 107                                 compatible = "fsl,mpc8536-dma-channel",
 108                                              "fsl,eloplus-dma-channel";
 109                                 reg = <0x0 0x80>;
 110                                 cell-index = <0>;
 111                                 interrupt-parent = <&mpic>;
 112                                 interrupts = <20 2>;
 113                         };
 114                         dma-channel@80 {
 115                                 compatible = "fsl,mpc8536-dma-channel",
 116                                              "fsl,eloplus-dma-channel";
 117                                 reg = <0x80 0x80>;
 118                                 cell-index = <1>;
 119                                 interrupt-parent = <&mpic>;
 120                                 interrupts = <21 2>;
 121                         };
 122                         dma-channel@100 {
 123                                 compatible = "fsl,mpc8536-dma-channel",
 124                                              "fsl,eloplus-dma-channel";
 125                                 reg = <0x100 0x80>;
 126                                 cell-index = <2>;
 127                                 interrupt-parent = <&mpic>;
 128                                 interrupts = <22 2>;
 129                         };
 130                         dma-channel@180 {
 131                                 compatible = "fsl,mpc8536-dma-channel",
 132                                              "fsl,eloplus-dma-channel";
 133                                 reg = <0x180 0x80>;
 134                                 cell-index = <3>;
 135                                 interrupt-parent = <&mpic>;
 136                                 interrupts = <23 2>;
 137                         };
 138                 };
 139
 140                 mdio@24520 {
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143                         compatible = "fsl,gianfar-mdio";
 144                         reg = <0x24520 0x20>;
 145
 146                         phy0: ethernet-phy@0 {
 147                                 interrupt-parent = <&mpic>;
 148                                 interrupts = <10 0x1>;
 149                                 reg = <0>;
 150                                 device_type = "ethernet-phy";
 151                         };
 152                         phy1: ethernet-phy@1 {
 153                                 interrupt-parent = <&mpic>;
 154                                 interrupts = <10 0x1>;
 155                                 reg = <1>;
 156                                 device_type = "ethernet-phy";
 157                         };
 158                         tbi0: tbi-phy@11 {
 159                                 reg = <0x11>;
 160                                 device_type = "tbi-phy";
 161                         };
 162                 };
 163
 164                 mdio@26520 {
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         compatible = "fsl,gianfar-tbi";
 168                         reg = <0x26520 0x20>;
 169
 170                         tbi1: tbi-phy@11 {
 171                                 reg = <0x11>;
 172                                 device_type = "tbi-phy";
 173                         };
 174                 };
 175
 176                 usb@22000 {
 177                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 178                         reg = <0x22000 0x1000>;
 179                         #address-cells = <1>;
 180                         #size-cells = <0>;
 181                         interrupt-parent = <&mpic>;
 182                         interrupts = <28 0x2>;
 183                         phy_type = "ulpi";
 184                 };
 185
 186                 usb@23000 {
 187                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 188                         reg = <0x23000 0x1000>;
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                         interrupt-parent = <&mpic>;
 192                         interrupts = <46 0x2>;
 193                         phy_type = "ulpi";
 194                 };
 195
 196                 enet0: ethernet@24000 {
 197                         cell-index = <0>;
 198                         device_type = "network";
 199                         model = "eTSEC";
 200                         compatible = "gianfar";
 201                         reg = <0x24000 0x1000>;
 202                         local-mac-address = [ 00 00 00 00 00 00 ];
 203                         interrupts = <29 2 30 2 34 2>;
 204                         interrupt-parent = <&mpic>;
 205                         tbi-handle = <&tbi0>;
 206                         phy-handle = <&phy1>;
 207                         phy-connection-type = "rgmii-id";
 208                 };
 209
 210                 enet1: ethernet@26000 {
 211                         cell-index = <1>;
 212                         device_type = "network";
 213                         model = "eTSEC";
 214                         compatible = "gianfar";
 215                         reg = <0x26000 0x1000>;
 216                         local-mac-address = [ 00 00 00 00 00 00 ];
 217                         interrupts = <31 2 32 2 33 2>;
 218                         interrupt-parent = <&mpic>;
 219                         tbi-handle = <&tbi1>;
 220                         phy-handle = <&phy0>;
 221                         phy-connection-type = "rgmii-id";
 222                 };
 223
 224                 usb@2b000 {
 225                         compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
 226                         reg = <0x2b000 0x1000>;
 227                         #address-cells = <1>;
 228                         #size-cells = <0>;
 229                         interrupt-parent = <&mpic>;
 230                         interrupts = <60 0x2>;
 231                         dr_mode = "peripheral";
 232                         phy_type = "ulpi";
 233                 };
 234
 235                 serial0: serial@4500 {
 236                         cell-index = <0>;
 237                         device_type = "serial";
 238                         compatible = "ns16550";
 239                         reg = <0x4500 0x100>;
 240                         clock-frequency = <0>;
 241                         interrupts = <42 0x2>;
 242                         interrupt-parent = <&mpic>;
 243                 };
 244
 245                 serial1: serial@4600 {
 246                         cell-index = <1>;
 247                         device_type = "serial";
 248                         compatible = "ns16550";
 249                         reg = <0x4600 0x100>;
 250                         clock-frequency = <0>;
 251                         interrupts = <42 0x2>;
 252                         interrupt-parent = <&mpic>;
 253                 };
 254
 255                 crypto@30000 {
 256                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 257                                      "fsl,sec2.1", "fsl,sec2.0";
 258                         reg = <0x30000 0x10000>;
 259                         interrupts = <45 2 58 2>;
 260                         interrupt-parent = <&mpic>;
 261                         fsl,num-channels = <4>;
 262                         fsl,channel-fifo-len = <24>;
 263                         fsl,exec-units-mask = <0x9fe>;
 264                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 265                 };
 266
 267                 sata@18000 {
 268                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 269                         reg = <0x18000 0x1000>;
 270                         cell-index = <1>;
 271                         interrupts = <74 0x2>;
 272                         interrupt-parent = <&mpic>;
 273                 };
 274
 275                 sata@19000 {
 276                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 277                         reg = <0x19000 0x1000>;
 278                         cell-index = <2>;
 279                         interrupts = <41 0x2>;
 280                         interrupt-parent = <&mpic>;
 281                 };
 282
 283                 global-utilities@e0000 {        //global utilities block
 284                         compatible = "fsl,mpc8548-guts";
 285                         reg = <0xe0000 0x1000>;
 286                         fsl,has-rstcr;
 287                 };
 288
 289                 mpic: pic@40000 {
 290                         clock-frequency = <0>;
 291                         interrupt-controller;
 292                         #address-cells = <0>;
 293                         #interrupt-cells = <2>;
 294                         reg = <0x40000 0x40000>;
 295                         compatible = "chrp,open-pic";
 296                         device_type = "open-pic";
 297                         big-endian;
 298                 };
 299
 300                 msi@41600 {
 301                         compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
 302                         reg = <0x41600 0x80>;
 303                         msi-available-ranges = <0 0x100>;
 304                         interrupts = <
 305                                 0xe0 0
 306                                 0xe1 0
 307                                 0xe2 0
 308                                 0xe3 0
 309                                 0xe4 0
 310                                 0xe5 0
 311                                 0xe6 0
 312                                 0xe7 0>;
 313                         interrupt-parent = <&mpic>;
 314                 };
 315         };
 316
 317         pci0: pci@ffe08000 {
 318                 cell-index = <0>;
 319                 compatible = "fsl,mpc8540-pci";
 320                 device_type = "pci";
 321                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 322                 interrupt-map = <
 323
 324                         /* IDSEL 0x11 J17 Slot 1 */
 325                         0x8800 0 0 1 &mpic 1 1
 326                         0x8800 0 0 2 &mpic 2 1
 327                         0x8800 0 0 3 &mpic 3 1
 328                         0x8800 0 0 4 &mpic 4 1>;
 329
 330                 interrupt-parent = <&mpic>;
 331                 interrupts = <24 0x2>;
 332                 bus-range = <0 0xff>;
 333                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
 334                           0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
 335                 clock-frequency = <66666666>;
 336                 #interrupt-cells = <1>;
 337                 #size-cells = <2>;
 338                 #address-cells = <3>;
 339                 reg = <0xffe08000 0x1000>;
 340         };
 341
 342         pci1: pcie@ffe09000 {
 343                 cell-index = <1>;
 344                 compatible = "fsl,mpc8548-pcie";
 345                 device_type = "pci";
 346                 #interrupt-cells = <1>;
 347                 #size-cells = <2>;
 348                 #address-cells = <3>;
 349                 reg = <0xffe09000 0x1000>;
 350                 bus-range = <0 0xff>;
 351                 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
 352                           0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
 353                 clock-frequency = <33333333>;
 354                 interrupt-parent = <&mpic>;
 355                 interrupts = <25 0x2>;
 356                 interrupt-map-mask = <0xf800 0 0 7>;
 357                 interrupt-map = <
 358                         /* IDSEL 0x0 */
 359                         0000 0 0 1 &mpic 4 1
 360                         0000 0 0 2 &mpic 5 1
 361                         0000 0 0 3 &mpic 6 1
 362                         0000 0 0 4 &mpic 7 1
 363                         >;
 364                 pcie@0 {
 365                         reg = <0 0 0 0 0>;
 366                         #size-cells = <2>;
 367                         #address-cells = <3>;
 368                         device_type = "pci";
 369                         ranges = <0x02000000 0 0x98000000
 370                                   0x02000000 0 0x98000000
 371                                   0 0x08000000
 372
 373                                   0x01000000 0 0x00000000
 374                                   0x01000000 0 0x00000000
 375                                   0 0x00010000>;
 376                 };
 377         };
 378
 379         pci2: pcie@ffe0a000 {
 380                 cell-index = <2>;
 381                 compatible = "fsl,mpc8548-pcie";
 382                 device_type = "pci";
 383                 #interrupt-cells = <1>;
 384                 #size-cells = <2>;
 385                 #address-cells = <3>;
 386                 reg = <0xffe0a000 0x1000>;
 387                 bus-range = <0 0xff>;
 388                 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
 389                           0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
 390                 clock-frequency = <33333333>;
 391                 interrupt-parent = <&mpic>;
 392                 interrupts = <26 0x2>;
 393                 interrupt-map-mask = <0xf800 0 0 7>;
 394                 interrupt-map = <
 395                         /* IDSEL 0x0 */
 396                         0000 0 0 1 &mpic 0 1
 397                         0000 0 0 2 &mpic 1 1
 398                         0000 0 0 3 &mpic 2 1
 399                         0000 0 0 4 &mpic 3 1
 400                         >;
 401                 pcie@0 {
 402                         reg = <0 0 0 0 0>;
 403                         #size-cells = <2>;
 404                         #address-cells = <3>;
 405                         device_type = "pci";
 406                         ranges = <0x02000000 0 0x90000000
 407                                   0x02000000 0 0x90000000
 408                                   0 0x08000000
 409
 410                                   0x01000000 0 0x00000000
 411                                   0x01000000 0 0x00000000
 412                                   0 0x00010000>;
 413                 };
 414         };
 415
 416         pci3: pcie@ffe0b000 {
 417                 cell-index = <3>;
 418                 compatible = "fsl,mpc8548-pcie";
 419                 device_type = "pci";
 420                 #interrupt-cells = <1>;
 421                 #size-cells = <2>;
 422                 #address-cells = <3>;
 423                 reg = <0xffe0b000 0x1000>;
 424                 bus-range = <0 0xff>;
 425                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
 426                           0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
 427                 clock-frequency = <33333333>;
 428                 interrupt-parent = <&mpic>;
 429                 interrupts = <27 0x2>;
 430                 interrupt-map-mask = <0xf800 0 0 7>;
 431                 interrupt-map = <
 432                         /* IDSEL 0x0 */
 433                         0000 0 0 1 &mpic 8 1
 434                         0000 0 0 2 &mpic 9 1
 435                         0000 0 0 3 &mpic 10 1
 436                         0000 0 0 4 &mpic 11 1
 437                         >;
 438
 439                 pcie@0 {
 440                         reg = <0 0 0 0 0>;
 441                         #size-cells = <2>;
 442                         #address-cells = <3>;
 443                         device_type = "pci";
 444                         ranges = <0x02000000 0 0xa0000000
 445                                   0x02000000 0 0xa0000000
 446                                   0 0x20000000
 447
 448                                   0x01000000 0 0x00000000
 449                                   0x01000000 0 0x00000000
 450                                   0 0x00100000>;
 451                 };
 452         };
 453 };