arch/powerpc/boot/dts/mpc8378_mds.dts

   1 /*
   2  * MPC8378E MDS Device Tree Source
   3  *
   4  * Copyright 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8378emds";
  16         compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8378@0 {
  33                         device_type = "cpu";
  34                         reg = <0x0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <32768>;
  38                         i-cache-size = <32768>;
  39                         timebase-frequency = <0>;
  40                         bus-frequency = <0>;
  41                         clock-frequency = <0>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
  48         };
  49
  50         soc@e0000000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 device_type = "soc";
  54                 ranges = <0x0 0xe0000000 0x00100000>;
  55                 reg = <0xe0000000 0x00000200>;
  56                 bus-frequency = <0>;
  57
  58                 wdt@200 {
  59                         compatible = "mpc83xx_wdt";
  60                         reg = <0x200 0x100>;
  61                 };
  62
  63                 i2c@3000 {
  64                         #address-cells = <1>;
  65                         #size-cells = <0>;
  66                         cell-index = <0>;
  67                         compatible = "fsl-i2c";
  68                         reg = <0x3000 0x100>;
  69                         interrupts = <14 0x8>;
  70                         interrupt-parent = <&ipic>;
  71                         dfsrr;
  72                 };
  73
  74                 i2c@3100 {
  75                         #address-cells = <1>;
  76                         #size-cells = <0>;
  77                         cell-index = <1>;
  78                         compatible = "fsl-i2c";
  79                         reg = <0x3100 0x100>;
  80                         interrupts = <15 0x8>;
  81                         interrupt-parent = <&ipic>;
  82                         dfsrr;
  83                 };
  84
  85                 spi@7000 {
  86                         cell-index = <0>;
  87                         compatible = "fsl,spi";
  88                         reg = <0x7000 0x1000>;
  89                         interrupts = <16 0x8>;
  90                         interrupt-parent = <&ipic>;
  91                         mode = "cpu";
  92                 };
  93
  94                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  95                 usb@23000 {
  96                         compatible = "fsl-usb2-dr";
  97                         reg = <0x23000 0x1000>;
  98                         #address-cells = <1>;
  99                         #size-cells = <0>;
 100                         interrupt-parent = <&ipic>;
 101                         interrupts = <38 0x8>;
 102                         phy_type = "utmi_wide";
 103                 };
 104
 105                 mdio@24520 {
 106                         #address-cells = <1>;
 107                         #size-cells = <0>;
 108                         compatible = "fsl,gianfar-mdio";
 109                         reg = <0x24520 0x20>;
 110                         phy2: ethernet-phy@2 {
 111                                 interrupt-parent = <&ipic>;
 112                                 interrupts = <17 0x8>;
 113                                 reg = <0x2>;
 114                                 device_type = "ethernet-phy";
 115                         };
 116                         phy3: ethernet-phy@3 {
 117                                 interrupt-parent = <&ipic>;
 118                                 interrupts = <18 0x8>;
 119                                 reg = <0x3>;
 120                                 device_type = "ethernet-phy";
 121                         };
 122                 };
 123
 124                 enet0: ethernet@24000 {
 125                         cell-index = <0>;
 126                         device_type = "network";
 127                         model = "eTSEC";
 128                         compatible = "gianfar";
 129                         reg = <0x24000 0x1000>;
 130                         local-mac-address = [ 00 00 00 00 00 00 ];
 131                         interrupts = <32 0x8 33 0x8 34 0x8>;
 132                         phy-connection-type = "mii";
 133                         interrupt-parent = <&ipic>;
 134                         phy-handle = <&phy2>;
 135                 };
 136
 137                 enet1: ethernet@25000 {
 138                         cell-index = <1>;
 139                         device_type = "network";
 140                         model = "eTSEC";
 141                         compatible = "gianfar";
 142                         reg = <0x25000 0x1000>;
 143                         local-mac-address = [ 00 00 00 00 00 00 ];
 144                         interrupts = <35 0x8 36 0x8 37 0x8>;
 145                         phy-connection-type = "mii";
 146                         interrupt-parent = <&ipic>;
 147                         phy-handle = <&phy3>;
 148                 };
 149
 150                 serial0: serial@4500 {
 151                         cell-index = <0>;
 152                         device_type = "serial";
 153                         compatible = "ns16550";
 154                         reg = <0x4500 0x100>;
 155                         clock-frequency = <0>;
 156                         interrupts = <9 0x8>;
 157                         interrupt-parent = <&ipic>;
 158                 };
 159
 160                 serial1: serial@4600 {
 161                         cell-index = <1>;
 162                         device_type = "serial";
 163                         compatible = "ns16550";
 164                         reg = <0x4600 0x100>;
 165                         clock-frequency = <0>;
 166                         interrupts = <10 0x8>;
 167                         interrupt-parent = <&ipic>;
 168                 };
 169
 170                 crypto@30000 {
 171                         model = "SEC3";
 172                         compatible = "talitos";
 173                         reg = <0x30000 0x10000>;
 174                         interrupts = <11 0x8>;
 175                         interrupt-parent = <&ipic>;
 176                         /* Rev. 3.0 geometry */
 177                         num-channels = <4>;
 178                         channel-fifo-len = <24>;
 179                         exec-units-mask = <0x000001fe>;
 180                         descriptor-types-mask = <0x03ab0ebf>;
 181                 };
 182
 183                 sdhc@2e000 {
 184                         model = "eSDHC";
 185                         compatible = "fsl,esdhc";
 186                         reg = <0x2e000 0x1000>;
 187                         interrupts = <42 0x8>;
 188                         interrupt-parent = <&ipic>;
 189                 };
 190
 191                 /* IPIC
 192                  * interrupts cell = <intr #, sense>
 193                  * sense values match linux IORESOURCE_IRQ_* defines:
 194                  * sense == 8: Level, low assertion
 195                  * sense == 2: Edge, high-to-low change
 196                  */
 197                 ipic: pic@700 {
 198                         compatible = "fsl,ipic";
 199                         interrupt-controller;
 200                         #address-cells = <0>;
 201                         #interrupt-cells = <2>;
 202                         reg = <0x700 0x100>;
 203                 };
 204         };
 205
 206         pci0: pci@e0008500 {
 207                 cell-index = <0>;
 208                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 209                 interrupt-map = <
 210
 211                                 /* IDSEL 0x11 */
 212                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
 213                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
 214                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
 215                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
 216
 217                                 /* IDSEL 0x12 */
 218                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
 219                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
 220                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
 221                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
 222
 223                                 /* IDSEL 0x13 */
 224                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
 225                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
 226                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
 227                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
 228
 229                                 /* IDSEL 0x15 */
 230                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
 231                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
 232                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
 233                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
 234
 235                                 /* IDSEL 0x16 */
 236                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
 237                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
 238                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
 239                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
 240
 241                                 /* IDSEL 0x17 */
 242                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
 243                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
 244                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
 245                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
 246
 247                                 /* IDSEL 0x18 */
 248                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
 249                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
 250                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
 251                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
 252                 interrupt-parent = <&ipic>;
 253                 interrupts = <66 0x8>;
 254                 bus-range = <0x0 0x0>;
 255                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 256                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 257                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
 258                 clock-frequency = <0>;
 259                 #interrupt-cells = <1>;
 260                 #size-cells = <2>;
 261                 #address-cells = <3>;
 262                 reg = <0xe0008500 0x100>;
 263                 compatible = "fsl,mpc8349-pci";
 264                 device_type = "pci";
 265         };
 266 };