arch/powerpc/boot/dts/mpc8377_mds.dts

   1 /*
   2  * MPC8377E MDS Device Tree Source
   3  *
   4  * Copyright 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8377emds";
  16         compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 PowerPC,8377@0 {
  33                         device_type = "cpu";
  34                         reg = <0x0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <32768>;
  38                         i-cache-size = <32768>;
  39                         timebase-frequency = <0>;
  40                         bus-frequency = <0>;
  41                         clock-frequency = <0>;
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x20000000>;  // 512MB at 0
  48         };
  49
  50         localbus@e0005000 {
  51                 #address-cells = <2>;
  52                 #size-cells = <1>;
  53                 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
  54                 reg = <0xe0005000 0x1000>;
  55                 interrupts = <77 0x8>;
  56                 interrupt-parent = <&ipic>;
  57
  58                 // booting from NOR flash
  59                 ranges = <0 0x0 0xfe000000 0x02000000
  60                           1 0x0 0xf8000000 0x00008000
  61                           3 0x0 0xe0600000 0x00008000>;
  62
  63                 flash@0,0 {
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                         compatible = "cfi-flash";
  67                         reg = <0 0x0 0x2000000>;
  68                         bank-width = <2>;
  69                         device-width = <1>;
  70
  71                         u-boot@0 {
  72                                 reg = <0x0 0x100000>;
  73                                 read-only;
  74                         };
  75
  76                         fs@100000 {
  77                                 reg = <0x100000 0x800000>;
  78                         };
  79
  80                         kernel@1d00000 {
  81                                 reg = <0x1d00000 0x200000>;
  82                         };
  83
  84                         dtb@1f00000 {
  85                                 reg = <0x1f00000 0x100000>;
  86                         };
  87                 };
  88
  89                 bcsr@1,0 {
  90                         reg = <1 0x0 0x8000>;
  91                         compatible = "fsl,mpc837xmds-bcsr";
  92                 };
  93
  94                 nand@3,0 {
  95                         #address-cells = <1>;
  96                         #size-cells = <1>;
  97                         compatible = "fsl,mpc8377-fcm-nand",
  98                                      "fsl,elbc-fcm-nand";
  99                         reg = <3 0x0 0x8000>;
 100
 101                         u-boot@0 {
 102                                 reg = <0x0 0x100000>;
 103                                 read-only;
 104                         };
 105
 106                         kernel@100000 {
 107                                 reg = <0x100000 0x300000>;
 108                         };
 109
 110                         fs@400000 {
 111                                 reg = <0x400000 0x1c00000>;
 112                         };
 113                 };
 114         };
 115
 116         soc@e0000000 {
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 device_type = "soc";
 120                 compatible = "simple-bus";
 121                 ranges = <0x0 0xe0000000 0x00100000>;
 122                 reg = <0xe0000000 0x00000200>;
 123                 bus-frequency = <0>;
 124
 125                 wdt@200 {
 126                         compatible = "mpc83xx_wdt";
 127                         reg = <0x200 0x100>;
 128                 };
 129
 130                 i2c@3000 {
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         cell-index = <0>;
 134                         compatible = "fsl-i2c";
 135                         reg = <0x3000 0x100>;
 136                         interrupts = <14 0x8>;
 137                         interrupt-parent = <&ipic>;
 138                         dfsrr;
 139                 };
 140
 141                 i2c@3100 {
 142                         #address-cells = <1>;
 143                         #size-cells = <0>;
 144                         cell-index = <1>;
 145                         compatible = "fsl-i2c";
 146                         reg = <0x3100 0x100>;
 147                         interrupts = <15 0x8>;
 148                         interrupt-parent = <&ipic>;
 149                         dfsrr;
 150                 };
 151
 152                 spi@7000 {
 153                         cell-index = <0>;
 154                         compatible = "fsl,spi";
 155                         reg = <0x7000 0x1000>;
 156                         interrupts = <16 0x8>;
 157                         interrupt-parent = <&ipic>;
 158                         mode = "cpu";
 159                 };
 160
 161                 usb@23000 {
 162                         compatible = "fsl-usb2-dr";
 163                         reg = <0x23000 0x1000>;
 164                         #address-cells = <1>;
 165                         #size-cells = <0>;
 166                         interrupt-parent = <&ipic>;
 167                         interrupts = <38 0x8>;
 168                         dr_mode = "host";
 169                         phy_type = "ulpi";
 170                 };
 171
 172                 mdio@24520 {
 173                         #address-cells = <1>;
 174                         #size-cells = <0>;
 175                         compatible = "fsl,gianfar-mdio";
 176                         reg = <0x24520 0x20>;
 177                         phy2: ethernet-phy@2 {
 178                                 interrupt-parent = <&ipic>;
 179                                 interrupts = <17 0x8>;
 180                                 reg = <0x2>;
 181                                 device_type = "ethernet-phy";
 182                         };
 183                         phy3: ethernet-phy@3 {
 184                                 interrupt-parent = <&ipic>;
 185                                 interrupts = <18 0x8>;
 186                                 reg = <0x3>;
 187                                 device_type = "ethernet-phy";
 188                         };
 189                 };
 190
 191                 enet0: ethernet@24000 {
 192                         cell-index = <0>;
 193                         device_type = "network";
 194                         model = "eTSEC";
 195                         compatible = "gianfar";
 196                         reg = <0x24000 0x1000>;
 197                         local-mac-address = [ 00 00 00 00 00 00 ];
 198                         interrupts = <32 0x8 33 0x8 34 0x8>;
 199                         phy-connection-type = "mii";
 200                         interrupt-parent = <&ipic>;
 201                         phy-handle = <&phy2>;
 202                 };
 203
 204                 enet1: ethernet@25000 {
 205                         cell-index = <1>;
 206                         device_type = "network";
 207                         model = "eTSEC";
 208                         compatible = "gianfar";
 209                         reg = <0x25000 0x1000>;
 210                         local-mac-address = [ 00 00 00 00 00 00 ];
 211                         interrupts = <35 0x8 36 0x8 37 0x8>;
 212                         phy-connection-type = "mii";
 213                         interrupt-parent = <&ipic>;
 214                         phy-handle = <&phy3>;
 215                 };
 216
 217                 serial0: serial@4500 {
 218                         cell-index = <0>;
 219                         device_type = "serial";
 220                         compatible = "ns16550";
 221                         reg = <0x4500 0x100>;
 222                         clock-frequency = <0>;
 223                         interrupts = <9 0x8>;
 224                         interrupt-parent = <&ipic>;
 225                 };
 226
 227                 serial1: serial@4600 {
 228                         cell-index = <1>;
 229                         device_type = "serial";
 230                         compatible = "ns16550";
 231                         reg = <0x4600 0x100>;
 232                         clock-frequency = <0>;
 233                         interrupts = <10 0x8>;
 234                         interrupt-parent = <&ipic>;
 235                 };
 236
 237                 dma@82a8 {
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
 241                         reg = <0x82a8 4>;
 242                         ranges = <0 0x8100 0x1a8>;
 243                         interrupt-parent = <&ipic>;
 244                         interrupts = <0x47 8>;
 245                         cell-index = <0>;
 246                         dma-channel@0 {
 247                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 248                                 reg = <0 0x80>;
 249                                 interrupt-parent = <&ipic>;
 250                                 interrupts = <0x47 8>;
 251                         };
 252                         dma-channel@80 {
 253                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 254                                 reg = <0x80 0x80>;
 255                                 interrupt-parent = <&ipic>;
 256                                 interrupts = <0x47 8>;
 257                         };
 258                         dma-channel@100 {
 259                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 260                                 reg = <0x100 0x80>;
 261                                 interrupt-parent = <&ipic>;
 262                                 interrupts = <0x47 8>;
 263                         };
 264                         dma-channel@180 {
 265                                 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
 266                                 reg = <0x180 0x28>;
 267                                 interrupt-parent = <&ipic>;
 268                                 interrupts = <0x47 8>;
 269                         };
 270                 };
 271
 272                 crypto@30000 {
 273                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 274                                      "fsl,sec2.1", "fsl,sec2.0";
 275                         reg = <0x30000 0x10000>;
 276                         interrupts = <11 0x8>;
 277                         interrupt-parent = <&ipic>;
 278                         fsl,num-channels = <4>;
 279                         fsl,channel-fifo-len = <24>;
 280                         fsl,exec-units-mask = <0x9fe>;
 281                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 282                 };
 283
 284                 sdhc@2e000 {
 285                         model = "eSDHC";
 286                         compatible = "fsl,esdhc";
 287                         reg = <0x2e000 0x1000>;
 288                         interrupts = <42 0x8>;
 289                         interrupt-parent = <&ipic>;
 290                 };
 291
 292                 sata@18000 {
 293                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 294                         reg = <0x18000 0x1000>;
 295                         interrupts = <44 0x8>;
 296                         interrupt-parent = <&ipic>;
 297                 };
 298
 299                 sata@19000 {
 300                         compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
 301                         reg = <0x19000 0x1000>;
 302                         interrupts = <45 0x8>;
 303                         interrupt-parent = <&ipic>;
 304                 };
 305
 306                 /* IPIC
 307                  * interrupts cell = <intr #, sense>
 308                  * sense values match linux IORESOURCE_IRQ_* defines:
 309                  * sense == 8: Level, low assertion
 310                  * sense == 2: Edge, high-to-low change
 311                  */
 312                 ipic: pic@700 {
 313                         compatible = "fsl,ipic";
 314                         interrupt-controller;
 315                         #address-cells = <0>;
 316                         #interrupt-cells = <2>;
 317                         reg = <0x700 0x100>;
 318                 };
 319         };
 320
 321         pci0: pci@e0008500 {
 322                 cell-index = <0>;
 323                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 324                 interrupt-map = <
 325
 326                                 /* IDSEL 0x11 */
 327                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
 328                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
 329                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
 330                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
 331
 332                                 /* IDSEL 0x12 */
 333                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
 334                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
 335                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
 336                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
 337
 338                                 /* IDSEL 0x13 */
 339                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
 340                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
 341                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
 342                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
 343
 344                                 /* IDSEL 0x15 */
 345                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
 346                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
 347                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
 348                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
 349
 350                                 /* IDSEL 0x16 */
 351                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
 352                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
 353                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
 354                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
 355
 356                                 /* IDSEL 0x17 */
 357                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
 358                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
 359                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
 360                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
 361
 362                                 /* IDSEL 0x18 */
 363                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
 364                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
 365                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
 366                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
 367                 interrupt-parent = <&ipic>;
 368                 interrupts = <66 0x8>;
 369                 bus-range = <0x0 0x0>;
 370                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 371                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 372                           0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
 373                 clock-frequency = <0>;
 374                 #interrupt-cells = <1>;
 375                 #size-cells = <2>;
 376                 #address-cells = <3>;
 377                 reg = <0xe0008500 0x100>;
 378                 compatible = "fsl,mpc8349-pci";
 379                 device_type = "pci";
 380         };
 381 };