arch/powerpc/boot/dts/mpc8360emds.dts

   1 /*
   2  * MPC8360E EMDS Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 /*
  14 /memreserve/    00000000 1000000;
  15 */
  16
  17 / {
  18         model = "MPC8360EPB";
  19         compatible = "MPC83xx";
  20         #address-cells = <1>;
  21         #size-cells = <1>;
  22         linux,phandle = <100>;
  23
  24         cpus {
  25                 #cpus = <1>;
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28                 linux,phandle = <200>;
  29
  30                 PowerPC,8360@0 {
  31                         device_type = "cpu";
  32                         reg = <0>;
  33                         d-cache-line-size = <20>;       // 32 bytes
  34                         i-cache-line-size = <20>;       // 32 bytes
  35                         d-cache-size = <8000>;          // L1, 32K
  36                         i-cache-size = <8000>;          // L1, 32K
  37                         timebase-frequency = <3EF1480>;
  38                         bus-frequency = <FBC5200>;
  39                         clock-frequency = <1F78A400>;
  40                         32-bit;
  41                         linux,phandle = <201>;
  42                         linux,boot-cpu;
  43                 };
  44         };
  45
  46         memory {
  47                 device_type = "memory";
  48                 linux,phandle = <300>;
  49                 reg = <00000000 10000000>;
  50         };
  51
  52         bcsr@f8000000 {
  53                 device_type = "board-control";
  54                 reg = <f8000000 8000>;
  55         };
  56
  57         soc8360@e0000000 {
  58                 #address-cells = <1>;
  59                 #size-cells = <1>;
  60                 #interrupt-cells = <2>;
  61                 device_type = "soc";
  62                 ranges = <0 e0000000 00100000>;
  63                 reg = <e0000000 00000200>;
  64                 bus-frequency = <FBC5200>;
  65
  66                 wdt@200 {
  67                         device_type = "watchdog";
  68                         compatible = "mpc83xx_wdt";
  69                         reg = <200 100>;
  70                 };
  71
  72                 i2c@3000 {
  73                         device_type = "i2c";
  74                         compatible = "fsl-i2c";
  75                         reg = <3000 100>;
  76                         interrupts = <e 8>;
  77                         interrupt-parent = <700>;
  78                         dfsrr;
  79                 };
  80
  81                 i2c@3100 {
  82                         device_type = "i2c";
  83                         compatible = "fsl-i2c";
  84                         reg = <3100 100>;
  85                         interrupts = <f 8>;
  86                         interrupt-parent = <700>;
  87                         dfsrr;
  88                 };
  89
  90                 serial@4500 {
  91                         device_type = "serial";
  92                         compatible = "ns16550";
  93                         reg = <4500 100>;
  94                         clock-frequency = <FBC5200>;
  95                         interrupts = <9 8>;
  96                         interrupt-parent = <700>;
  97                 };
  98
  99                 serial@4600 {
 100                         device_type = "serial";
 101                         compatible = "ns16550";
 102                         reg = <4600 100>;
 103                         clock-frequency = <FBC5200>;
 104                         interrupts = <a 8>;
 105                         interrupt-parent = <700>;
 106                 };
 107
 108                 crypto@30000 {
 109                         device_type = "crypto";
 110                         model = "SEC2";
 111                         compatible = "talitos";
 112                         reg = <30000 10000>;
 113                         interrupts = <b 8>;
 114                         interrupt-parent = <700>;
 115                         num-channels = <4>;
 116                         channel-fifo-len = <18>;
 117                         exec-units-mask = <0000007e>;
 118                         /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 119                         descriptor-types-mask = <01010ebf>;
 120                 };
 121
 122                 pci@8500 {
 123                         linux,phandle = <8500>;
 124                         interrupt-map-mask = <f800 0 0 7>;
 125                         interrupt-map = <
 126
 127                                         /* IDSEL 0x11 AD17 */
 128                                          8800 0 0 1 700 14 8
 129                                          8800 0 0 2 700 15 8
 130                                          8800 0 0 3 700 16 8
 131                                          8800 0 0 4 700 17 8
 132
 133                                         /* IDSEL 0x12 AD18 */
 134                                          9000 0 0 1 700 16 8
 135                                          9000 0 0 2 700 17 8
 136                                          9000 0 0 3 700 14 8
 137                                          9000 0 0 4 700 15 8
 138
 139                                         /* IDSEL 0x13 AD19 */
 140                                          9800 0 0 1 700 17 8
 141                                          9800 0 0 2 700 14 8
 142                                          9800 0 0 3 700 15 8
 143                                          9800 0 0 4 700 16 8
 144
 145                                         /* IDSEL 0x15 AD21*/
 146                                          a800 0 0 1 700 14 8
 147                                          a800 0 0 2 700 15 8
 148                                          a800 0 0 3 700 16 8
 149                                          a800 0 0 4 700 17 8
 150
 151                                         /* IDSEL 0x16 AD22*/
 152                                          b000 0 0 1 700 17 8
 153                                          b000 0 0 2 700 14 8
 154                                          b000 0 0 3 700 15 8
 155                                          b000 0 0 4 700 16 8
 156
 157                                         /* IDSEL 0x17 AD23*/
 158                                          b800 0 0 1 700 16 8
 159                                          b800 0 0 2 700 17 8
 160                                          b800 0 0 3 700 14 8
 161                                          b800 0 0 4 700 15 8
 162
 163                                         /* IDSEL 0x18 AD24*/
 164                                          c000 0 0 1 700 15 8
 165                                          c000 0 0 2 700 16 8
 166                                          c000 0 0 3 700 17 8
 167                                          c000 0 0 4 700 14 8>;
 168                         interrupt-parent = <700>;
 169                         interrupts = <42 8>;
 170                         bus-range = <0 0>;
 171                         ranges = <02000000 0 a0000000 a0000000 0 10000000
 172                                   42000000 0 80000000 80000000 0 10000000
 173                                   01000000 0 00000000 e2000000 0 00100000>;
 174                         clock-frequency = <3f940aa>;
 175                         #interrupt-cells = <1>;
 176                         #size-cells = <2>;
 177                         #address-cells = <3>;
 178                         reg = <8500 100>;
 179                         compatible = "83xx";
 180                         device_type = "pci";
 181                 };
 182
 183                 pic@700 {
 184                         linux,phandle = <700>;
 185                         interrupt-controller;
 186                         #address-cells = <0>;
 187                         #interrupt-cells = <2>;
 188                         reg = <700 100>;
 189                         built-in;
 190                         device_type = "ipic";
 191                 };
 192
 193                 par_io@1400 {
 194                         reg = <1400 100>;
 195                         device_type = "par_io";
 196                         num-ports = <7>;
 197
 198                         ucc_pin@01 {
 199                                 linux,phandle = <140001>;
 200                                 pio-map = <
 201                         /* port  pin  dir  open_drain  assignment  has_irq */
 202                                         0  3  1  0  1  0        /* TxD0 */
 203                                         0  4  1  0  1  0        /* TxD1 */
 204                                         0  5  1  0  1  0        /* TxD2 */
 205                                         0  6  1  0  1  0        /* TxD3 */
 206                                         1  6  1  0  3  0        /* TxD4 */
 207                                         1  7  1  0  1  0        /* TxD5 */
 208                                         1  9  1  0  2  0        /* TxD6 */
 209                                         1  a  1  0  2  0        /* TxD7 */
 210                                         0  9  2  0  1  0        /* RxD0 */
 211                                         0  a  2  0  1  0        /* RxD1 */
 212                                         0  b  2  0  1  0        /* RxD2 */
 213                                         0  c  2  0  1  0        /* RxD3 */
 214                                         0  d  2  0  1  0        /* RxD4 */
 215                                         1  1  2  0  2  0        /* RxD5 */
 216                                         1  0  2  0  2  0        /* RxD6 */
 217                                         1  4  2  0  2  0        /* RxD7 */
 218                                         0  7  1  0  1  0        /* TX_EN */
 219                                         0  8  1  0  1  0        /* TX_ER */
 220                                         0  f  2  0  1  0        /* RX_DV */
 221                                         0  10 2  0  1  0        /* RX_ER */
 222                                         0  0  2  0  1  0        /* RX_CLK */
 223                                         2  9  1  0  3  0        /* GTX_CLK - CLK10 */
 224                                         2  8  2  0  1  0>;      /* GTX125 - CLK9 */
 225                         };
 226                         ucc_pin@02 {
 227                                 linux,phandle = <140002>;
 228                                 pio-map = <
 229                         /* port  pin  dir  open_drain  assignment  has_irq */
 230                                         0  11 1  0  1  0   /* TxD0 */
 231                                         0  12 1  0  1  0   /* TxD1 */
 232                                         0  13 1  0  1  0   /* TxD2 */
 233                                         0  14 1  0  1  0   /* TxD3 */
 234                                         1  2  1  0  1  0   /* TxD4 */
 235                                         1  3  1  0  2  0   /* TxD5 */
 236                                         1  5  1  0  3  0   /* TxD6 */
 237                                         1  8  1  0  3  0   /* TxD7 */
 238                                         0  17 2  0  1  0   /* RxD0 */
 239                                         0  18 2  0  1  0   /* RxD1 */
 240                                         0  19 2  0  1  0   /* RxD2 */
 241                                         0  1a 2  0  1  0   /* RxD3 */
 242                                         0  1b 2  0  1  0   /* RxD4 */
 243                                         1  c  2  0  2  0   /* RxD5 */
 244                                         1  d  2  0  3  0   /* RxD6 */
 245                                         1  b  2  0  2  0   /* RxD7 */
 246                                         0  15 1  0  1  0   /* TX_EN */
 247                                         0  16 1  0  1  0   /* TX_ER */
 248                                         0  1d 2  0  1  0   /* RX_DV */
 249                                         0  1e 2  0  1  0   /* RX_ER */
 250                                         0  1f 2  0  1  0   /* RX_CLK */
 251                                         2  2  1  0  2  0   /* GTX_CLK - CLK10 */
 252                                         2  3  2  0  1  0   /* GTX125 - CLK4 */
 253                                         0  1  3  0  2  0   /* MDIO */
 254                                         0  2  1  0  1  0>; /* MDC */
 255                         };
 256
 257                 };
 258         };
 259
 260         qe@e0100000 {
 261                 #address-cells = <1>;
 262                 #size-cells = <1>;
 263                 device_type = "qe";
 264                 model = "QE";
 265                 ranges = <0 e0100000 00100000>;
 266                 reg = <e0100000 480>;
 267                 brg-frequency = <0>;
 268                 bus-frequency = <179A7B00>;
 269
 270                 muram@10000 {
 271                         device_type = "muram";
 272                         ranges = <0 00010000 0000c000>;
 273
 274                         data-only@0{
 275                                 reg = <0 c000>;
 276                         };
 277                 };
 278
 279                 spi@4c0 {
 280                         device_type = "spi";
 281                         compatible = "fsl_spi";
 282                         reg = <4c0 40>;
 283                         interrupts = <2>;
 284                         interrupt-parent = <80>;
 285                         mode = "cpu";
 286                 };
 287
 288                 spi@500 {
 289                         device_type = "spi";
 290                         compatible = "fsl_spi";
 291                         reg = <500 40>;
 292                         interrupts = <1>;
 293                         interrupt-parent = <80>;
 294                         mode = "cpu";
 295                 };
 296
 297                 usb@6c0 {
 298                         device_type = "usb";
 299                         compatible = "qe_udc";
 300                         reg = <6c0 40 8B00 100>;
 301                         interrupts = <b>;
 302                         interrupt-parent = <80>;
 303                         mode = "slave";
 304                 };
 305
 306                 ucc@2000 {
 307                         device_type = "network";
 308                         compatible = "ucc_geth";
 309                         model = "UCC";
 310                         device-id = <1>;
 311                         reg = <2000 200>;
 312                         interrupts = <20>;
 313                         interrupt-parent = <80>;
 314                         mac-address = [ 00 04 9f 00 23 23 ];
 315                         rx-clock = <0>;
 316                         tx-clock = <19>;
 317                         phy-handle = <212000>;
 318                         pio-handle = <140001>;
 319                 };
 320
 321                 ucc@3000 {
 322                         device_type = "network";
 323                         compatible = "ucc_geth";
 324                         model = "UCC";
 325                         device-id = <2>;
 326                         reg = <3000 200>;
 327                         interrupts = <21>;
 328                         interrupt-parent = <80>;
 329                         mac-address = [ 00 11 22 33 44 55 ];
 330                         rx-clock = <0>;
 331                         tx-clock = <14>;
 332                         phy-handle = <212001>;
 333                         pio-handle = <140002>;
 334                 };
 335
 336                 mdio@2120 {
 337                         #address-cells = <1>;
 338                         #size-cells = <0>;
 339                         reg = <2120 18>;
 340                         device_type = "mdio";
 341                         compatible = "ucc_geth_phy";
 342
 343                         ethernet-phy@00 {
 344                                 linux,phandle = <212000>;
 345                                 interrupt-parent = <700>;
 346                                 interrupts = <11 2>;
 347                                 reg = <0>;
 348                                 device_type = "ethernet-phy";
 349                                 interface = <6>; //ENET_1000_GMII
 350                         };
 351                         ethernet-phy@01 {
 352                                 linux,phandle = <212001>;
 353                                 interrupt-parent = <700>;
 354                                 interrupts = <12 2>;
 355                                 reg = <1>;
 356                                 device_type = "ethernet-phy";
 357                                 interface = <6>;
 358                         };
 359                 };
 360
 361                 qeic@80 {
 362                         linux,phandle = <80>;
 363                         interrupt-controller;
 364                         device_type = "qeic";
 365                         #address-cells = <0>;
 366                         #interrupt-cells = <1>;
 367                         reg = <80 80>;
 368                         built-in;
 369                         big-endian;
 370                         interrupts = <20 8 21 8>; //high:32 low:33
 371                         interrupt-parent = <700>;
 372                 };
 373
 374         };
 375 };