arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8349EMDS";
  14         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #cpus = <1>;
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22
  23                 PowerPC,8349@0 {
  24                         device_type = "cpu";
  25                         reg = <0>;
  26                         d-cache-line-size = <20>;       // 32 bytes
  27                         i-cache-line-size = <20>;       // 32 bytes
  28                         d-cache-size = <8000>;          // L1, 32K
  29                         i-cache-size = <8000>;          // L1, 32K
  30                         timebase-frequency = <0>;       // from bootloader
  31                         bus-frequency = <0>;            // from bootloader
  32                         clock-frequency = <0>;          // from bootloader
  33                         32-bit;
  34                 };
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39                 reg = <00000000 10000000>;      // 256MB at 0
  40         };
  41
  42         bcsr@e2400000 {
  43                 device_type = "board-control";
  44                 reg = <e2400000 8000>;
  45         };
  46
  47         soc8349@e0000000 {
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 #interrupt-cells = <2>;
  51                 device_type = "soc";
  52                 ranges = <0 e0000000 00100000>;
  53                 reg = <e0000000 00000200>;
  54                 bus-frequency = <0>;
  55
  56                 wdt@200 {
  57                         device_type = "watchdog";
  58                         compatible = "mpc83xx_wdt";
  59                         reg = <200 100>;
  60                 };
  61
  62                 i2c@3000 {
  63                         device_type = "i2c";
  64                         compatible = "fsl-i2c";
  65                         reg = <3000 100>;
  66                         interrupts = <e 8>;
  67                         interrupt-parent = < &ipic >;
  68                         dfsrr;
  69                 };
  70
  71                 i2c@3100 {
  72                         device_type = "i2c";
  73                         compatible = "fsl-i2c";
  74                         reg = <3100 100>;
  75                         interrupts = <f 8>;
  76                         interrupt-parent = < &ipic >;
  77                         dfsrr;
  78                 };
  79
  80                 spi@7000 {
  81                         device_type = "spi";
  82                         compatible = "mpc83xx_spi";
  83                         reg = <7000 1000>;
  84                         interrupts = <10 8>;
  85                         interrupt-parent = < &ipic >;
  86                         mode = <0>;
  87                 };
  88
  89                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
  90                 /* port = 0 or 1 */
  91                 usb@22000 {
  92                         device_type = "usb";
  93                         compatible = "fsl-usb2-mph";
  94                         reg = <22000 1000>;
  95                         #address-cells = <1>;
  96                         #size-cells = <0>;
  97                         interrupt-parent = < &ipic >;
  98                         interrupts = <27 8>;
  99                         phy_type = "ulpi";
 100                         port1;
 101                 };
 102                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 103                 usb@23000 {
 104                         device_type = "usb";
 105                         compatible = "fsl-usb2-dr";
 106                         reg = <23000 1000>;
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         interrupt-parent = < &ipic >;
 110                         interrupts = <26 8>;
 111                         dr_mode = "otg";
 112                         phy_type = "ulpi";
 113                 };
 114
 115                 mdio@24520 {
 116                         device_type = "mdio";
 117                         compatible = "gianfar";
 118                         reg = <24520 20>;
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         phy0: ethernet-phy@0 {
 122                                 interrupt-parent = < &ipic >;
 123                                 interrupts = <11 8>;
 124                                 reg = <0>;
 125                                 device_type = "ethernet-phy";
 126                         };
 127                         phy1: ethernet-phy@1 {
 128                                 interrupt-parent = < &ipic >;
 129                                 interrupts = <12 8>;
 130                                 reg = <1>;
 131                                 device_type = "ethernet-phy";
 132                         };
 133                 };
 134
 135                 ethernet@24000 {
 136                         device_type = "network";
 137                         model = "TSEC";
 138                         compatible = "gianfar";
 139                         reg = <24000 1000>;
 140                         address = [ 00 00 00 00 00 00 ];
 141                         local-mac-address = [ 00 00 00 00 00 00 ];
 142                         interrupts = <20 8 21 8 22 8>;
 143                         interrupt-parent = < &ipic >;
 144                         phy-handle = < &phy0 >;
 145                 };
 146
 147                 ethernet@25000 {
 148                         #address-cells = <1>;
 149                         #size-cells = <0>;
 150                         device_type = "network";
 151                         model = "TSEC";
 152                         compatible = "gianfar";
 153                         reg = <25000 1000>;
 154                         address = [ 00 00 00 00 00 00 ];
 155                         local-mac-address = [ 00 00 00 00 00 00 ];
 156                         interrupts = <23 8 24 8 25 8>;
 157                         interrupt-parent = < &ipic >;
 158                         phy-handle = < &phy1 >;
 159                 };
 160
 161                 serial@4500 {
 162                         device_type = "serial";
 163                         compatible = "ns16550";
 164                         reg = <4500 100>;
 165                         clock-frequency = <0>;
 166                         interrupts = <9 8>;
 167                         interrupt-parent = < &ipic >;
 168                 };
 169
 170                 serial@4600 {
 171                         device_type = "serial";
 172                         compatible = "ns16550";
 173                         reg = <4600 100>;
 174                         clock-frequency = <0>;
 175                         interrupts = <a 8>;
 176                         interrupt-parent = < &ipic >;
 177                 };
 178
 179                 pci@8500 {
 180                         interrupt-map-mask = <f800 0 0 7>;
 181                         interrupt-map = <
 182
 183                                         /* IDSEL 0x11 */
 184                                          8800 0 0 1 &ipic 14 8
 185                                          8800 0 0 2 &ipic 15 8
 186                                          8800 0 0 3 &ipic 16 8
 187                                          8800 0 0 4 &ipic 17 8
 188
 189                                         /* IDSEL 0x12 */
 190                                          9000 0 0 1 &ipic 16 8
 191                                          9000 0 0 2 &ipic 17 8
 192                                          9000 0 0 3 &ipic 14 8
 193                                          9000 0 0 4 &ipic 15 8
 194
 195                                         /* IDSEL 0x13 */
 196                                          9800 0 0 1 &ipic 17 8
 197                                          9800 0 0 2 &ipic 14 8
 198                                          9800 0 0 3 &ipic 15 8
 199                                          9800 0 0 4 &ipic 16 8
 200
 201                                         /* IDSEL 0x15 */
 202                                          a800 0 0 1 &ipic 14 8
 203                                          a800 0 0 2 &ipic 15 8
 204                                          a800 0 0 3 &ipic 16 8
 205                                          a800 0 0 4 &ipic 17 8
 206
 207                                         /* IDSEL 0x16 */
 208                                          b000 0 0 1 &ipic 17 8
 209                                          b000 0 0 2 &ipic 14 8
 210                                          b000 0 0 3 &ipic 15 8
 211                                          b000 0 0 4 &ipic 16 8
 212
 213                                         /* IDSEL 0x17 */
 214                                          b800 0 0 1 &ipic 16 8
 215                                          b800 0 0 2 &ipic 17 8
 216                                          b800 0 0 3 &ipic 14 8
 217                                          b800 0 0 4 &ipic 15 8
 218
 219                                         /* IDSEL 0x18 */
 220                                          c000 0 0 1 &ipic 15 8
 221                                          c000 0 0 2 &ipic 16 8
 222                                          c000 0 0 3 &ipic 17 8
 223                                          c000 0 0 4 &ipic 14 8>;
 224                         interrupt-parent = < &ipic >;
 225                         interrupts = <42 8>;
 226                         bus-range = <0 0>;
 227                         ranges = <02000000 0 a0000000 a0000000 0 10000000
 228                                   42000000 0 80000000 80000000 0 10000000
 229                                   01000000 0 00000000 e2000000 0 00100000>;
 230                         clock-frequency = <3f940aa>;
 231                         #interrupt-cells = <1>;
 232                         #size-cells = <2>;
 233                         #address-cells = <3>;
 234                         reg = <8500 100>;
 235                         compatible = "83xx";
 236                         device_type = "pci";
 237                 };
 238
 239                 pci@8600 {
 240                         interrupt-map-mask = <f800 0 0 7>;
 241                         interrupt-map = <
 242
 243                                         /* IDSEL 0x11 */
 244                                          8800 0 0 1 &ipic 14 8
 245                                          8800 0 0 2 &ipic 15 8
 246                                          8800 0 0 3 &ipic 16 8
 247                                          8800 0 0 4 &ipic 17 8
 248
 249                                         /* IDSEL 0x12 */
 250                                          9000 0 0 1 &ipic 16 8
 251                                          9000 0 0 2 &ipic 17 8
 252                                          9000 0 0 3 &ipic 14 8
 253                                          9000 0 0 4 &ipic 15 8
 254
 255                                         /* IDSEL 0x13 */
 256                                          9800 0 0 1 &ipic 17 8
 257                                          9800 0 0 2 &ipic 14 8
 258                                          9800 0 0 3 &ipic 15 8
 259                                          9800 0 0 4 &ipic 16 8
 260
 261                                         /* IDSEL 0x15 */
 262                                          a800 0 0 1 &ipic 14 8
 263                                          a800 0 0 2 &ipic 15 8
 264                                          a800 0 0 3 &ipic 16 8
 265                                          a800 0 0 4 &ipic 17 8
 266
 267                                         /* IDSEL 0x16 */
 268                                          b000 0 0 1 &ipic 17 8
 269                                          b000 0 0 2 &ipic 14 8
 270                                          b000 0 0 3 &ipic 15 8
 271                                          b000 0 0 4 &ipic 16 8
 272
 273                                         /* IDSEL 0x17 */
 274                                          b800 0 0 1 &ipic 16 8
 275                                          b800 0 0 2 &ipic 17 8
 276                                          b800 0 0 3 &ipic 14 8
 277                                          b800 0 0 4 &ipic 15 8
 278
 279                                         /* IDSEL 0x18 */
 280                                          c000 0 0 1 &ipic 15 8
 281                                          c000 0 0 2 &ipic 16 8
 282                                          c000 0 0 3 &ipic 17 8
 283                                          c000 0 0 4 &ipic 14 8>;
 284                         interrupt-parent = < &ipic >;
 285                         interrupts = <42 8>;
 286                         bus-range = <0 0>;
 287                         ranges = <02000000 0 b0000000 b0000000 0 10000000
 288                                   42000000 0 90000000 90000000 0 10000000
 289                                   01000000 0 00000000 e2100000 0 00100000>;
 290                         clock-frequency = <3f940aa>;
 291                         #interrupt-cells = <1>;
 292                         #size-cells = <2>;
 293                         #address-cells = <3>;
 294                         reg = <8600 100>;
 295                         compatible = "83xx";
 296                         device_type = "pci";
 297                 };
 298
 299                 /* May need to remove if on a part without crypto engine */
 300                 crypto@30000 {
 301                         device_type = "crypto";
 302                         model = "SEC2";
 303                         compatible = "talitos";
 304                         reg = <30000 10000>;
 305                         interrupts = <b 8>;
 306                         interrupt-parent = < &ipic >;
 307                         num-channels = <4>;
 308                         channel-fifo-len = <18>;
 309                         exec-units-mask = <0000007e>;
 310                         /* desc mask is for rev2.0,
 311                          * we need runtime fixup for >2.0 */
 312                         descriptor-types-mask = <01010ebf>;
 313                 };
 314
 315                 /* IPIC
 316                  * interrupts cell = <intr #, sense>
 317                  * sense values match linux IORESOURCE_IRQ_* defines:
 318                  * sense == 8: Level, low assertion
 319                  * sense == 2: Edge, high-to-low change
 320                  */
 321                 ipic: pic@700 {
 322                         interrupt-controller;
 323                         #address-cells = <0>;
 324                         #interrupt-cells = <2>;
 325                         reg = <700 100>;
 326                         built-in;
 327                         device_type = "ipic";
 328                 };
 329         };
 330 };