Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mfashe...
[pandora-kernel.git] / arch / powerpc / boot / dts / mpc8349emitxgp.dts
1 /*
2  * MPC8349E-mITX-GP Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License as published by the
8  * Free Software Foundation; either version 2 of the License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "MPC8349EMITXGP";
16         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 serial0 = &serial0;
23                 serial1 = &serial1;
24                 pci0 = &pci0;
25         };
26
27         cpus {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30
31                 PowerPC,8349@0 {
32                         device_type = "cpu";
33                         reg = <0x0>;
34                         d-cache-line-size = <32>;
35                         i-cache-line-size = <32>;
36                         d-cache-size = <32768>;
37                         i-cache-size = <32768>;
38                         timebase-frequency = <0>;       // from bootloader
39                         bus-frequency = <0>;            // from bootloader
40                         clock-frequency = <0>;          // from bootloader
41                 };
42         };
43
44         memory {
45                 device_type = "memory";
46                 reg = <0x00000000 0x10000000>;
47         };
48
49         soc8349@e0000000 {
50                 #address-cells = <1>;
51                 #size-cells = <1>;
52                 device_type = "soc";
53                 ranges = <0x0 0xe0000000 0x00100000>;
54                 reg = <0xe0000000 0x00000200>;
55                 bus-frequency = <0>;                    // from bootloader
56
57                 wdt@200 {
58                         device_type = "watchdog";
59                         compatible = "mpc83xx_wdt";
60                         reg = <0x200 0x100>;
61                 };
62
63                 i2c@3000 {
64                         #address-cells = <1>;
65                         #size-cells = <0>;
66                         cell-index = <0>;
67                         compatible = "fsl-i2c";
68                         reg = <0x3000 0x100>;
69                         interrupts = <14 0x8>;
70                         interrupt-parent = <&ipic>;
71                         dfsrr;
72                 };
73
74                 i2c@3100 {
75                         #address-cells = <1>;
76                         #size-cells = <0>;
77                         cell-index = <1>;
78                         compatible = "fsl-i2c";
79                         reg = <0x3100 0x100>;
80                         interrupts = <15 0x8>;
81                         interrupt-parent = <&ipic>;
82                         dfsrr;
83                 };
84
85                 spi@7000 {
86                         cell-index = <0>;
87                         compatible = "fsl,spi";
88                         reg = <0x7000 0x1000>;
89                         interrupts = <16 0x8>;
90                         interrupt-parent = <&ipic>;
91                         mode = "cpu";
92                 };
93
94                 dma@82a8 {
95                         #address-cells = <1>;
96                         #size-cells = <1>;
97                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
98                         reg = <0x82a8 4>;
99                         ranges = <0 0x8100 0x1a8>;
100                         interrupt-parent = <&ipic>;
101                         interrupts = <71 8>;
102                         cell-index = <0>;
103                         dma-channel@0 {
104                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
105                                 reg = <0 0x80>;
106                                 interrupt-parent = <&ipic>;
107                                 interrupts = <71 8>;
108                         };
109                         dma-channel@80 {
110                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
111                                 reg = <0x80 0x80>;
112                                 interrupt-parent = <&ipic>;
113                                 interrupts = <71 8>;
114                         };
115                         dma-channel@100 {
116                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117                                 reg = <0x100 0x80>;
118                                 interrupt-parent = <&ipic>;
119                                 interrupts = <71 8>;
120                         };
121                         dma-channel@180 {
122                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123                                 reg = <0x180 0x28>;
124                                 interrupt-parent = <&ipic>;
125                                 interrupts = <71 8>;
126                         };
127                 };
128
129                 usb@23000 {
130                         compatible = "fsl-usb2-dr";
131                         reg = <0x23000 0x1000>;
132                         #address-cells = <1>;
133                         #size-cells = <0>;
134                         interrupt-parent = <&ipic>;
135                         interrupts = <38 0x8>;
136                         dr_mode = "otg";
137                         phy_type = "ulpi";
138                 };
139
140                 mdio@24520 {
141                         #address-cells = <1>;
142                         #size-cells = <0>;
143                         compatible = "fsl,gianfar-mdio";
144                         reg = <0x24520 0x20>;
145
146                         /* Vitesse 8201 */
147                         phy1c: ethernet-phy@1c {
148                                 interrupt-parent = <&ipic>;
149                                 interrupts = <18 0x8>;
150                                 reg = <0x1c>;
151                                 device_type = "ethernet-phy";
152                         };
153                 };
154
155                 enet0: ethernet@24000 {
156                         cell-index = <0>;
157                         device_type = "network";
158                         model = "TSEC";
159                         compatible = "gianfar";
160                         reg = <0x24000 0x1000>;
161                         local-mac-address = [ 00 00 00 00 00 00 ];
162                         interrupts = <32 0x8 33 0x8 34 0x8>;
163                         interrupt-parent = <&ipic>;
164                         phy-handle = <&phy1c>;
165                         linux,network-index = <0>;
166                 };
167
168                 serial0: serial@4500 {
169                         cell-index = <0>;
170                         device_type = "serial";
171                         compatible = "ns16550";
172                         reg = <0x4500 0x100>;
173                         clock-frequency = <0>;          // from bootloader
174                         interrupts = <9 0x8>;
175                         interrupt-parent = <&ipic>;
176                 };
177
178                 serial1: serial@4600 {
179                         cell-index = <1>;
180                         device_type = "serial";
181                         compatible = "ns16550";
182                         reg = <0x4600 0x100>;
183                         clock-frequency = <0>;          // from bootloader
184                         interrupts = <10 0x8>;
185                         interrupt-parent = <&ipic>;
186                 };
187
188                 crypto@30000 {
189                         compatible = "fsl,sec2.0";
190                         reg = <0x30000 0x10000>;
191                         interrupts = <11 0x8>;
192                         interrupt-parent = <&ipic>;
193                         fsl,num-channels = <4>;
194                         fsl,channel-fifo-len = <24>;
195                         fsl,exec-units-mask = <0x7e>;
196                         fsl,descriptor-types-mask = <0x01010ebf>;
197                 };
198
199                 ipic: pic@700 {
200                         interrupt-controller;
201                         #address-cells = <0>;
202                         #interrupt-cells = <2>;
203                         reg = <0x700 0x100>;
204                         device_type = "ipic";
205                 };
206         };
207
208         pci0: pci@e0008600 {
209                 cell-index = <2>;
210                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
211                 interrupt-map = <
212                                 /* IDSEL 0x0F - PCI Slot */
213                                 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
214                                 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
215                                  >;
216                 interrupt-parent = <&ipic>;
217                 interrupts = <67 0x8>;
218                 bus-range = <0x1 0x1>;
219                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
220                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
221                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
222                 clock-frequency = <66666666>;
223                 #interrupt-cells = <1>;
224                 #size-cells = <2>;
225                 #address-cells = <3>;
226                 reg = <0xe0008600 0x100>;
227                 compatible = "fsl,mpc8349-pci";
228                 device_type = "pci";
229         };
230 };