arch/powerpc/boot/dts/mpc8313erdb.dts

   1 /*
   2  * MPC8313E RDB Device Tree Source
   3  *
   4  * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8313ERDB";
  14         compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #cpus = <1>;
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22
  23                 PowerPC,8313@0 {
  24                         device_type = "cpu";
  25                         reg = <0>;
  26                         d-cache-line-size = <20>;       // 32 bytes
  27                         i-cache-line-size = <20>;       // 32 bytes
  28                         d-cache-size = <4000>;          // L1, 16K
  29                         i-cache-size = <4000>;          // L1, 16K
  30                         timebase-frequency = <0>;       // from bootloader
  31                         bus-frequency = <0>;            // from bootloader
  32                         clock-frequency = <0>;          // from bootloader
  33                         32-bit;
  34                 };
  35         };
  36
  37         memory {
  38                 device_type = "memory";
  39                 reg = <00000000 08000000>;      // 128MB at 0
  40         };
  41
  42         soc8313@e0000000 {
  43                 #address-cells = <1>;
  44                 #size-cells = <1>;
  45                 #interrupt-cells = <2>;
  46                 device_type = "soc";
  47                 ranges = <0 e0000000 00100000>;
  48                 reg = <e0000000 00000200>;
  49                 bus-frequency = <0>;
  50
  51                 wdt@200 {
  52                         device_type = "watchdog";
  53                         compatible = "mpc83xx_wdt";
  54                         reg = <200 100>;
  55                 };
  56
  57                 i2c@3000 {
  58                         device_type = "i2c";
  59                         compatible = "fsl-i2c";
  60                         reg = <3000 100>;
  61                         interrupts = <e 8>;
  62                         interrupt-parent = < &ipic >;
  63                         dfsrr;
  64                 };
  65
  66                 i2c@3100 {
  67                         device_type = "i2c";
  68                         compatible = "fsl-i2c";
  69                         reg = <3100 100>;
  70                         interrupts = <f 8>;
  71                         interrupt-parent = < &ipic >;
  72                         dfsrr;
  73                 };
  74
  75                 spi@7000 {
  76                         device_type = "spi";
  77                         compatible = "mpc83xx_spi";
  78                         reg = <7000 1000>;
  79                         interrupts = <10 8>;
  80                         interrupt-parent = < &ipic >;
  81                         mode = <0>;
  82                 };
  83
  84                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  85                 usb@23000 {
  86                         device_type = "usb";
  87                         compatible = "fsl-usb2-dr";
  88                         reg = <23000 1000>;
  89                         #address-cells = <1>;
  90                         #size-cells = <0>;
  91                         interrupt-parent = < &ipic >;
  92                         interrupts = <26 8>;
  93                         phy_type = "utmi_wide";
  94                 };
  95
  96                 mdio@24520 {
  97                         device_type = "mdio";
  98                         compatible = "gianfar";
  99                         reg = <24520 20>;
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102                         phy1: ethernet-phy@1 {
 103                                 interrupt-parent = < &ipic >;
 104                                 interrupts = <13 8>;
 105                                 reg = <1>;
 106                                 device_type = "ethernet-phy";
 107                         };
 108                         phy4: ethernet-phy@4 {
 109                                 interrupt-parent = < &ipic >;
 110                                 interrupts = <14 8>;
 111                                 reg = <4>;
 112                                 device_type = "ethernet-phy";
 113                         };
 114                 };
 115
 116                 ethernet@24000 {
 117                         device_type = "network";
 118                         model = "eTSEC";
 119                         compatible = "gianfar";
 120                         reg = <24000 1000>;
 121                         local-mac-address = [ 00 00 00 00 00 00 ];
 122                         interrupts = <25 8 24 8 23 8>;
 123                         interrupt-parent = < &ipic >;
 124                         phy-handle = < &phy1 >;
 125                 };
 126
 127                 ethernet@25000 {
 128                         device_type = "network";
 129                         model = "eTSEC";
 130                         compatible = "gianfar";
 131                         reg = <25000 1000>;
 132                         local-mac-address = [ 00 00 00 00 00 00 ];
 133                         interrupts = <22 8 21 8 20 8>;
 134                         interrupt-parent = < &ipic >;
 135                         phy-handle = < &phy4 >;
 136                 };
 137
 138                 serial@4500 {
 139                         device_type = "serial";
 140                         compatible = "ns16550";
 141                         reg = <4500 100>;
 142                         clock-frequency = <0>;
 143                         interrupts = <9 8>;
 144                         interrupt-parent = < &ipic >;
 145                 };
 146
 147                 serial@4600 {
 148                         device_type = "serial";
 149                         compatible = "ns16550";
 150                         reg = <4600 100>;
 151                         clock-frequency = <0>;
 152                         interrupts = <a 8>;
 153                         interrupt-parent = < &ipic >;
 154                 };
 155
 156                 pci@8500 {
 157                         interrupt-map-mask = <f800 0 0 7>;
 158                         interrupt-map = <
 159
 160                                         /* IDSEL 0x0E -mini PCI */
 161                                          7000 0 0 1 &ipic 12 8
 162                                          7000 0 0 2 &ipic 12 8
 163                                          7000 0 0 3 &ipic 12 8
 164                                          7000 0 0 4 &ipic 12 8
 165
 166                                         /* IDSEL 0x0F - PCI slot */
 167                                          7800 0 0 1 &ipic 11 8
 168                                          7800 0 0 2 &ipic 12 8
 169                                          7800 0 0 3 &ipic 11 8
 170                                          7800 0 0 4 &ipic 12 8>;
 171                         interrupt-parent = < &ipic >;
 172                         interrupts = <42 8>;
 173                         bus-range = <0 0>;
 174                         ranges = <02000000 0 90000000 90000000 0 10000000
 175                                   42000000 0 80000000 80000000 0 10000000
 176                                   01000000 0 00000000 e2000000 0 00100000>;
 177                         clock-frequency = <3f940aa>;
 178                         #interrupt-cells = <1>;
 179                         #size-cells = <2>;
 180                         #address-cells = <3>;
 181                         reg = <8500 100>;
 182                         compatible = "83xx";
 183                         device_type = "pci";
 184                 };
 185
 186                 crypto@30000 {
 187                         device_type = "crypto";
 188                         model = "SEC2";
 189                         compatible = "talitos";
 190                         reg = <30000 7000>;
 191                         interrupts = <b 8>;
 192                         interrupt-parent = < &ipic >;
 193                         /* Rev. 2.2 */
 194                         num-channels = <1>;
 195                         channel-fifo-len = <18>;
 196                         exec-units-mask = <0000004c>;
 197                         descriptor-types-mask = <0122003f>;
 198                 };
 199
 200                 /* IPIC
 201                  * interrupts cell = <intr #, sense>
 202                  * sense values match linux IORESOURCE_IRQ_* defines:
 203                  * sense == 8: Level, low assertion
 204                  * sense == 2: Edge, high-to-low change
 205                  */
 206                 ipic: pic@700 {
 207                         interrupt-controller;
 208                         #address-cells = <0>;
 209                         #interrupt-cells = <2>;
 210                         reg = <700 100>;
 211                         built-in;
 212                         device_type = "ipic";
 213                 };
 214         };
 215 };