arch/powerpc/boot/dts/haleakala.dts

   1 /*
   2  * Device Tree Source for AMCC Haleakala (405EXr)
   3  *
   4  * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without
   8  * any warranty of any kind, whether express or implied.
   9  */
  10
  11 /dts-v1/;
  12
  13 / {
  14         #address-cells = <1>;
  15         #size-cells = <1>;
  16         model = "amcc,haleakala";
  17         compatible = "amcc,haleakala", "amcc,kilauea";
  18         dcr-parent = <&{/cpus/cpu@0}>;
  19
  20         aliases {
  21                 ethernet0 = &EMAC0;
  22                 serial0 = &UART0;
  23                 serial1 = &UART1;
  24         };
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 cpu@0 {
  31                         device_type = "cpu";
  32                         model = "PowerPC,405EXr";
  33                         reg = <0x00000000>;
  34                         clock-frequency = <0>; /* Filled in by U-Boot */
  35                         timebase-frequency = <0>; /* Filled in by U-Boot */
  36                         i-cache-line-size = <32>;
  37                         d-cache-line-size = <32>;
  38                         i-cache-size = <16384>; /* 16 kB */
  39                         d-cache-size = <16384>; /* 16 kB */
  40                         dcr-controller;
  41                         dcr-access-method = "native";
  42                 };
  43         };
  44
  45         memory {
  46                 device_type = "memory";
  47                 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
  48         };
  49
  50         UIC0: interrupt-controller {
  51                 compatible = "ibm,uic-405exr", "ibm,uic";
  52                 interrupt-controller;
  53                 cell-index = <0>;
  54                 dcr-reg = <0x0c0 0x009>;
  55                 #address-cells = <0>;
  56                 #size-cells = <0>;
  57                 #interrupt-cells = <2>;
  58         };
  59
  60         UIC1: interrupt-controller1 {
  61                 compatible = "ibm,uic-405exr","ibm,uic";
  62                 interrupt-controller;
  63                 cell-index = <1>;
  64                 dcr-reg = <0x0d0 0x009>;
  65                 #address-cells = <0>;
  66                 #size-cells = <0>;
  67                 #interrupt-cells = <2>;
  68                 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  69                 interrupt-parent = <&UIC0>;
  70         };
  71
  72         UIC2: interrupt-controller2 {
  73                 compatible = "ibm,uic-405exr","ibm,uic";
  74                 interrupt-controller;
  75                 cell-index = <2>;
  76                 dcr-reg = <0x0e0 0x009>;
  77                 #address-cells = <0>;
  78                 #size-cells = <0>;
  79                 #interrupt-cells = <2>;
  80                 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
  81                 interrupt-parent = <&UIC0>;
  82         };
  83
  84         plb {
  85                 compatible = "ibm,plb-405exr", "ibm,plb4";
  86                 #address-cells = <1>;
  87                 #size-cells = <1>;
  88                 ranges;
  89                 clock-frequency = <0>; /* Filled in by U-Boot */
  90
  91                 SDRAM0: memory-controller {
  92                         compatible = "ibm,sdram-405exr";
  93                         dcr-reg = <0x010 0x002>;
  94                 };
  95
  96                 MAL0: mcmal {
  97                         compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
  98                         dcr-reg = <0x180 0x062>;
  99                         num-tx-chans = <2>;
 100                         num-rx-chans = <2>;
 101                         interrupt-parent = <&MAL0>;
 102                         interrupts = <0x0 0x1 0x2 0x3 0x4>;
 103                         #interrupt-cells = <1>;
 104                         #address-cells = <0>;
 105                         #size-cells = <0>;
 106                         interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
 107                                         /*RXEOB*/ 0x1 &UIC0 0xb 0x4
 108                                         /*SERR*/  0x2 &UIC1 0x0 0x4
 109                                         /*TXDE*/  0x3 &UIC1 0x1 0x4
 110                                         /*RXDE*/  0x4 &UIC1 0x2 0x4>;
 111                         interrupt-map-mask = <0xffffffff>;
 112                 };
 113
 114                 POB0: opb {
 115                         compatible = "ibm,opb-405exr", "ibm,opb";
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         ranges = <0x80000000 0x80000000 0x10000000
 119                                   0xef600000 0xef600000 0x00a00000
 120                                   0xf0000000 0xf0000000 0x10000000>;
 121                         dcr-reg = <0x0a0 0x005>;
 122                         clock-frequency = <0>; /* Filled in by U-Boot */
 123
 124                         EBC0: ebc {
 125                                 compatible = "ibm,ebc-405exr", "ibm,ebc";
 126                                 dcr-reg = <0x012 0x002>;
 127                                 #address-cells = <2>;
 128                                 #size-cells = <1>;
 129                                 clock-frequency = <0>; /* Filled in by U-Boot */
 130                                 /* ranges property is supplied by U-Boot */
 131                                 interrupts = <0x5 0x1>;
 132                                 interrupt-parent = <&UIC1>;
 133
 134                                 nor_flash@0,0 {
 135                                         compatible = "amd,s29gl512n", "cfi-flash";
 136                                         bank-width = <2>;
 137                                         reg = <0x00000000 0x00000000 0x04000000>;
 138                                         #address-cells = <1>;
 139                                         #size-cells = <1>;
 140                                         partition@0 {
 141                                                 label = "kernel";
 142                                                 reg = <0x00000000 0x00200000>;
 143                                         };
 144                                         partition@200000 {
 145                                                 label = "root";
 146                                                 reg = <0x00200000 0x00200000>;
 147                                         };
 148                                         partition@400000 {
 149                                                 label = "user";
 150                                                 reg = <0x00400000 0x03b60000>;
 151                                         };
 152                                         partition@3f60000 {
 153                                                 label = "env";
 154                                                 reg = <0x03f60000 0x00040000>;
 155                                         };
 156                                         partition@3fa0000 {
 157                                                 label = "u-boot";
 158                                                 reg = <0x03fa0000 0x00060000>;
 159                                         };
 160                                 };
 161                         };
 162
 163                         UART0: serial@ef600200 {
 164                                 device_type = "serial";
 165                                 compatible = "ns16550";
 166                                 reg = <0xef600200 0x00000008>;
 167                                 virtual-reg = <0xef600200>;
 168                                 clock-frequency = <0>; /* Filled in by U-Boot */
 169                                 current-speed = <0>;
 170                                 interrupt-parent = <&UIC0>;
 171                                 interrupts = <0x1a 0x4>;
 172                         };
 173
 174                         UART1: serial@ef600300 {
 175                                 device_type = "serial";
 176                                 compatible = "ns16550";
 177                                 reg = <0xef600300 0x00000008>;
 178                                 virtual-reg = <0xef600300>;
 179                                 clock-frequency = <0>; /* Filled in by U-Boot */
 180                                 current-speed = <0>;
 181                                 interrupt-parent = <&UIC0>;
 182                                 interrupts = <0x1 0x4>;
 183                         };
 184
 185                         IIC0: i2c@ef600400 {
 186                                 compatible = "ibm,iic-405exr", "ibm,iic";
 187                                 reg = <0xef600400 0x00000014>;
 188                                 interrupt-parent = <&UIC0>;
 189                                 interrupts = <0x2 0x4>;
 190                         };
 191
 192                         IIC1: i2c@ef600500 {
 193                                 compatible = "ibm,iic-405exr", "ibm,iic";
 194                                 reg = <0xef600500 0x00000014>;
 195                                 interrupt-parent = <&UIC0>;
 196                                 interrupts = <0x7 0x4>;
 197                         };
 198
 199
 200                         RGMII0: emac-rgmii@ef600b00 {
 201                                 compatible = "ibm,rgmii-405exr", "ibm,rgmii";
 202                                 reg = <0xef600b00 0x00000104>;
 203                                 has-mdio;
 204                         };
 205
 206                         EMAC0: ethernet@ef600900 {
 207                                 linux,network-index = <0x0>;
 208                                 device_type = "network";
 209                                 compatible = "ibm,emac-405exr", "ibm,emac4sync";
 210                                 interrupt-parent = <&EMAC0>;
 211                                 interrupts = <0x0 0x1>;
 212                                 #interrupt-cells = <1>;
 213                                 #address-cells = <0>;
 214                                 #size-cells = <0>;
 215                                 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
 216                                                 /*Wake*/  0x1 &UIC1 0x1d 0x4>;
 217                                 reg = <0xef600900 0x000000c4>;
 218                                 local-mac-address = [000000000000]; /* Filled in by U-Boot */
 219                                 mal-device = <&MAL0>;
 220                                 mal-tx-channel = <0>;
 221                                 mal-rx-channel = <0>;
 222                                 cell-index = <0>;
 223                                 max-frame-size = <9000>;
 224                                 rx-fifo-size = <4096>;
 225                                 tx-fifo-size = <2048>;
 226                                 phy-mode = "rgmii";
 227                                 phy-map = <0x00000000>;
 228                                 rgmii-device = <&RGMII0>;
 229                                 rgmii-channel = <0>;
 230                                 has-inverted-stacr-oc;
 231                                 has-new-stacr-staopc;
 232                         };
 233                 };
 234
 235                 PCIE0: pciex@0a0000000 {
 236                         device_type = "pci";
 237                         #interrupt-cells = <1>;
 238                         #size-cells = <2>;
 239                         #address-cells = <3>;
 240                         compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
 241                         primary;
 242                         port = <0x0>; /* port number */
 243                         reg = <0xa0000000 0x20000000    /* Config space access */
 244                                0xef000000 0x00001000>;  /* Registers */
 245                         dcr-reg = <0x040 0x020>;
 246                         sdr-base = <0x400>;
 247
 248                         /* Outbound ranges, one memory and one IO,
 249                          * later cannot be changed
 250                          */
 251                         ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
 252                                   0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
 253
 254                         /* Inbound 2GB range starting at 0 */
 255                         dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
 256
 257                         /* This drives busses 0x00 to 0x3f */
 258                         bus-range = <0x0 0x3f>;
 259
 260                         /* Legacy interrupts (note the weird polarity, the bridge seems
 261                          * to invert PCIe legacy interrupts).
 262                          * We are de-swizzling here because the numbers are actually for
 263                          * port of the root complex virtual P2P bridge. But I want
 264                          * to avoid putting a node for it in the tree, so the numbers
 265                          * below are basically de-swizzled numbers.
 266                          * The real slot is on idsel 0, so the swizzling is 1:1
 267                          */
 268                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 269                         interrupt-map = <
 270                                 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
 271                                 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
 272                                 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
 273                                 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
 274                 };
 275         };
 276 };