arch/mn10300/include/asm/irqflags.h

   1 /* MN10300 IRQ flag handling
   2  *
   3  * Copyright (C) 2010 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11
  12 #ifndef _ASM_IRQFLAGS_H
  13 #define _ASM_IRQFLAGS_H
  14
  15 #include <asm/cpu-regs.h>
  16
  17 /*
  18  * interrupt control
  19  * - "disabled": run in IM1/2
  20  *   - level 0 - GDB stub
  21  *   - level 1 - virtual serial DMA (if present)
  22  *   - level 5 - normal interrupt priority
  23  *   - level 6 - timer interrupt
  24  * - "enabled":  run in IM7
  25  */
  26 #ifdef CONFIG_MN10300_TTYSM
  27 #define MN10300_CLI_LEVEL       EPSW_IM_2
  28 #else
  29 #define MN10300_CLI_LEVEL       EPSW_IM_1
  30 #endif
  31
  32 #ifndef __ASSEMBLY__
  33
  34 static inline unsigned long arch_local_save_flags(void)
  35 {
  36         unsigned long flags;
  37
  38         asm volatile("mov epsw,%0" : "=d"(flags));
  39         return flags;
  40 }
  41
  42 static inline void arch_local_irq_disable(void)
  43 {
  44         asm volatile(
  45                 "       and %0,epsw     \n"
  46                 "       or %1,epsw      \n"
  47                 "       nop             \n"
  48                 "       nop             \n"
  49                 "       nop             \n"
  50                 :
  51                 : "i"(~EPSW_IM), "i"(EPSW_IE | MN10300_CLI_LEVEL)
  52                 : "memory");
  53 }
  54
  55 static inline unsigned long arch_local_irq_save(void)
  56 {
  57         unsigned long flags;
  58
  59         flags = arch_local_save_flags();
  60         arch_local_irq_disable();
  61         return flags;
  62 }
  63
  64 /*
  65  * we make sure arch_irq_enable() doesn't cause priority inversion
  66  */
  67 extern unsigned long __mn10300_irq_enabled_epsw;
  68
  69 static inline void arch_local_irq_enable(void)
  70 {
  71         unsigned long tmp;
  72
  73         asm volatile(
  74                 "       mov     epsw,%0         \n"
  75                 "       and     %1,%0           \n"
  76                 "       or      %2,%0           \n"
  77                 "       mov     %0,epsw         \n"
  78                 : "=&d"(tmp)
  79                 : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw)
  80                 : "memory");
  81 }
  82
  83 static inline void arch_local_irq_restore(unsigned long flags)
  84 {
  85         asm volatile(
  86                 "       mov %0,epsw     \n"
  87                 "       nop             \n"
  88                 "       nop             \n"
  89                 "       nop             \n"
  90                 :
  91                 : "d"(flags)
  92                 : "memory", "cc");
  93 }
  94
  95 static inline bool arch_irqs_disabled_flags(unsigned long flags)
  96 {
  97         return (flags & EPSW_IM) <= MN10300_CLI_LEVEL;
  98 }
  99
 100 static inline bool arch_irqs_disabled(void)
 101 {
 102         return arch_irqs_disabled_flags(arch_local_save_flags());
 103 }
 104
 105 /*
 106  * Hook to save power by halting the CPU
 107  * - called from the idle loop
 108  * - must reenable interrupts (which takes three instruction cycles to complete)
 109  */
 110 static inline void arch_safe_halt(void)
 111 {
 112         asm volatile(
 113                 "       or      %0,epsw \n"
 114                 "       nop             \n"
 115                 "       nop             \n"
 116                 "       bset    %2,(%1) \n"
 117                 :
 118                 : "i"(EPSW_IE|EPSW_IM), "n"(&CPUM), "i"(CPUM_SLEEP)
 119                 : "cc");
 120 }
 121
 122 #endif /* __ASSEMBLY__ */
 123 #endif /* _ASM_IRQFLAGS_H */