arch/mips/include/asm/octeon/cvmx-ciu-defs.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (c) 2003-2010 Cavium Networks
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
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  20  * along with this file; if not, write to the Free Software
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  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 #ifndef __CVMX_CIU_DEFS_H__
  29 #define __CVMX_CIU_DEFS_H__
  30
  31 #define CVMX_CIU_BIST (CVMX_ADD_IO_SEG(0x0001070000000730ull))
  32 #define CVMX_CIU_BLOCK_INT (CVMX_ADD_IO_SEG(0x00010700000007C0ull))
  33 #define CVMX_CIU_DINT (CVMX_ADD_IO_SEG(0x0001070000000720ull))
  34 #define CVMX_CIU_FUSE (CVMX_ADD_IO_SEG(0x0001070000000728ull))
  35 #define CVMX_CIU_GSTOP (CVMX_ADD_IO_SEG(0x0001070000000710ull))
  36 #define CVMX_CIU_INT33_SUM0 (CVMX_ADD_IO_SEG(0x0001070000000110ull))
  37 #define CVMX_CIU_INTX_EN0(offset) (CVMX_ADD_IO_SEG(0x0001070000000200ull) + ((offset) & 63) * 16)
  38 #define CVMX_CIU_INTX_EN0_W1C(offset) (CVMX_ADD_IO_SEG(0x0001070000002200ull) + ((offset) & 63) * 16)
  39 #define CVMX_CIU_INTX_EN0_W1S(offset) (CVMX_ADD_IO_SEG(0x0001070000006200ull) + ((offset) & 63) * 16)
  40 #define CVMX_CIU_INTX_EN1(offset) (CVMX_ADD_IO_SEG(0x0001070000000208ull) + ((offset) & 63) * 16)
  41 #define CVMX_CIU_INTX_EN1_W1C(offset) (CVMX_ADD_IO_SEG(0x0001070000002208ull) + ((offset) & 63) * 16)
  42 #define CVMX_CIU_INTX_EN1_W1S(offset) (CVMX_ADD_IO_SEG(0x0001070000006208ull) + ((offset) & 63) * 16)
  43 #define CVMX_CIU_INTX_EN4_0(offset) (CVMX_ADD_IO_SEG(0x0001070000000C80ull) + ((offset) & 15) * 16)
  44 #define CVMX_CIU_INTX_EN4_0_W1C(offset) (CVMX_ADD_IO_SEG(0x0001070000002C80ull) + ((offset) & 15) * 16)
  45 #define CVMX_CIU_INTX_EN4_0_W1S(offset) (CVMX_ADD_IO_SEG(0x0001070000006C80ull) + ((offset) & 15) * 16)
  46 #define CVMX_CIU_INTX_EN4_1(offset) (CVMX_ADD_IO_SEG(0x0001070000000C88ull) + ((offset) & 15) * 16)
  47 #define CVMX_CIU_INTX_EN4_1_W1C(offset) (CVMX_ADD_IO_SEG(0x0001070000002C88ull) + ((offset) & 15) * 16)
  48 #define CVMX_CIU_INTX_EN4_1_W1S(offset) (CVMX_ADD_IO_SEG(0x0001070000006C88ull) + ((offset) & 15) * 16)
  49 #define CVMX_CIU_INTX_SUM0(offset) (CVMX_ADD_IO_SEG(0x0001070000000000ull) + ((offset) & 63) * 8)
  50 #define CVMX_CIU_INTX_SUM4(offset) (CVMX_ADD_IO_SEG(0x0001070000000C00ull) + ((offset) & 15) * 8)
  51 #define CVMX_CIU_INT_DBG_SEL (CVMX_ADD_IO_SEG(0x00010700000007D0ull))
  52 #define CVMX_CIU_INT_SUM1 (CVMX_ADD_IO_SEG(0x0001070000000108ull))
  53 #define CVMX_CIU_MBOX_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001070000000680ull) + ((offset) & 15) * 8)
  54 #define CVMX_CIU_MBOX_SETX(offset) (CVMX_ADD_IO_SEG(0x0001070000000600ull) + ((offset) & 15) * 8)
  55 #define CVMX_CIU_NMI (CVMX_ADD_IO_SEG(0x0001070000000718ull))
  56 #define CVMX_CIU_PCI_INTA (CVMX_ADD_IO_SEG(0x0001070000000750ull))
  57 #define CVMX_CIU_PP_DBG (CVMX_ADD_IO_SEG(0x0001070000000708ull))
  58 #define CVMX_CIU_PP_POKEX(offset) (CVMX_ADD_IO_SEG(0x0001070000000580ull) + ((offset) & 15) * 8)
  59 #define CVMX_CIU_PP_RST (CVMX_ADD_IO_SEG(0x0001070000000700ull))
  60 #define CVMX_CIU_QLM0 (CVMX_ADD_IO_SEG(0x0001070000000780ull))
  61 #define CVMX_CIU_QLM1 (CVMX_ADD_IO_SEG(0x0001070000000788ull))
  62 #define CVMX_CIU_QLM2 (CVMX_ADD_IO_SEG(0x0001070000000790ull))
  63 #define CVMX_CIU_QLM_DCOK (CVMX_ADD_IO_SEG(0x0001070000000760ull))
  64 #define CVMX_CIU_QLM_JTGC (CVMX_ADD_IO_SEG(0x0001070000000768ull))
  65 #define CVMX_CIU_QLM_JTGD (CVMX_ADD_IO_SEG(0x0001070000000770ull))
  66 #define CVMX_CIU_SOFT_BIST (CVMX_ADD_IO_SEG(0x0001070000000738ull))
  67 #define CVMX_CIU_SOFT_PRST (CVMX_ADD_IO_SEG(0x0001070000000748ull))
  68 #define CVMX_CIU_SOFT_PRST1 (CVMX_ADD_IO_SEG(0x0001070000000758ull))
  69 #define CVMX_CIU_SOFT_RST (CVMX_ADD_IO_SEG(0x0001070000000740ull))
  70 #define CVMX_CIU_TIMX(offset) (CVMX_ADD_IO_SEG(0x0001070000000480ull) + ((offset) & 3) * 8)
  71 #define CVMX_CIU_WDOGX(offset) (CVMX_ADD_IO_SEG(0x0001070000000500ull) + ((offset) & 15) * 8)
  72
  73 union cvmx_ciu_bist {
  74         uint64_t u64;
  75         struct cvmx_ciu_bist_s {
  76                 uint64_t reserved_5_63:59;
  77                 uint64_t bist:5;
  78         } s;
  79         struct cvmx_ciu_bist_cn30xx {
  80                 uint64_t reserved_4_63:60;
  81                 uint64_t bist:4;
  82         } cn30xx;
  83         struct cvmx_ciu_bist_cn30xx cn31xx;
  84         struct cvmx_ciu_bist_cn30xx cn38xx;
  85         struct cvmx_ciu_bist_cn30xx cn38xxp2;
  86         struct cvmx_ciu_bist_cn50xx {
  87                 uint64_t reserved_2_63:62;
  88                 uint64_t bist:2;
  89         } cn50xx;
  90         struct cvmx_ciu_bist_cn52xx {
  91                 uint64_t reserved_3_63:61;
  92                 uint64_t bist:3;
  93         } cn52xx;
  94         struct cvmx_ciu_bist_cn52xx cn52xxp1;
  95         struct cvmx_ciu_bist_cn30xx cn56xx;
  96         struct cvmx_ciu_bist_cn30xx cn56xxp1;
  97         struct cvmx_ciu_bist_cn30xx cn58xx;
  98         struct cvmx_ciu_bist_cn30xx cn58xxp1;
  99         struct cvmx_ciu_bist_s cn63xx;
 100         struct cvmx_ciu_bist_s cn63xxp1;
 101 };
 102
 103 union cvmx_ciu_block_int {
 104         uint64_t u64;
 105         struct cvmx_ciu_block_int_s {
 106                 uint64_t reserved_43_63:21;
 107                 uint64_t ptp:1;
 108                 uint64_t dpi:1;
 109                 uint64_t dfm:1;
 110                 uint64_t reserved_34_39:6;
 111                 uint64_t srio1:1;
 112                 uint64_t srio0:1;
 113                 uint64_t reserved_31_31:1;
 114                 uint64_t iob:1;
 115                 uint64_t reserved_29_29:1;
 116                 uint64_t agl:1;
 117                 uint64_t reserved_27_27:1;
 118                 uint64_t pem1:1;
 119                 uint64_t pem0:1;
 120                 uint64_t reserved_23_24:2;
 121                 uint64_t asxpcs0:1;
 122                 uint64_t reserved_21_21:1;
 123                 uint64_t pip:1;
 124                 uint64_t reserved_18_19:2;
 125                 uint64_t lmc0:1;
 126                 uint64_t l2c:1;
 127                 uint64_t reserved_15_15:1;
 128                 uint64_t rad:1;
 129                 uint64_t usb:1;
 130                 uint64_t pow:1;
 131                 uint64_t tim:1;
 132                 uint64_t pko:1;
 133                 uint64_t ipd:1;
 134                 uint64_t reserved_8_8:1;
 135                 uint64_t zip:1;
 136                 uint64_t dfa:1;
 137                 uint64_t fpa:1;
 138                 uint64_t key:1;
 139                 uint64_t sli:1;
 140                 uint64_t reserved_2_2:1;
 141                 uint64_t gmx0:1;
 142                 uint64_t mio:1;
 143         } s;
 144         struct cvmx_ciu_block_int_s cn63xx;
 145         struct cvmx_ciu_block_int_s cn63xxp1;
 146 };
 147
 148 union cvmx_ciu_dint {
 149         uint64_t u64;
 150         struct cvmx_ciu_dint_s {
 151                 uint64_t reserved_16_63:48;
 152                 uint64_t dint:16;
 153         } s;
 154         struct cvmx_ciu_dint_cn30xx {
 155                 uint64_t reserved_1_63:63;
 156                 uint64_t dint:1;
 157         } cn30xx;
 158         struct cvmx_ciu_dint_cn31xx {
 159                 uint64_t reserved_2_63:62;
 160                 uint64_t dint:2;
 161         } cn31xx;
 162         struct cvmx_ciu_dint_s cn38xx;
 163         struct cvmx_ciu_dint_s cn38xxp2;
 164         struct cvmx_ciu_dint_cn31xx cn50xx;
 165         struct cvmx_ciu_dint_cn52xx {
 166                 uint64_t reserved_4_63:60;
 167                 uint64_t dint:4;
 168         } cn52xx;
 169         struct cvmx_ciu_dint_cn52xx cn52xxp1;
 170         struct cvmx_ciu_dint_cn56xx {
 171                 uint64_t reserved_12_63:52;
 172                 uint64_t dint:12;
 173         } cn56xx;
 174         struct cvmx_ciu_dint_cn56xx cn56xxp1;
 175         struct cvmx_ciu_dint_s cn58xx;
 176         struct cvmx_ciu_dint_s cn58xxp1;
 177         struct cvmx_ciu_dint_cn63xx {
 178                 uint64_t reserved_6_63:58;
 179                 uint64_t dint:6;
 180         } cn63xx;
 181         struct cvmx_ciu_dint_cn63xx cn63xxp1;
 182 };
 183
 184 union cvmx_ciu_fuse {
 185         uint64_t u64;
 186         struct cvmx_ciu_fuse_s {
 187                 uint64_t reserved_16_63:48;
 188                 uint64_t fuse:16;
 189         } s;
 190         struct cvmx_ciu_fuse_cn30xx {
 191                 uint64_t reserved_1_63:63;
 192                 uint64_t fuse:1;
 193         } cn30xx;
 194         struct cvmx_ciu_fuse_cn31xx {
 195                 uint64_t reserved_2_63:62;
 196                 uint64_t fuse:2;
 197         } cn31xx;
 198         struct cvmx_ciu_fuse_s cn38xx;
 199         struct cvmx_ciu_fuse_s cn38xxp2;
 200         struct cvmx_ciu_fuse_cn31xx cn50xx;
 201         struct cvmx_ciu_fuse_cn52xx {
 202                 uint64_t reserved_4_63:60;
 203                 uint64_t fuse:4;
 204         } cn52xx;
 205         struct cvmx_ciu_fuse_cn52xx cn52xxp1;
 206         struct cvmx_ciu_fuse_cn56xx {
 207                 uint64_t reserved_12_63:52;
 208                 uint64_t fuse:12;
 209         } cn56xx;
 210         struct cvmx_ciu_fuse_cn56xx cn56xxp1;
 211         struct cvmx_ciu_fuse_s cn58xx;
 212         struct cvmx_ciu_fuse_s cn58xxp1;
 213         struct cvmx_ciu_fuse_cn63xx {
 214                 uint64_t reserved_6_63:58;
 215                 uint64_t fuse:6;
 216         } cn63xx;
 217         struct cvmx_ciu_fuse_cn63xx cn63xxp1;
 218 };
 219
 220 union cvmx_ciu_gstop {
 221         uint64_t u64;
 222         struct cvmx_ciu_gstop_s {
 223                 uint64_t reserved_1_63:63;
 224                 uint64_t gstop:1;
 225         } s;
 226         struct cvmx_ciu_gstop_s cn30xx;
 227         struct cvmx_ciu_gstop_s cn31xx;
 228         struct cvmx_ciu_gstop_s cn38xx;
 229         struct cvmx_ciu_gstop_s cn38xxp2;
 230         struct cvmx_ciu_gstop_s cn50xx;
 231         struct cvmx_ciu_gstop_s cn52xx;
 232         struct cvmx_ciu_gstop_s cn52xxp1;
 233         struct cvmx_ciu_gstop_s cn56xx;
 234         struct cvmx_ciu_gstop_s cn56xxp1;
 235         struct cvmx_ciu_gstop_s cn58xx;
 236         struct cvmx_ciu_gstop_s cn58xxp1;
 237         struct cvmx_ciu_gstop_s cn63xx;
 238         struct cvmx_ciu_gstop_s cn63xxp1;
 239 };
 240
 241 union cvmx_ciu_intx_en0 {
 242         uint64_t u64;
 243         struct cvmx_ciu_intx_en0_s {
 244                 uint64_t bootdma:1;
 245                 uint64_t mii:1;
 246                 uint64_t ipdppthr:1;
 247                 uint64_t powiq:1;
 248                 uint64_t twsi2:1;
 249                 uint64_t mpi:1;
 250                 uint64_t pcm:1;
 251                 uint64_t usb:1;
 252                 uint64_t timer:4;
 253                 uint64_t key_zero:1;
 254                 uint64_t ipd_drp:1;
 255                 uint64_t gmx_drp:2;
 256                 uint64_t trace:1;
 257                 uint64_t rml:1;
 258                 uint64_t twsi:1;
 259                 uint64_t reserved_44_44:1;
 260                 uint64_t pci_msi:4;
 261                 uint64_t pci_int:4;
 262                 uint64_t uart:2;
 263                 uint64_t mbox:2;
 264                 uint64_t gpio:16;
 265                 uint64_t workq:16;
 266         } s;
 267         struct cvmx_ciu_intx_en0_cn30xx {
 268                 uint64_t reserved_59_63:5;
 269                 uint64_t mpi:1;
 270                 uint64_t pcm:1;
 271                 uint64_t usb:1;
 272                 uint64_t timer:4;
 273                 uint64_t reserved_51_51:1;
 274                 uint64_t ipd_drp:1;
 275                 uint64_t reserved_49_49:1;
 276                 uint64_t gmx_drp:1;
 277                 uint64_t reserved_47_47:1;
 278                 uint64_t rml:1;
 279                 uint64_t twsi:1;
 280                 uint64_t reserved_44_44:1;
 281                 uint64_t pci_msi:4;
 282                 uint64_t pci_int:4;
 283                 uint64_t uart:2;
 284                 uint64_t mbox:2;
 285                 uint64_t gpio:16;
 286                 uint64_t workq:16;
 287         } cn30xx;
 288         struct cvmx_ciu_intx_en0_cn31xx {
 289                 uint64_t reserved_59_63:5;
 290                 uint64_t mpi:1;
 291                 uint64_t pcm:1;
 292                 uint64_t usb:1;
 293                 uint64_t timer:4;
 294                 uint64_t reserved_51_51:1;
 295                 uint64_t ipd_drp:1;
 296                 uint64_t reserved_49_49:1;
 297                 uint64_t gmx_drp:1;
 298                 uint64_t trace:1;
 299                 uint64_t rml:1;
 300                 uint64_t twsi:1;
 301                 uint64_t reserved_44_44:1;
 302                 uint64_t pci_msi:4;
 303                 uint64_t pci_int:4;
 304                 uint64_t uart:2;
 305                 uint64_t mbox:2;
 306                 uint64_t gpio:16;
 307                 uint64_t workq:16;
 308         } cn31xx;
 309         struct cvmx_ciu_intx_en0_cn38xx {
 310                 uint64_t reserved_56_63:8;
 311                 uint64_t timer:4;
 312                 uint64_t key_zero:1;
 313                 uint64_t ipd_drp:1;
 314                 uint64_t gmx_drp:2;
 315                 uint64_t trace:1;
 316                 uint64_t rml:1;
 317                 uint64_t twsi:1;
 318                 uint64_t reserved_44_44:1;
 319                 uint64_t pci_msi:4;
 320                 uint64_t pci_int:4;
 321                 uint64_t uart:2;
 322                 uint64_t mbox:2;
 323                 uint64_t gpio:16;
 324                 uint64_t workq:16;
 325         } cn38xx;
 326         struct cvmx_ciu_intx_en0_cn38xx cn38xxp2;
 327         struct cvmx_ciu_intx_en0_cn30xx cn50xx;
 328         struct cvmx_ciu_intx_en0_cn52xx {
 329                 uint64_t bootdma:1;
 330                 uint64_t mii:1;
 331                 uint64_t ipdppthr:1;
 332                 uint64_t powiq:1;
 333                 uint64_t twsi2:1;
 334                 uint64_t reserved_57_58:2;
 335                 uint64_t usb:1;
 336                 uint64_t timer:4;
 337                 uint64_t reserved_51_51:1;
 338                 uint64_t ipd_drp:1;
 339                 uint64_t reserved_49_49:1;
 340                 uint64_t gmx_drp:1;
 341                 uint64_t trace:1;
 342                 uint64_t rml:1;
 343                 uint64_t twsi:1;
 344                 uint64_t reserved_44_44:1;
 345                 uint64_t pci_msi:4;
 346                 uint64_t pci_int:4;
 347                 uint64_t uart:2;
 348                 uint64_t mbox:2;
 349                 uint64_t gpio:16;
 350                 uint64_t workq:16;
 351         } cn52xx;
 352         struct cvmx_ciu_intx_en0_cn52xx cn52xxp1;
 353         struct cvmx_ciu_intx_en0_cn56xx {
 354                 uint64_t bootdma:1;
 355                 uint64_t mii:1;
 356                 uint64_t ipdppthr:1;
 357                 uint64_t powiq:1;
 358                 uint64_t twsi2:1;
 359                 uint64_t reserved_57_58:2;
 360                 uint64_t usb:1;
 361                 uint64_t timer:4;
 362                 uint64_t key_zero:1;
 363                 uint64_t ipd_drp:1;
 364                 uint64_t gmx_drp:2;
 365                 uint64_t trace:1;
 366                 uint64_t rml:1;
 367                 uint64_t twsi:1;
 368                 uint64_t reserved_44_44:1;
 369                 uint64_t pci_msi:4;
 370                 uint64_t pci_int:4;
 371                 uint64_t uart:2;
 372                 uint64_t mbox:2;
 373                 uint64_t gpio:16;
 374                 uint64_t workq:16;
 375         } cn56xx;
 376         struct cvmx_ciu_intx_en0_cn56xx cn56xxp1;
 377         struct cvmx_ciu_intx_en0_cn38xx cn58xx;
 378         struct cvmx_ciu_intx_en0_cn38xx cn58xxp1;
 379         struct cvmx_ciu_intx_en0_cn52xx cn63xx;
 380         struct cvmx_ciu_intx_en0_cn52xx cn63xxp1;
 381 };
 382
 383 union cvmx_ciu_intx_en0_w1c {
 384         uint64_t u64;
 385         struct cvmx_ciu_intx_en0_w1c_s {
 386                 uint64_t bootdma:1;
 387                 uint64_t mii:1;
 388                 uint64_t ipdppthr:1;
 389                 uint64_t powiq:1;
 390                 uint64_t twsi2:1;
 391                 uint64_t reserved_57_58:2;
 392                 uint64_t usb:1;
 393                 uint64_t timer:4;
 394                 uint64_t key_zero:1;
 395                 uint64_t ipd_drp:1;
 396                 uint64_t gmx_drp:2;
 397                 uint64_t trace:1;
 398                 uint64_t rml:1;
 399                 uint64_t twsi:1;
 400                 uint64_t reserved_44_44:1;
 401                 uint64_t pci_msi:4;
 402                 uint64_t pci_int:4;
 403                 uint64_t uart:2;
 404                 uint64_t mbox:2;
 405                 uint64_t gpio:16;
 406                 uint64_t workq:16;
 407         } s;
 408         struct cvmx_ciu_intx_en0_w1c_cn52xx {
 409                 uint64_t bootdma:1;
 410                 uint64_t mii:1;
 411                 uint64_t ipdppthr:1;
 412                 uint64_t powiq:1;
 413                 uint64_t twsi2:1;
 414                 uint64_t reserved_57_58:2;
 415                 uint64_t usb:1;
 416                 uint64_t timer:4;
 417                 uint64_t reserved_51_51:1;
 418                 uint64_t ipd_drp:1;
 419                 uint64_t reserved_49_49:1;
 420                 uint64_t gmx_drp:1;
 421                 uint64_t trace:1;
 422                 uint64_t rml:1;
 423                 uint64_t twsi:1;
 424                 uint64_t reserved_44_44:1;
 425                 uint64_t pci_msi:4;
 426                 uint64_t pci_int:4;
 427                 uint64_t uart:2;
 428                 uint64_t mbox:2;
 429                 uint64_t gpio:16;
 430                 uint64_t workq:16;
 431         } cn52xx;
 432         struct cvmx_ciu_intx_en0_w1c_s cn56xx;
 433         struct cvmx_ciu_intx_en0_w1c_cn58xx {
 434                 uint64_t reserved_56_63:8;
 435                 uint64_t timer:4;
 436                 uint64_t key_zero:1;
 437                 uint64_t ipd_drp:1;
 438                 uint64_t gmx_drp:2;
 439                 uint64_t trace:1;
 440                 uint64_t rml:1;
 441                 uint64_t twsi:1;
 442                 uint64_t reserved_44_44:1;
 443                 uint64_t pci_msi:4;
 444                 uint64_t pci_int:4;
 445                 uint64_t uart:2;
 446                 uint64_t mbox:2;
 447                 uint64_t gpio:16;
 448                 uint64_t workq:16;
 449         } cn58xx;
 450         struct cvmx_ciu_intx_en0_w1c_cn52xx cn63xx;
 451         struct cvmx_ciu_intx_en0_w1c_cn52xx cn63xxp1;
 452 };
 453
 454 union cvmx_ciu_intx_en0_w1s {
 455         uint64_t u64;
 456         struct cvmx_ciu_intx_en0_w1s_s {
 457                 uint64_t bootdma:1;
 458                 uint64_t mii:1;
 459                 uint64_t ipdppthr:1;
 460                 uint64_t powiq:1;
 461                 uint64_t twsi2:1;
 462                 uint64_t reserved_57_58:2;
 463                 uint64_t usb:1;
 464                 uint64_t timer:4;
 465                 uint64_t key_zero:1;
 466                 uint64_t ipd_drp:1;
 467                 uint64_t gmx_drp:2;
 468                 uint64_t trace:1;
 469                 uint64_t rml:1;
 470                 uint64_t twsi:1;
 471                 uint64_t reserved_44_44:1;
 472                 uint64_t pci_msi:4;
 473                 uint64_t pci_int:4;
 474                 uint64_t uart:2;
 475                 uint64_t mbox:2;
 476                 uint64_t gpio:16;
 477                 uint64_t workq:16;
 478         } s;
 479         struct cvmx_ciu_intx_en0_w1s_cn52xx {
 480                 uint64_t bootdma:1;
 481                 uint64_t mii:1;
 482                 uint64_t ipdppthr:1;
 483                 uint64_t powiq:1;
 484                 uint64_t twsi2:1;
 485                 uint64_t reserved_57_58:2;
 486                 uint64_t usb:1;
 487                 uint64_t timer:4;
 488                 uint64_t reserved_51_51:1;
 489                 uint64_t ipd_drp:1;
 490                 uint64_t reserved_49_49:1;
 491                 uint64_t gmx_drp:1;
 492                 uint64_t trace:1;
 493                 uint64_t rml:1;
 494                 uint64_t twsi:1;
 495                 uint64_t reserved_44_44:1;
 496                 uint64_t pci_msi:4;
 497                 uint64_t pci_int:4;
 498                 uint64_t uart:2;
 499                 uint64_t mbox:2;
 500                 uint64_t gpio:16;
 501                 uint64_t workq:16;
 502         } cn52xx;
 503         struct cvmx_ciu_intx_en0_w1s_s cn56xx;
 504         struct cvmx_ciu_intx_en0_w1s_cn58xx {
 505                 uint64_t reserved_56_63:8;
 506                 uint64_t timer:4;
 507                 uint64_t key_zero:1;
 508                 uint64_t ipd_drp:1;
 509                 uint64_t gmx_drp:2;
 510                 uint64_t trace:1;
 511                 uint64_t rml:1;
 512                 uint64_t twsi:1;
 513                 uint64_t reserved_44_44:1;
 514                 uint64_t pci_msi:4;
 515                 uint64_t pci_int:4;
 516                 uint64_t uart:2;
 517                 uint64_t mbox:2;
 518                 uint64_t gpio:16;
 519                 uint64_t workq:16;
 520         } cn58xx;
 521         struct cvmx_ciu_intx_en0_w1s_cn52xx cn63xx;
 522         struct cvmx_ciu_intx_en0_w1s_cn52xx cn63xxp1;
 523 };
 524
 525 union cvmx_ciu_intx_en1 {
 526         uint64_t u64;
 527         struct cvmx_ciu_intx_en1_s {
 528                 uint64_t rst:1;
 529                 uint64_t reserved_57_62:6;
 530                 uint64_t dfm:1;
 531                 uint64_t reserved_53_55:3;
 532                 uint64_t lmc0:1;
 533                 uint64_t srio1:1;
 534                 uint64_t srio0:1;
 535                 uint64_t pem1:1;
 536                 uint64_t pem0:1;
 537                 uint64_t ptp:1;
 538                 uint64_t agl:1;
 539                 uint64_t reserved_37_45:9;
 540                 uint64_t agx0:1;
 541                 uint64_t dpi:1;
 542                 uint64_t sli:1;
 543                 uint64_t usb:1;
 544                 uint64_t dfa:1;
 545                 uint64_t key:1;
 546                 uint64_t rad:1;
 547                 uint64_t tim:1;
 548                 uint64_t zip:1;
 549                 uint64_t pko:1;
 550                 uint64_t pip:1;
 551                 uint64_t ipd:1;
 552                 uint64_t l2c:1;
 553                 uint64_t pow:1;
 554                 uint64_t fpa:1;
 555                 uint64_t iob:1;
 556                 uint64_t mio:1;
 557                 uint64_t nand:1;
 558                 uint64_t mii1:1;
 559                 uint64_t usb1:1;
 560                 uint64_t uart2:1;
 561                 uint64_t wdog:16;
 562         } s;
 563         struct cvmx_ciu_intx_en1_cn30xx {
 564                 uint64_t reserved_1_63:63;
 565                 uint64_t wdog:1;
 566         } cn30xx;
 567         struct cvmx_ciu_intx_en1_cn31xx {
 568                 uint64_t reserved_2_63:62;
 569                 uint64_t wdog:2;
 570         } cn31xx;
 571         struct cvmx_ciu_intx_en1_cn38xx {
 572                 uint64_t reserved_16_63:48;
 573                 uint64_t wdog:16;
 574         } cn38xx;
 575         struct cvmx_ciu_intx_en1_cn38xx cn38xxp2;
 576         struct cvmx_ciu_intx_en1_cn31xx cn50xx;
 577         struct cvmx_ciu_intx_en1_cn52xx {
 578                 uint64_t reserved_20_63:44;
 579                 uint64_t nand:1;
 580                 uint64_t mii1:1;
 581                 uint64_t usb1:1;
 582                 uint64_t uart2:1;
 583                 uint64_t reserved_4_15:12;
 584                 uint64_t wdog:4;
 585         } cn52xx;
 586         struct cvmx_ciu_intx_en1_cn52xxp1 {
 587                 uint64_t reserved_19_63:45;
 588                 uint64_t mii1:1;
 589                 uint64_t usb1:1;
 590                 uint64_t uart2:1;
 591                 uint64_t reserved_4_15:12;
 592                 uint64_t wdog:4;
 593         } cn52xxp1;
 594         struct cvmx_ciu_intx_en1_cn56xx {
 595                 uint64_t reserved_12_63:52;
 596                 uint64_t wdog:12;
 597         } cn56xx;
 598         struct cvmx_ciu_intx_en1_cn56xx cn56xxp1;
 599         struct cvmx_ciu_intx_en1_cn38xx cn58xx;
 600         struct cvmx_ciu_intx_en1_cn38xx cn58xxp1;
 601         struct cvmx_ciu_intx_en1_cn63xx {
 602                 uint64_t rst:1;
 603                 uint64_t reserved_57_62:6;
 604                 uint64_t dfm:1;
 605                 uint64_t reserved_53_55:3;
 606                 uint64_t lmc0:1;
 607                 uint64_t srio1:1;
 608                 uint64_t srio0:1;
 609                 uint64_t pem1:1;
 610                 uint64_t pem0:1;
 611                 uint64_t ptp:1;
 612                 uint64_t agl:1;
 613                 uint64_t reserved_37_45:9;
 614                 uint64_t agx0:1;
 615                 uint64_t dpi:1;
 616                 uint64_t sli:1;
 617                 uint64_t usb:1;
 618                 uint64_t dfa:1;
 619                 uint64_t key:1;
 620                 uint64_t rad:1;
 621                 uint64_t tim:1;
 622                 uint64_t zip:1;
 623                 uint64_t pko:1;
 624                 uint64_t pip:1;
 625                 uint64_t ipd:1;
 626                 uint64_t l2c:1;
 627                 uint64_t pow:1;
 628                 uint64_t fpa:1;
 629                 uint64_t iob:1;
 630                 uint64_t mio:1;
 631                 uint64_t nand:1;
 632                 uint64_t mii1:1;
 633                 uint64_t reserved_6_17:12;
 634                 uint64_t wdog:6;
 635         } cn63xx;
 636         struct cvmx_ciu_intx_en1_cn63xx cn63xxp1;
 637 };
 638
 639 union cvmx_ciu_intx_en1_w1c {
 640         uint64_t u64;
 641         struct cvmx_ciu_intx_en1_w1c_s {
 642                 uint64_t rst:1;
 643                 uint64_t reserved_57_62:6;
 644                 uint64_t dfm:1;
 645                 uint64_t reserved_53_55:3;
 646                 uint64_t lmc0:1;
 647                 uint64_t srio1:1;
 648                 uint64_t srio0:1;
 649                 uint64_t pem1:1;
 650                 uint64_t pem0:1;
 651                 uint64_t ptp:1;
 652                 uint64_t agl:1;
 653                 uint64_t reserved_37_45:9;
 654                 uint64_t agx0:1;
 655                 uint64_t dpi:1;
 656                 uint64_t sli:1;
 657                 uint64_t usb:1;
 658                 uint64_t dfa:1;
 659                 uint64_t key:1;
 660                 uint64_t rad:1;
 661                 uint64_t tim:1;
 662                 uint64_t zip:1;
 663                 uint64_t pko:1;
 664                 uint64_t pip:1;
 665                 uint64_t ipd:1;
 666                 uint64_t l2c:1;
 667                 uint64_t pow:1;
 668                 uint64_t fpa:1;
 669                 uint64_t iob:1;
 670                 uint64_t mio:1;
 671                 uint64_t nand:1;
 672                 uint64_t mii1:1;
 673                 uint64_t usb1:1;
 674                 uint64_t uart2:1;
 675                 uint64_t wdog:16;
 676         } s;
 677         struct cvmx_ciu_intx_en1_w1c_cn52xx {
 678                 uint64_t reserved_20_63:44;
 679                 uint64_t nand:1;
 680                 uint64_t mii1:1;
 681                 uint64_t usb1:1;
 682                 uint64_t uart2:1;
 683                 uint64_t reserved_4_15:12;
 684                 uint64_t wdog:4;
 685         } cn52xx;
 686         struct cvmx_ciu_intx_en1_w1c_cn56xx {
 687                 uint64_t reserved_12_63:52;
 688                 uint64_t wdog:12;
 689         } cn56xx;
 690         struct cvmx_ciu_intx_en1_w1c_cn58xx {
 691                 uint64_t reserved_16_63:48;
 692                 uint64_t wdog:16;
 693         } cn58xx;
 694         struct cvmx_ciu_intx_en1_w1c_cn63xx {
 695                 uint64_t rst:1;
 696                 uint64_t reserved_57_62:6;
 697                 uint64_t dfm:1;
 698                 uint64_t reserved_53_55:3;
 699                 uint64_t lmc0:1;
 700                 uint64_t srio1:1;
 701                 uint64_t srio0:1;
 702                 uint64_t pem1:1;
 703                 uint64_t pem0:1;
 704                 uint64_t ptp:1;
 705                 uint64_t agl:1;
 706                 uint64_t reserved_37_45:9;
 707                 uint64_t agx0:1;
 708                 uint64_t dpi:1;
 709                 uint64_t sli:1;
 710                 uint64_t usb:1;
 711                 uint64_t dfa:1;
 712                 uint64_t key:1;
 713                 uint64_t rad:1;
 714                 uint64_t tim:1;
 715                 uint64_t zip:1;
 716                 uint64_t pko:1;
 717                 uint64_t pip:1;
 718                 uint64_t ipd:1;
 719                 uint64_t l2c:1;
 720                 uint64_t pow:1;
 721                 uint64_t fpa:1;
 722                 uint64_t iob:1;
 723                 uint64_t mio:1;
 724                 uint64_t nand:1;
 725                 uint64_t mii1:1;
 726                 uint64_t reserved_6_17:12;
 727                 uint64_t wdog:6;
 728         } cn63xx;
 729         struct cvmx_ciu_intx_en1_w1c_cn63xx cn63xxp1;
 730 };
 731
 732 union cvmx_ciu_intx_en1_w1s {
 733         uint64_t u64;
 734         struct cvmx_ciu_intx_en1_w1s_s {
 735                 uint64_t rst:1;
 736                 uint64_t reserved_57_62:6;
 737                 uint64_t dfm:1;
 738                 uint64_t reserved_53_55:3;
 739                 uint64_t lmc0:1;
 740                 uint64_t srio1:1;
 741                 uint64_t srio0:1;
 742                 uint64_t pem1:1;
 743                 uint64_t pem0:1;
 744                 uint64_t ptp:1;
 745                 uint64_t agl:1;
 746                 uint64_t reserved_37_45:9;
 747                 uint64_t agx0:1;
 748                 uint64_t dpi:1;
 749                 uint64_t sli:1;
 750                 uint64_t usb:1;
 751                 uint64_t dfa:1;
 752                 uint64_t key:1;
 753                 uint64_t rad:1;
 754                 uint64_t tim:1;
 755                 uint64_t zip:1;
 756                 uint64_t pko:1;
 757                 uint64_t pip:1;
 758                 uint64_t ipd:1;
 759                 uint64_t l2c:1;
 760                 uint64_t pow:1;
 761                 uint64_t fpa:1;
 762                 uint64_t iob:1;
 763                 uint64_t mio:1;
 764                 uint64_t nand:1;
 765                 uint64_t mii1:1;
 766                 uint64_t usb1:1;
 767                 uint64_t uart2:1;
 768                 uint64_t wdog:16;
 769         } s;
 770         struct cvmx_ciu_intx_en1_w1s_cn52xx {
 771                 uint64_t reserved_20_63:44;
 772                 uint64_t nand:1;
 773                 uint64_t mii1:1;
 774                 uint64_t usb1:1;
 775                 uint64_t uart2:1;
 776                 uint64_t reserved_4_15:12;
 777                 uint64_t wdog:4;
 778         } cn52xx;
 779         struct cvmx_ciu_intx_en1_w1s_cn56xx {
 780                 uint64_t reserved_12_63:52;
 781                 uint64_t wdog:12;
 782         } cn56xx;
 783         struct cvmx_ciu_intx_en1_w1s_cn58xx {
 784                 uint64_t reserved_16_63:48;
 785                 uint64_t wdog:16;
 786         } cn58xx;
 787         struct cvmx_ciu_intx_en1_w1s_cn63xx {
 788                 uint64_t rst:1;
 789                 uint64_t reserved_57_62:6;
 790                 uint64_t dfm:1;
 791                 uint64_t reserved_53_55:3;
 792                 uint64_t lmc0:1;
 793                 uint64_t srio1:1;
 794                 uint64_t srio0:1;
 795                 uint64_t pem1:1;
 796                 uint64_t pem0:1;
 797                 uint64_t ptp:1;
 798                 uint64_t agl:1;
 799                 uint64_t reserved_37_45:9;
 800                 uint64_t agx0:1;
 801                 uint64_t dpi:1;
 802                 uint64_t sli:1;
 803                 uint64_t usb:1;
 804                 uint64_t dfa:1;
 805                 uint64_t key:1;
 806                 uint64_t rad:1;
 807                 uint64_t tim:1;
 808                 uint64_t zip:1;
 809                 uint64_t pko:1;
 810                 uint64_t pip:1;
 811                 uint64_t ipd:1;
 812                 uint64_t l2c:1;
 813                 uint64_t pow:1;
 814                 uint64_t fpa:1;
 815                 uint64_t iob:1;
 816                 uint64_t mio:1;
 817                 uint64_t nand:1;
 818                 uint64_t mii1:1;
 819                 uint64_t reserved_6_17:12;
 820                 uint64_t wdog:6;
 821         } cn63xx;
 822         struct cvmx_ciu_intx_en1_w1s_cn63xx cn63xxp1;
 823 };
 824
 825 union cvmx_ciu_intx_en4_0 {
 826         uint64_t u64;
 827         struct cvmx_ciu_intx_en4_0_s {
 828                 uint64_t bootdma:1;
 829                 uint64_t mii:1;
 830                 uint64_t ipdppthr:1;
 831                 uint64_t powiq:1;
 832                 uint64_t twsi2:1;
 833                 uint64_t mpi:1;
 834                 uint64_t pcm:1;
 835                 uint64_t usb:1;
 836                 uint64_t timer:4;
 837                 uint64_t key_zero:1;
 838                 uint64_t ipd_drp:1;
 839                 uint64_t gmx_drp:2;
 840                 uint64_t trace:1;
 841                 uint64_t rml:1;
 842                 uint64_t twsi:1;
 843                 uint64_t reserved_44_44:1;
 844                 uint64_t pci_msi:4;
 845                 uint64_t pci_int:4;
 846                 uint64_t uart:2;
 847                 uint64_t mbox:2;
 848                 uint64_t gpio:16;
 849                 uint64_t workq:16;
 850         } s;
 851         struct cvmx_ciu_intx_en4_0_cn50xx {
 852                 uint64_t reserved_59_63:5;
 853                 uint64_t mpi:1;
 854                 uint64_t pcm:1;
 855                 uint64_t usb:1;
 856                 uint64_t timer:4;
 857                 uint64_t reserved_51_51:1;
 858                 uint64_t ipd_drp:1;
 859                 uint64_t reserved_49_49:1;
 860                 uint64_t gmx_drp:1;
 861                 uint64_t reserved_47_47:1;
 862                 uint64_t rml:1;
 863                 uint64_t twsi:1;
 864                 uint64_t reserved_44_44:1;
 865                 uint64_t pci_msi:4;
 866                 uint64_t pci_int:4;
 867                 uint64_t uart:2;
 868                 uint64_t mbox:2;
 869                 uint64_t gpio:16;
 870                 uint64_t workq:16;
 871         } cn50xx;
 872         struct cvmx_ciu_intx_en4_0_cn52xx {
 873                 uint64_t bootdma:1;
 874                 uint64_t mii:1;
 875                 uint64_t ipdppthr:1;
 876                 uint64_t powiq:1;
 877                 uint64_t twsi2:1;
 878                 uint64_t reserved_57_58:2;
 879                 uint64_t usb:1;
 880                 uint64_t timer:4;
 881                 uint64_t reserved_51_51:1;
 882                 uint64_t ipd_drp:1;
 883                 uint64_t reserved_49_49:1;
 884                 uint64_t gmx_drp:1;
 885                 uint64_t trace:1;
 886                 uint64_t rml:1;
 887                 uint64_t twsi:1;
 888                 uint64_t reserved_44_44:1;
 889                 uint64_t pci_msi:4;
 890                 uint64_t pci_int:4;
 891                 uint64_t uart:2;
 892                 uint64_t mbox:2;
 893                 uint64_t gpio:16;
 894                 uint64_t workq:16;
 895         } cn52xx;
 896         struct cvmx_ciu_intx_en4_0_cn52xx cn52xxp1;
 897         struct cvmx_ciu_intx_en4_0_cn56xx {
 898                 uint64_t bootdma:1;
 899                 uint64_t mii:1;
 900                 uint64_t ipdppthr:1;
 901                 uint64_t powiq:1;
 902                 uint64_t twsi2:1;
 903                 uint64_t reserved_57_58:2;
 904                 uint64_t usb:1;
 905                 uint64_t timer:4;
 906                 uint64_t key_zero:1;
 907                 uint64_t ipd_drp:1;
 908                 uint64_t gmx_drp:2;
 909                 uint64_t trace:1;
 910                 uint64_t rml:1;
 911                 uint64_t twsi:1;
 912                 uint64_t reserved_44_44:1;
 913                 uint64_t pci_msi:4;
 914                 uint64_t pci_int:4;
 915                 uint64_t uart:2;
 916                 uint64_t mbox:2;
 917                 uint64_t gpio:16;
 918                 uint64_t workq:16;
 919         } cn56xx;
 920         struct cvmx_ciu_intx_en4_0_cn56xx cn56xxp1;
 921         struct cvmx_ciu_intx_en4_0_cn58xx {
 922                 uint64_t reserved_56_63:8;
 923                 uint64_t timer:4;
 924                 uint64_t key_zero:1;
 925                 uint64_t ipd_drp:1;
 926                 uint64_t gmx_drp:2;
 927                 uint64_t trace:1;
 928                 uint64_t rml:1;
 929                 uint64_t twsi:1;
 930                 uint64_t reserved_44_44:1;
 931                 uint64_t pci_msi:4;
 932                 uint64_t pci_int:4;
 933                 uint64_t uart:2;
 934                 uint64_t mbox:2;
 935                 uint64_t gpio:16;
 936                 uint64_t workq:16;
 937         } cn58xx;
 938         struct cvmx_ciu_intx_en4_0_cn58xx cn58xxp1;
 939         struct cvmx_ciu_intx_en4_0_cn52xx cn63xx;
 940         struct cvmx_ciu_intx_en4_0_cn52xx cn63xxp1;
 941 };
 942
 943 union cvmx_ciu_intx_en4_0_w1c {
 944         uint64_t u64;
 945         struct cvmx_ciu_intx_en4_0_w1c_s {
 946                 uint64_t bootdma:1;
 947                 uint64_t mii:1;
 948                 uint64_t ipdppthr:1;
 949                 uint64_t powiq:1;
 950                 uint64_t twsi2:1;
 951                 uint64_t reserved_57_58:2;
 952                 uint64_t usb:1;
 953                 uint64_t timer:4;
 954                 uint64_t key_zero:1;
 955                 uint64_t ipd_drp:1;
 956                 uint64_t gmx_drp:2;
 957                 uint64_t trace:1;
 958                 uint64_t rml:1;
 959                 uint64_t twsi:1;
 960                 uint64_t reserved_44_44:1;
 961                 uint64_t pci_msi:4;
 962                 uint64_t pci_int:4;
 963                 uint64_t uart:2;
 964                 uint64_t mbox:2;
 965                 uint64_t gpio:16;
 966                 uint64_t workq:16;
 967         } s;
 968         struct cvmx_ciu_intx_en4_0_w1c_cn52xx {
 969                 uint64_t bootdma:1;
 970                 uint64_t mii:1;
 971                 uint64_t ipdppthr:1;
 972                 uint64_t powiq:1;
 973                 uint64_t twsi2:1;
 974                 uint64_t reserved_57_58:2;
 975                 uint64_t usb:1;
 976                 uint64_t timer:4;
 977                 uint64_t reserved_51_51:1;
 978                 uint64_t ipd_drp:1;
 979                 uint64_t reserved_49_49:1;
 980                 uint64_t gmx_drp:1;
 981                 uint64_t trace:1;
 982                 uint64_t rml:1;
 983                 uint64_t twsi:1;
 984                 uint64_t reserved_44_44:1;
 985                 uint64_t pci_msi:4;
 986                 uint64_t pci_int:4;
 987                 uint64_t uart:2;
 988                 uint64_t mbox:2;
 989                 uint64_t gpio:16;
 990                 uint64_t workq:16;
 991         } cn52xx;
 992         struct cvmx_ciu_intx_en4_0_w1c_s cn56xx;
 993         struct cvmx_ciu_intx_en4_0_w1c_cn58xx {
 994                 uint64_t reserved_56_63:8;
 995                 uint64_t timer:4;
 996                 uint64_t key_zero:1;
 997                 uint64_t ipd_drp:1;
 998                 uint64_t gmx_drp:2;
 999                 uint64_t trace:1;
1000                 uint64_t rml:1;
1001                 uint64_t twsi:1;
1002                 uint64_t reserved_44_44:1;
1003                 uint64_t pci_msi:4;
1004                 uint64_t pci_int:4;
1005                 uint64_t uart:2;
1006                 uint64_t mbox:2;
1007                 uint64_t gpio:16;
1008                 uint64_t workq:16;
1009         } cn58xx;
1010         struct cvmx_ciu_intx_en4_0_w1c_cn52xx cn63xx;
1011         struct cvmx_ciu_intx_en4_0_w1c_cn52xx cn63xxp1;
1012 };
1013
1014 union cvmx_ciu_intx_en4_0_w1s {
1015         uint64_t u64;
1016         struct cvmx_ciu_intx_en4_0_w1s_s {
1017                 uint64_t bootdma:1;
1018                 uint64_t mii:1;
1019                 uint64_t ipdppthr:1;
1020                 uint64_t powiq:1;
1021                 uint64_t twsi2:1;
1022                 uint64_t reserved_57_58:2;
1023                 uint64_t usb:1;
1024                 uint64_t timer:4;
1025                 uint64_t key_zero:1;
1026                 uint64_t ipd_drp:1;
1027                 uint64_t gmx_drp:2;
1028                 uint64_t trace:1;
1029                 uint64_t rml:1;
1030                 uint64_t twsi:1;
1031                 uint64_t reserved_44_44:1;
1032                 uint64_t pci_msi:4;
1033                 uint64_t pci_int:4;
1034                 uint64_t uart:2;
1035                 uint64_t mbox:2;
1036                 uint64_t gpio:16;
1037                 uint64_t workq:16;
1038         } s;
1039         struct cvmx_ciu_intx_en4_0_w1s_cn52xx {
1040                 uint64_t bootdma:1;
1041                 uint64_t mii:1;
1042                 uint64_t ipdppthr:1;
1043                 uint64_t powiq:1;
1044                 uint64_t twsi2:1;
1045                 uint64_t reserved_57_58:2;
1046                 uint64_t usb:1;
1047                 uint64_t timer:4;
1048                 uint64_t reserved_51_51:1;
1049                 uint64_t ipd_drp:1;
1050                 uint64_t reserved_49_49:1;
1051                 uint64_t gmx_drp:1;
1052                 uint64_t trace:1;
1053                 uint64_t rml:1;
1054                 uint64_t twsi:1;
1055                 uint64_t reserved_44_44:1;
1056                 uint64_t pci_msi:4;
1057                 uint64_t pci_int:4;
1058                 uint64_t uart:2;
1059                 uint64_t mbox:2;
1060                 uint64_t gpio:16;
1061                 uint64_t workq:16;
1062         } cn52xx;
1063         struct cvmx_ciu_intx_en4_0_w1s_s cn56xx;
1064         struct cvmx_ciu_intx_en4_0_w1s_cn58xx {
1065                 uint64_t reserved_56_63:8;
1066                 uint64_t timer:4;
1067                 uint64_t key_zero:1;
1068                 uint64_t ipd_drp:1;
1069                 uint64_t gmx_drp:2;
1070                 uint64_t trace:1;
1071                 uint64_t rml:1;
1072                 uint64_t twsi:1;
1073                 uint64_t reserved_44_44:1;
1074                 uint64_t pci_msi:4;
1075                 uint64_t pci_int:4;
1076                 uint64_t uart:2;
1077                 uint64_t mbox:2;
1078                 uint64_t gpio:16;
1079                 uint64_t workq:16;
1080         } cn58xx;
1081         struct cvmx_ciu_intx_en4_0_w1s_cn52xx cn63xx;
1082         struct cvmx_ciu_intx_en4_0_w1s_cn52xx cn63xxp1;
1083 };
1084
1085 union cvmx_ciu_intx_en4_1 {
1086         uint64_t u64;
1087         struct cvmx_ciu_intx_en4_1_s {
1088                 uint64_t rst:1;
1089                 uint64_t reserved_57_62:6;
1090                 uint64_t dfm:1;
1091                 uint64_t reserved_53_55:3;
1092                 uint64_t lmc0:1;
1093                 uint64_t srio1:1;
1094                 uint64_t srio0:1;
1095                 uint64_t pem1:1;
1096                 uint64_t pem0:1;
1097                 uint64_t ptp:1;
1098                 uint64_t agl:1;
1099                 uint64_t reserved_37_45:9;
1100                 uint64_t agx0:1;
1101                 uint64_t dpi:1;
1102                 uint64_t sli:1;
1103                 uint64_t usb:1;
1104                 uint64_t dfa:1;
1105                 uint64_t key:1;
1106                 uint64_t rad:1;
1107                 uint64_t tim:1;
1108                 uint64_t zip:1;
1109                 uint64_t pko:1;
1110                 uint64_t pip:1;
1111                 uint64_t ipd:1;
1112                 uint64_t l2c:1;
1113                 uint64_t pow:1;
1114                 uint64_t fpa:1;
1115                 uint64_t iob:1;
1116                 uint64_t mio:1;
1117                 uint64_t nand:1;
1118                 uint64_t mii1:1;
1119                 uint64_t usb1:1;
1120                 uint64_t uart2:1;
1121                 uint64_t wdog:16;
1122         } s;
1123         struct cvmx_ciu_intx_en4_1_cn50xx {
1124                 uint64_t reserved_2_63:62;
1125                 uint64_t wdog:2;
1126         } cn50xx;
1127         struct cvmx_ciu_intx_en4_1_cn52xx {
1128                 uint64_t reserved_20_63:44;
1129                 uint64_t nand:1;
1130                 uint64_t mii1:1;
1131                 uint64_t usb1:1;
1132                 uint64_t uart2:1;
1133                 uint64_t reserved_4_15:12;
1134                 uint64_t wdog:4;
1135         } cn52xx;
1136         struct cvmx_ciu_intx_en4_1_cn52xxp1 {
1137                 uint64_t reserved_19_63:45;
1138                 uint64_t mii1:1;
1139                 uint64_t usb1:1;
1140                 uint64_t uart2:1;
1141                 uint64_t reserved_4_15:12;
1142                 uint64_t wdog:4;
1143         } cn52xxp1;
1144         struct cvmx_ciu_intx_en4_1_cn56xx {
1145                 uint64_t reserved_12_63:52;
1146                 uint64_t wdog:12;
1147         } cn56xx;
1148         struct cvmx_ciu_intx_en4_1_cn56xx cn56xxp1;
1149         struct cvmx_ciu_intx_en4_1_cn58xx {
1150                 uint64_t reserved_16_63:48;
1151                 uint64_t wdog:16;
1152         } cn58xx;
1153         struct cvmx_ciu_intx_en4_1_cn58xx cn58xxp1;
1154         struct cvmx_ciu_intx_en4_1_cn63xx {
1155                 uint64_t rst:1;
1156                 uint64_t reserved_57_62:6;
1157                 uint64_t dfm:1;
1158                 uint64_t reserved_53_55:3;
1159                 uint64_t lmc0:1;
1160                 uint64_t srio1:1;
1161                 uint64_t srio0:1;
1162                 uint64_t pem1:1;
1163                 uint64_t pem0:1;
1164                 uint64_t ptp:1;
1165                 uint64_t agl:1;
1166                 uint64_t reserved_37_45:9;
1167                 uint64_t agx0:1;
1168                 uint64_t dpi:1;
1169                 uint64_t sli:1;
1170                 uint64_t usb:1;
1171                 uint64_t dfa:1;
1172                 uint64_t key:1;
1173                 uint64_t rad:1;
1174                 uint64_t tim:1;
1175                 uint64_t zip:1;
1176                 uint64_t pko:1;
1177                 uint64_t pip:1;
1178                 uint64_t ipd:1;
1179                 uint64_t l2c:1;
1180                 uint64_t pow:1;
1181                 uint64_t fpa:1;
1182                 uint64_t iob:1;
1183                 uint64_t mio:1;
1184                 uint64_t nand:1;
1185                 uint64_t mii1:1;
1186                 uint64_t reserved_6_17:12;
1187                 uint64_t wdog:6;
1188         } cn63xx;
1189         struct cvmx_ciu_intx_en4_1_cn63xx cn63xxp1;
1190 };
1191
1192 union cvmx_ciu_intx_en4_1_w1c {
1193         uint64_t u64;
1194         struct cvmx_ciu_intx_en4_1_w1c_s {
1195                 uint64_t rst:1;
1196                 uint64_t reserved_57_62:6;
1197                 uint64_t dfm:1;
1198                 uint64_t reserved_53_55:3;
1199                 uint64_t lmc0:1;
1200                 uint64_t srio1:1;
1201                 uint64_t srio0:1;
1202                 uint64_t pem1:1;
1203                 uint64_t pem0:1;
1204                 uint64_t ptp:1;
1205                 uint64_t agl:1;
1206                 uint64_t reserved_37_45:9;
1207                 uint64_t agx0:1;
1208                 uint64_t dpi:1;
1209                 uint64_t sli:1;
1210                 uint64_t usb:1;
1211                 uint64_t dfa:1;
1212                 uint64_t key:1;
1213                 uint64_t rad:1;
1214                 uint64_t tim:1;
1215                 uint64_t zip:1;
1216                 uint64_t pko:1;
1217                 uint64_t pip:1;
1218                 uint64_t ipd:1;
1219                 uint64_t l2c:1;
1220                 uint64_t pow:1;
1221                 uint64_t fpa:1;
1222                 uint64_t iob:1;
1223                 uint64_t mio:1;
1224                 uint64_t nand:1;
1225                 uint64_t mii1:1;
1226                 uint64_t usb1:1;
1227                 uint64_t uart2:1;
1228                 uint64_t wdog:16;
1229         } s;
1230         struct cvmx_ciu_intx_en4_1_w1c_cn52xx {
1231                 uint64_t reserved_20_63:44;
1232                 uint64_t nand:1;
1233                 uint64_t mii1:1;
1234                 uint64_t usb1:1;
1235                 uint64_t uart2:1;
1236                 uint64_t reserved_4_15:12;
1237                 uint64_t wdog:4;
1238         } cn52xx;
1239         struct cvmx_ciu_intx_en4_1_w1c_cn56xx {
1240                 uint64_t reserved_12_63:52;
1241                 uint64_t wdog:12;
1242         } cn56xx;
1243         struct cvmx_ciu_intx_en4_1_w1c_cn58xx {
1244                 uint64_t reserved_16_63:48;
1245                 uint64_t wdog:16;
1246         } cn58xx;
1247         struct cvmx_ciu_intx_en4_1_w1c_cn63xx {
1248                 uint64_t rst:1;
1249                 uint64_t reserved_57_62:6;
1250                 uint64_t dfm:1;
1251                 uint64_t reserved_53_55:3;
1252                 uint64_t lmc0:1;
1253                 uint64_t srio1:1;
1254                 uint64_t srio0:1;
1255                 uint64_t pem1:1;
1256                 uint64_t pem0:1;
1257                 uint64_t ptp:1;
1258                 uint64_t agl:1;
1259                 uint64_t reserved_37_45:9;
1260                 uint64_t agx0:1;
1261                 uint64_t dpi:1;
1262                 uint64_t sli:1;
1263                 uint64_t usb:1;
1264                 uint64_t dfa:1;
1265                 uint64_t key:1;
1266                 uint64_t rad:1;
1267                 uint64_t tim:1;
1268                 uint64_t zip:1;
1269                 uint64_t pko:1;
1270                 uint64_t pip:1;
1271                 uint64_t ipd:1;
1272                 uint64_t l2c:1;
1273                 uint64_t pow:1;
1274                 uint64_t fpa:1;
1275                 uint64_t iob:1;
1276                 uint64_t mio:1;
1277                 uint64_t nand:1;
1278                 uint64_t mii1:1;
1279                 uint64_t reserved_6_17:12;
1280                 uint64_t wdog:6;
1281         } cn63xx;
1282         struct cvmx_ciu_intx_en4_1_w1c_cn63xx cn63xxp1;
1283 };
1284
1285 union cvmx_ciu_intx_en4_1_w1s {
1286         uint64_t u64;
1287         struct cvmx_ciu_intx_en4_1_w1s_s {
1288                 uint64_t rst:1;
1289                 uint64_t reserved_57_62:6;
1290                 uint64_t dfm:1;
1291                 uint64_t reserved_53_55:3;
1292                 uint64_t lmc0:1;
1293                 uint64_t srio1:1;
1294                 uint64_t srio0:1;
1295                 uint64_t pem1:1;
1296                 uint64_t pem0:1;
1297                 uint64_t ptp:1;
1298                 uint64_t agl:1;
1299                 uint64_t reserved_37_45:9;
1300                 uint64_t agx0:1;
1301                 uint64_t dpi:1;
1302                 uint64_t sli:1;
1303                 uint64_t usb:1;
1304                 uint64_t dfa:1;
1305                 uint64_t key:1;
1306                 uint64_t rad:1;
1307                 uint64_t tim:1;
1308                 uint64_t zip:1;
1309                 uint64_t pko:1;
1310                 uint64_t pip:1;
1311                 uint64_t ipd:1;
1312                 uint64_t l2c:1;
1313                 uint64_t pow:1;
1314                 uint64_t fpa:1;
1315                 uint64_t iob:1;
1316                 uint64_t mio:1;
1317                 uint64_t nand:1;
1318                 uint64_t mii1:1;
1319                 uint64_t usb1:1;
1320                 uint64_t uart2:1;
1321                 uint64_t wdog:16;
1322         } s;
1323         struct cvmx_ciu_intx_en4_1_w1s_cn52xx {
1324                 uint64_t reserved_20_63:44;
1325                 uint64_t nand:1;
1326                 uint64_t mii1:1;
1327                 uint64_t usb1:1;
1328                 uint64_t uart2:1;
1329                 uint64_t reserved_4_15:12;
1330                 uint64_t wdog:4;
1331         } cn52xx;
1332         struct cvmx_ciu_intx_en4_1_w1s_cn56xx {
1333                 uint64_t reserved_12_63:52;
1334                 uint64_t wdog:12;
1335         } cn56xx;
1336         struct cvmx_ciu_intx_en4_1_w1s_cn58xx {
1337                 uint64_t reserved_16_63:48;
1338                 uint64_t wdog:16;
1339         } cn58xx;
1340         struct cvmx_ciu_intx_en4_1_w1s_cn63xx {
1341                 uint64_t rst:1;
1342                 uint64_t reserved_57_62:6;
1343                 uint64_t dfm:1;
1344                 uint64_t reserved_53_55:3;
1345                 uint64_t lmc0:1;
1346                 uint64_t srio1:1;
1347                 uint64_t srio0:1;
1348                 uint64_t pem1:1;
1349                 uint64_t pem0:1;
1350                 uint64_t ptp:1;
1351                 uint64_t agl:1;
1352                 uint64_t reserved_37_45:9;
1353                 uint64_t agx0:1;
1354                 uint64_t dpi:1;
1355                 uint64_t sli:1;
1356                 uint64_t usb:1;
1357                 uint64_t dfa:1;
1358                 uint64_t key:1;
1359                 uint64_t rad:1;
1360                 uint64_t tim:1;
1361                 uint64_t zip:1;
1362                 uint64_t pko:1;
1363                 uint64_t pip:1;
1364                 uint64_t ipd:1;
1365                 uint64_t l2c:1;
1366                 uint64_t pow:1;
1367                 uint64_t fpa:1;
1368                 uint64_t iob:1;
1369                 uint64_t mio:1;
1370                 uint64_t nand:1;
1371                 uint64_t mii1:1;
1372                 uint64_t reserved_6_17:12;
1373                 uint64_t wdog:6;
1374         } cn63xx;
1375         struct cvmx_ciu_intx_en4_1_w1s_cn63xx cn63xxp1;
1376 };
1377
1378 union cvmx_ciu_intx_sum0 {
1379         uint64_t u64;
1380         struct cvmx_ciu_intx_sum0_s {
1381                 uint64_t bootdma:1;
1382                 uint64_t mii:1;
1383                 uint64_t ipdppthr:1;
1384                 uint64_t powiq:1;
1385                 uint64_t twsi2:1;
1386                 uint64_t mpi:1;
1387                 uint64_t pcm:1;
1388                 uint64_t usb:1;
1389                 uint64_t timer:4;
1390                 uint64_t key_zero:1;
1391                 uint64_t ipd_drp:1;
1392                 uint64_t gmx_drp:2;
1393                 uint64_t trace:1;
1394                 uint64_t rml:1;
1395                 uint64_t twsi:1;
1396                 uint64_t wdog_sum:1;
1397                 uint64_t pci_msi:4;
1398                 uint64_t pci_int:4;
1399                 uint64_t uart:2;
1400                 uint64_t mbox:2;
1401                 uint64_t gpio:16;
1402                 uint64_t workq:16;
1403         } s;
1404         struct cvmx_ciu_intx_sum0_cn30xx {
1405                 uint64_t reserved_59_63:5;
1406                 uint64_t mpi:1;
1407                 uint64_t pcm:1;
1408                 uint64_t usb:1;
1409                 uint64_t timer:4;
1410                 uint64_t reserved_51_51:1;
1411                 uint64_t ipd_drp:1;
1412                 uint64_t reserved_49_49:1;
1413                 uint64_t gmx_drp:1;
1414                 uint64_t reserved_47_47:1;
1415                 uint64_t rml:1;
1416                 uint64_t twsi:1;
1417                 uint64_t wdog_sum:1;
1418                 uint64_t pci_msi:4;
1419                 uint64_t pci_int:4;
1420                 uint64_t uart:2;
1421                 uint64_t mbox:2;
1422                 uint64_t gpio:16;
1423                 uint64_t workq:16;
1424         } cn30xx;
1425         struct cvmx_ciu_intx_sum0_cn31xx {
1426                 uint64_t reserved_59_63:5;
1427                 uint64_t mpi:1;
1428                 uint64_t pcm:1;
1429                 uint64_t usb:1;
1430                 uint64_t timer:4;
1431                 uint64_t reserved_51_51:1;
1432                 uint64_t ipd_drp:1;
1433                 uint64_t reserved_49_49:1;
1434                 uint64_t gmx_drp:1;
1435                 uint64_t trace:1;
1436                 uint64_t rml:1;
1437                 uint64_t twsi:1;
1438                 uint64_t wdog_sum:1;
1439                 uint64_t pci_msi:4;
1440                 uint64_t pci_int:4;
1441                 uint64_t uart:2;
1442                 uint64_t mbox:2;
1443                 uint64_t gpio:16;
1444                 uint64_t workq:16;
1445         } cn31xx;
1446         struct cvmx_ciu_intx_sum0_cn38xx {
1447                 uint64_t reserved_56_63:8;
1448                 uint64_t timer:4;
1449                 uint64_t key_zero:1;
1450                 uint64_t ipd_drp:1;
1451                 uint64_t gmx_drp:2;
1452                 uint64_t trace:1;
1453                 uint64_t rml:1;
1454                 uint64_t twsi:1;
1455                 uint64_t wdog_sum:1;
1456                 uint64_t pci_msi:4;
1457                 uint64_t pci_int:4;
1458                 uint64_t uart:2;
1459                 uint64_t mbox:2;
1460                 uint64_t gpio:16;
1461                 uint64_t workq:16;
1462         } cn38xx;
1463         struct cvmx_ciu_intx_sum0_cn38xx cn38xxp2;
1464         struct cvmx_ciu_intx_sum0_cn30xx cn50xx;
1465         struct cvmx_ciu_intx_sum0_cn52xx {
1466                 uint64_t bootdma:1;
1467                 uint64_t mii:1;
1468                 uint64_t ipdppthr:1;
1469                 uint64_t powiq:1;
1470                 uint64_t twsi2:1;
1471                 uint64_t reserved_57_58:2;
1472                 uint64_t usb:1;
1473                 uint64_t timer:4;
1474                 uint64_t reserved_51_51:1;
1475                 uint64_t ipd_drp:1;
1476                 uint64_t reserved_49_49:1;
1477                 uint64_t gmx_drp:1;
1478                 uint64_t trace:1;
1479                 uint64_t rml:1;
1480                 uint64_t twsi:1;
1481                 uint64_t wdog_sum:1;
1482                 uint64_t pci_msi:4;
1483                 uint64_t pci_int:4;
1484                 uint64_t uart:2;
1485                 uint64_t mbox:2;
1486                 uint64_t gpio:16;
1487                 uint64_t workq:16;
1488         } cn52xx;
1489         struct cvmx_ciu_intx_sum0_cn52xx cn52xxp1;
1490         struct cvmx_ciu_intx_sum0_cn56xx {
1491                 uint64_t bootdma:1;
1492                 uint64_t mii:1;
1493                 uint64_t ipdppthr:1;
1494                 uint64_t powiq:1;
1495                 uint64_t twsi2:1;
1496                 uint64_t reserved_57_58:2;
1497                 uint64_t usb:1;
1498                 uint64_t timer:4;
1499                 uint64_t key_zero:1;
1500                 uint64_t ipd_drp:1;
1501                 uint64_t gmx_drp:2;
1502                 uint64_t trace:1;
1503                 uint64_t rml:1;
1504                 uint64_t twsi:1;
1505                 uint64_t wdog_sum:1;
1506                 uint64_t pci_msi:4;
1507                 uint64_t pci_int:4;
1508                 uint64_t uart:2;
1509                 uint64_t mbox:2;
1510                 uint64_t gpio:16;
1511                 uint64_t workq:16;
1512         } cn56xx;
1513         struct cvmx_ciu_intx_sum0_cn56xx cn56xxp1;
1514         struct cvmx_ciu_intx_sum0_cn38xx cn58xx;
1515         struct cvmx_ciu_intx_sum0_cn38xx cn58xxp1;
1516         struct cvmx_ciu_intx_sum0_cn52xx cn63xx;
1517         struct cvmx_ciu_intx_sum0_cn52xx cn63xxp1;
1518 };
1519
1520 union cvmx_ciu_intx_sum4 {
1521         uint64_t u64;
1522         struct cvmx_ciu_intx_sum4_s {
1523                 uint64_t bootdma:1;
1524                 uint64_t mii:1;
1525                 uint64_t ipdppthr:1;
1526                 uint64_t powiq:1;
1527                 uint64_t twsi2:1;
1528                 uint64_t mpi:1;
1529                 uint64_t pcm:1;
1530                 uint64_t usb:1;
1531                 uint64_t timer:4;
1532                 uint64_t key_zero:1;
1533                 uint64_t ipd_drp:1;
1534                 uint64_t gmx_drp:2;
1535                 uint64_t trace:1;
1536                 uint64_t rml:1;
1537                 uint64_t twsi:1;
1538                 uint64_t wdog_sum:1;
1539                 uint64_t pci_msi:4;
1540                 uint64_t pci_int:4;
1541                 uint64_t uart:2;
1542                 uint64_t mbox:2;
1543                 uint64_t gpio:16;
1544                 uint64_t workq:16;
1545         } s;
1546         struct cvmx_ciu_intx_sum4_cn50xx {
1547                 uint64_t reserved_59_63:5;
1548                 uint64_t mpi:1;
1549                 uint64_t pcm:1;
1550                 uint64_t usb:1;
1551                 uint64_t timer:4;
1552                 uint64_t reserved_51_51:1;
1553                 uint64_t ipd_drp:1;
1554                 uint64_t reserved_49_49:1;
1555                 uint64_t gmx_drp:1;
1556                 uint64_t reserved_47_47:1;
1557                 uint64_t rml:1;
1558                 uint64_t twsi:1;
1559                 uint64_t wdog_sum:1;
1560                 uint64_t pci_msi:4;
1561                 uint64_t pci_int:4;
1562                 uint64_t uart:2;
1563                 uint64_t mbox:2;
1564                 uint64_t gpio:16;
1565                 uint64_t workq:16;
1566         } cn50xx;
1567         struct cvmx_ciu_intx_sum4_cn52xx {
1568                 uint64_t bootdma:1;
1569                 uint64_t mii:1;
1570                 uint64_t ipdppthr:1;
1571                 uint64_t powiq:1;
1572                 uint64_t twsi2:1;
1573                 uint64_t reserved_57_58:2;
1574                 uint64_t usb:1;
1575                 uint64_t timer:4;
1576                 uint64_t reserved_51_51:1;
1577                 uint64_t ipd_drp:1;
1578                 uint64_t reserved_49_49:1;
1579                 uint64_t gmx_drp:1;
1580                 uint64_t trace:1;
1581                 uint64_t rml:1;
1582                 uint64_t twsi:1;
1583                 uint64_t wdog_sum:1;
1584                 uint64_t pci_msi:4;
1585                 uint64_t pci_int:4;
1586                 uint64_t uart:2;
1587                 uint64_t mbox:2;
1588                 uint64_t gpio:16;
1589                 uint64_t workq:16;
1590         } cn52xx;
1591         struct cvmx_ciu_intx_sum4_cn52xx cn52xxp1;
1592         struct cvmx_ciu_intx_sum4_cn56xx {
1593                 uint64_t bootdma:1;
1594                 uint64_t mii:1;
1595                 uint64_t ipdppthr:1;
1596                 uint64_t powiq:1;
1597                 uint64_t twsi2:1;
1598                 uint64_t reserved_57_58:2;
1599                 uint64_t usb:1;
1600                 uint64_t timer:4;
1601                 uint64_t key_zero:1;
1602                 uint64_t ipd_drp:1;
1603                 uint64_t gmx_drp:2;
1604                 uint64_t trace:1;
1605                 uint64_t rml:1;
1606                 uint64_t twsi:1;
1607                 uint64_t wdog_sum:1;
1608                 uint64_t pci_msi:4;
1609                 uint64_t pci_int:4;
1610                 uint64_t uart:2;
1611                 uint64_t mbox:2;
1612                 uint64_t gpio:16;
1613                 uint64_t workq:16;
1614         } cn56xx;
1615         struct cvmx_ciu_intx_sum4_cn56xx cn56xxp1;
1616         struct cvmx_ciu_intx_sum4_cn58xx {
1617                 uint64_t reserved_56_63:8;
1618                 uint64_t timer:4;
1619                 uint64_t key_zero:1;
1620                 uint64_t ipd_drp:1;
1621                 uint64_t gmx_drp:2;
1622                 uint64_t trace:1;
1623                 uint64_t rml:1;
1624                 uint64_t twsi:1;
1625                 uint64_t wdog_sum:1;
1626                 uint64_t pci_msi:4;
1627                 uint64_t pci_int:4;
1628                 uint64_t uart:2;
1629                 uint64_t mbox:2;
1630                 uint64_t gpio:16;
1631                 uint64_t workq:16;
1632         } cn58xx;
1633         struct cvmx_ciu_intx_sum4_cn58xx cn58xxp1;
1634         struct cvmx_ciu_intx_sum4_cn52xx cn63xx;
1635         struct cvmx_ciu_intx_sum4_cn52xx cn63xxp1;
1636 };
1637
1638 union cvmx_ciu_int33_sum0 {
1639         uint64_t u64;
1640         struct cvmx_ciu_int33_sum0_s {
1641                 uint64_t bootdma:1;
1642                 uint64_t mii:1;
1643                 uint64_t ipdppthr:1;
1644                 uint64_t powiq:1;
1645                 uint64_t twsi2:1;
1646                 uint64_t reserved_57_58:2;
1647                 uint64_t usb:1;
1648                 uint64_t timer:4;
1649                 uint64_t reserved_51_51:1;
1650                 uint64_t ipd_drp:1;
1651                 uint64_t reserved_49_49:1;
1652                 uint64_t gmx_drp:1;
1653                 uint64_t trace:1;
1654                 uint64_t rml:1;
1655                 uint64_t twsi:1;
1656                 uint64_t wdog_sum:1;
1657                 uint64_t pci_msi:4;
1658                 uint64_t pci_int:4;
1659                 uint64_t uart:2;
1660                 uint64_t mbox:2;
1661                 uint64_t gpio:16;
1662                 uint64_t workq:16;
1663         } s;
1664         struct cvmx_ciu_int33_sum0_s cn63xx;
1665         struct cvmx_ciu_int33_sum0_s cn63xxp1;
1666 };
1667
1668 union cvmx_ciu_int_dbg_sel {
1669         uint64_t u64;
1670         struct cvmx_ciu_int_dbg_sel_s {
1671                 uint64_t reserved_19_63:45;
1672                 uint64_t sel:3;
1673                 uint64_t reserved_10_15:6;
1674                 uint64_t irq:2;
1675                 uint64_t reserved_3_7:5;
1676                 uint64_t pp:3;
1677         } s;
1678         struct cvmx_ciu_int_dbg_sel_s cn63xx;
1679 };
1680
1681 union cvmx_ciu_int_sum1 {
1682         uint64_t u64;
1683         struct cvmx_ciu_int_sum1_s {
1684                 uint64_t rst:1;
1685                 uint64_t reserved_57_62:6;
1686                 uint64_t dfm:1;
1687                 uint64_t reserved_53_55:3;
1688                 uint64_t lmc0:1;
1689                 uint64_t srio1:1;
1690                 uint64_t srio0:1;
1691                 uint64_t pem1:1;
1692                 uint64_t pem0:1;
1693                 uint64_t ptp:1;
1694                 uint64_t agl:1;
1695                 uint64_t reserved_37_45:9;
1696                 uint64_t agx0:1;
1697                 uint64_t dpi:1;
1698                 uint64_t sli:1;
1699                 uint64_t usb:1;
1700                 uint64_t dfa:1;
1701                 uint64_t key:1;
1702                 uint64_t rad:1;
1703                 uint64_t tim:1;
1704                 uint64_t zip:1;
1705                 uint64_t pko:1;
1706                 uint64_t pip:1;
1707                 uint64_t ipd:1;
1708                 uint64_t l2c:1;
1709                 uint64_t pow:1;
1710                 uint64_t fpa:1;
1711                 uint64_t iob:1;
1712                 uint64_t mio:1;
1713                 uint64_t nand:1;
1714                 uint64_t mii1:1;
1715                 uint64_t usb1:1;
1716                 uint64_t uart2:1;
1717                 uint64_t wdog:16;
1718         } s;
1719         struct cvmx_ciu_int_sum1_cn30xx {
1720                 uint64_t reserved_1_63:63;
1721                 uint64_t wdog:1;
1722         } cn30xx;
1723         struct cvmx_ciu_int_sum1_cn31xx {
1724                 uint64_t reserved_2_63:62;
1725                 uint64_t wdog:2;
1726         } cn31xx;
1727         struct cvmx_ciu_int_sum1_cn38xx {
1728                 uint64_t reserved_16_63:48;
1729                 uint64_t wdog:16;
1730         } cn38xx;
1731         struct cvmx_ciu_int_sum1_cn38xx cn38xxp2;
1732         struct cvmx_ciu_int_sum1_cn31xx cn50xx;
1733         struct cvmx_ciu_int_sum1_cn52xx {
1734                 uint64_t reserved_20_63:44;
1735                 uint64_t nand:1;
1736                 uint64_t mii1:1;
1737                 uint64_t usb1:1;
1738                 uint64_t uart2:1;
1739                 uint64_t reserved_4_15:12;
1740                 uint64_t wdog:4;
1741         } cn52xx;
1742         struct cvmx_ciu_int_sum1_cn52xxp1 {
1743                 uint64_t reserved_19_63:45;
1744                 uint64_t mii1:1;
1745                 uint64_t usb1:1;
1746                 uint64_t uart2:1;
1747                 uint64_t reserved_4_15:12;
1748                 uint64_t wdog:4;
1749         } cn52xxp1;
1750         struct cvmx_ciu_int_sum1_cn56xx {
1751                 uint64_t reserved_12_63:52;
1752                 uint64_t wdog:12;
1753         } cn56xx;
1754         struct cvmx_ciu_int_sum1_cn56xx cn56xxp1;
1755         struct cvmx_ciu_int_sum1_cn38xx cn58xx;
1756         struct cvmx_ciu_int_sum1_cn38xx cn58xxp1;
1757         struct cvmx_ciu_int_sum1_cn63xx {
1758                 uint64_t rst:1;
1759                 uint64_t reserved_57_62:6;
1760                 uint64_t dfm:1;
1761                 uint64_t reserved_53_55:3;
1762                 uint64_t lmc0:1;
1763                 uint64_t srio1:1;
1764                 uint64_t srio0:1;
1765                 uint64_t pem1:1;
1766                 uint64_t pem0:1;
1767                 uint64_t ptp:1;
1768                 uint64_t agl:1;
1769                 uint64_t reserved_37_45:9;
1770                 uint64_t agx0:1;
1771                 uint64_t dpi:1;
1772                 uint64_t sli:1;
1773                 uint64_t usb:1;
1774                 uint64_t dfa:1;
1775                 uint64_t key:1;
1776                 uint64_t rad:1;
1777                 uint64_t tim:1;
1778                 uint64_t zip:1;
1779                 uint64_t pko:1;
1780                 uint64_t pip:1;
1781                 uint64_t ipd:1;
1782                 uint64_t l2c:1;
1783                 uint64_t pow:1;
1784                 uint64_t fpa:1;
1785                 uint64_t iob:1;
1786                 uint64_t mio:1;
1787                 uint64_t nand:1;
1788                 uint64_t mii1:1;
1789                 uint64_t reserved_6_17:12;
1790                 uint64_t wdog:6;
1791         } cn63xx;
1792         struct cvmx_ciu_int_sum1_cn63xx cn63xxp1;
1793 };
1794
1795 union cvmx_ciu_mbox_clrx {
1796         uint64_t u64;
1797         struct cvmx_ciu_mbox_clrx_s {
1798                 uint64_t reserved_32_63:32;
1799                 uint64_t bits:32;
1800         } s;
1801         struct cvmx_ciu_mbox_clrx_s cn30xx;
1802         struct cvmx_ciu_mbox_clrx_s cn31xx;
1803         struct cvmx_ciu_mbox_clrx_s cn38xx;
1804         struct cvmx_ciu_mbox_clrx_s cn38xxp2;
1805         struct cvmx_ciu_mbox_clrx_s cn50xx;
1806         struct cvmx_ciu_mbox_clrx_s cn52xx;
1807         struct cvmx_ciu_mbox_clrx_s cn52xxp1;
1808         struct cvmx_ciu_mbox_clrx_s cn56xx;
1809         struct cvmx_ciu_mbox_clrx_s cn56xxp1;
1810         struct cvmx_ciu_mbox_clrx_s cn58xx;
1811         struct cvmx_ciu_mbox_clrx_s cn58xxp1;
1812         struct cvmx_ciu_mbox_clrx_s cn63xx;
1813         struct cvmx_ciu_mbox_clrx_s cn63xxp1;
1814 };
1815
1816 union cvmx_ciu_mbox_setx {
1817         uint64_t u64;
1818         struct cvmx_ciu_mbox_setx_s {
1819                 uint64_t reserved_32_63:32;
1820                 uint64_t bits:32;
1821         } s;
1822         struct cvmx_ciu_mbox_setx_s cn30xx;
1823         struct cvmx_ciu_mbox_setx_s cn31xx;
1824         struct cvmx_ciu_mbox_setx_s cn38xx;
1825         struct cvmx_ciu_mbox_setx_s cn38xxp2;
1826         struct cvmx_ciu_mbox_setx_s cn50xx;
1827         struct cvmx_ciu_mbox_setx_s cn52xx;
1828         struct cvmx_ciu_mbox_setx_s cn52xxp1;
1829         struct cvmx_ciu_mbox_setx_s cn56xx;
1830         struct cvmx_ciu_mbox_setx_s cn56xxp1;
1831         struct cvmx_ciu_mbox_setx_s cn58xx;
1832         struct cvmx_ciu_mbox_setx_s cn58xxp1;
1833         struct cvmx_ciu_mbox_setx_s cn63xx;
1834         struct cvmx_ciu_mbox_setx_s cn63xxp1;
1835 };
1836
1837 union cvmx_ciu_nmi {
1838         uint64_t u64;
1839         struct cvmx_ciu_nmi_s {
1840                 uint64_t reserved_16_63:48;
1841                 uint64_t nmi:16;
1842         } s;
1843         struct cvmx_ciu_nmi_cn30xx {
1844                 uint64_t reserved_1_63:63;
1845                 uint64_t nmi:1;
1846         } cn30xx;
1847         struct cvmx_ciu_nmi_cn31xx {
1848                 uint64_t reserved_2_63:62;
1849                 uint64_t nmi:2;
1850         } cn31xx;
1851         struct cvmx_ciu_nmi_s cn38xx;
1852         struct cvmx_ciu_nmi_s cn38xxp2;
1853         struct cvmx_ciu_nmi_cn31xx cn50xx;
1854         struct cvmx_ciu_nmi_cn52xx {
1855                 uint64_t reserved_4_63:60;
1856                 uint64_t nmi:4;
1857         } cn52xx;
1858         struct cvmx_ciu_nmi_cn52xx cn52xxp1;
1859         struct cvmx_ciu_nmi_cn56xx {
1860                 uint64_t reserved_12_63:52;
1861                 uint64_t nmi:12;
1862         } cn56xx;
1863         struct cvmx_ciu_nmi_cn56xx cn56xxp1;
1864         struct cvmx_ciu_nmi_s cn58xx;
1865         struct cvmx_ciu_nmi_s cn58xxp1;
1866         struct cvmx_ciu_nmi_cn63xx {
1867                 uint64_t reserved_6_63:58;
1868                 uint64_t nmi:6;
1869         } cn63xx;
1870         struct cvmx_ciu_nmi_cn63xx cn63xxp1;
1871 };
1872
1873 union cvmx_ciu_pci_inta {
1874         uint64_t u64;
1875         struct cvmx_ciu_pci_inta_s {
1876                 uint64_t reserved_2_63:62;
1877                 uint64_t intr:2;
1878         } s;
1879         struct cvmx_ciu_pci_inta_s cn30xx;
1880         struct cvmx_ciu_pci_inta_s cn31xx;
1881         struct cvmx_ciu_pci_inta_s cn38xx;
1882         struct cvmx_ciu_pci_inta_s cn38xxp2;
1883         struct cvmx_ciu_pci_inta_s cn50xx;
1884         struct cvmx_ciu_pci_inta_s cn52xx;
1885         struct cvmx_ciu_pci_inta_s cn52xxp1;
1886         struct cvmx_ciu_pci_inta_s cn56xx;
1887         struct cvmx_ciu_pci_inta_s cn56xxp1;
1888         struct cvmx_ciu_pci_inta_s cn58xx;
1889         struct cvmx_ciu_pci_inta_s cn58xxp1;
1890         struct cvmx_ciu_pci_inta_s cn63xx;
1891         struct cvmx_ciu_pci_inta_s cn63xxp1;
1892 };
1893
1894 union cvmx_ciu_pp_dbg {
1895         uint64_t u64;
1896         struct cvmx_ciu_pp_dbg_s {
1897                 uint64_t reserved_16_63:48;
1898                 uint64_t ppdbg:16;
1899         } s;
1900         struct cvmx_ciu_pp_dbg_cn30xx {
1901                 uint64_t reserved_1_63:63;
1902                 uint64_t ppdbg:1;
1903         } cn30xx;
1904         struct cvmx_ciu_pp_dbg_cn31xx {
1905                 uint64_t reserved_2_63:62;
1906                 uint64_t ppdbg:2;
1907         } cn31xx;
1908         struct cvmx_ciu_pp_dbg_s cn38xx;
1909         struct cvmx_ciu_pp_dbg_s cn38xxp2;
1910         struct cvmx_ciu_pp_dbg_cn31xx cn50xx;
1911         struct cvmx_ciu_pp_dbg_cn52xx {
1912                 uint64_t reserved_4_63:60;
1913                 uint64_t ppdbg:4;
1914         } cn52xx;
1915         struct cvmx_ciu_pp_dbg_cn52xx cn52xxp1;
1916         struct cvmx_ciu_pp_dbg_cn56xx {
1917                 uint64_t reserved_12_63:52;
1918                 uint64_t ppdbg:12;
1919         } cn56xx;
1920         struct cvmx_ciu_pp_dbg_cn56xx cn56xxp1;
1921         struct cvmx_ciu_pp_dbg_s cn58xx;
1922         struct cvmx_ciu_pp_dbg_s cn58xxp1;
1923         struct cvmx_ciu_pp_dbg_cn63xx {
1924                 uint64_t reserved_6_63:58;
1925                 uint64_t ppdbg:6;
1926         } cn63xx;
1927         struct cvmx_ciu_pp_dbg_cn63xx cn63xxp1;
1928 };
1929
1930 union cvmx_ciu_pp_pokex {
1931         uint64_t u64;
1932         struct cvmx_ciu_pp_pokex_s {
1933                 uint64_t poke:64;
1934         } s;
1935         struct cvmx_ciu_pp_pokex_s cn30xx;
1936         struct cvmx_ciu_pp_pokex_s cn31xx;
1937         struct cvmx_ciu_pp_pokex_s cn38xx;
1938         struct cvmx_ciu_pp_pokex_s cn38xxp2;
1939         struct cvmx_ciu_pp_pokex_s cn50xx;
1940         struct cvmx_ciu_pp_pokex_s cn52xx;
1941         struct cvmx_ciu_pp_pokex_s cn52xxp1;
1942         struct cvmx_ciu_pp_pokex_s cn56xx;
1943         struct cvmx_ciu_pp_pokex_s cn56xxp1;
1944         struct cvmx_ciu_pp_pokex_s cn58xx;
1945         struct cvmx_ciu_pp_pokex_s cn58xxp1;
1946         struct cvmx_ciu_pp_pokex_s cn63xx;
1947         struct cvmx_ciu_pp_pokex_s cn63xxp1;
1948 };
1949
1950 union cvmx_ciu_pp_rst {
1951         uint64_t u64;
1952         struct cvmx_ciu_pp_rst_s {
1953                 uint64_t reserved_16_63:48;
1954                 uint64_t rst:15;
1955                 uint64_t rst0:1;
1956         } s;
1957         struct cvmx_ciu_pp_rst_cn30xx {
1958                 uint64_t reserved_1_63:63;
1959                 uint64_t rst0:1;
1960         } cn30xx;
1961         struct cvmx_ciu_pp_rst_cn31xx {
1962                 uint64_t reserved_2_63:62;
1963                 uint64_t rst:1;
1964                 uint64_t rst0:1;
1965         } cn31xx;
1966         struct cvmx_ciu_pp_rst_s cn38xx;
1967         struct cvmx_ciu_pp_rst_s cn38xxp2;
1968         struct cvmx_ciu_pp_rst_cn31xx cn50xx;
1969         struct cvmx_ciu_pp_rst_cn52xx {
1970                 uint64_t reserved_4_63:60;
1971                 uint64_t rst:3;
1972                 uint64_t rst0:1;
1973         } cn52xx;
1974         struct cvmx_ciu_pp_rst_cn52xx cn52xxp1;
1975         struct cvmx_ciu_pp_rst_cn56xx {
1976                 uint64_t reserved_12_63:52;
1977                 uint64_t rst:11;
1978                 uint64_t rst0:1;
1979         } cn56xx;
1980         struct cvmx_ciu_pp_rst_cn56xx cn56xxp1;
1981         struct cvmx_ciu_pp_rst_s cn58xx;
1982         struct cvmx_ciu_pp_rst_s cn58xxp1;
1983         struct cvmx_ciu_pp_rst_cn63xx {
1984                 uint64_t reserved_6_63:58;
1985                 uint64_t rst:5;
1986                 uint64_t rst0:1;
1987         } cn63xx;
1988         struct cvmx_ciu_pp_rst_cn63xx cn63xxp1;
1989 };
1990
1991 union cvmx_ciu_qlm0 {
1992         uint64_t u64;
1993         struct cvmx_ciu_qlm0_s {
1994                 uint64_t g2bypass:1;
1995                 uint64_t reserved_53_62:10;
1996                 uint64_t g2deemph:5;
1997                 uint64_t reserved_45_47:3;
1998                 uint64_t g2margin:5;
1999                 uint64_t reserved_32_39:8;
2000                 uint64_t txbypass:1;
2001                 uint64_t reserved_21_30:10;
2002                 uint64_t txdeemph:5;
2003                 uint64_t reserved_13_15:3;
2004                 uint64_t txmargin:5;
2005                 uint64_t reserved_4_7:4;
2006                 uint64_t lane_en:4;
2007         } s;
2008         struct cvmx_ciu_qlm0_s cn63xx;
2009         struct cvmx_ciu_qlm0_cn63xxp1 {
2010                 uint64_t reserved_32_63:32;
2011                 uint64_t txbypass:1;
2012                 uint64_t reserved_20_30:11;
2013                 uint64_t txdeemph:4;
2014                 uint64_t reserved_13_15:3;
2015                 uint64_t txmargin:5;
2016                 uint64_t reserved_4_7:4;
2017                 uint64_t lane_en:4;
2018         } cn63xxp1;
2019 };
2020
2021 union cvmx_ciu_qlm1 {
2022         uint64_t u64;
2023         struct cvmx_ciu_qlm1_s {
2024                 uint64_t g2bypass:1;
2025                 uint64_t reserved_53_62:10;
2026                 uint64_t g2deemph:5;
2027                 uint64_t reserved_45_47:3;
2028                 uint64_t g2margin:5;
2029                 uint64_t reserved_32_39:8;
2030                 uint64_t txbypass:1;
2031                 uint64_t reserved_21_30:10;
2032                 uint64_t txdeemph:5;
2033                 uint64_t reserved_13_15:3;
2034                 uint64_t txmargin:5;
2035                 uint64_t reserved_4_7:4;
2036                 uint64_t lane_en:4;
2037         } s;
2038         struct cvmx_ciu_qlm1_s cn63xx;
2039         struct cvmx_ciu_qlm1_cn63xxp1 {
2040                 uint64_t reserved_32_63:32;
2041                 uint64_t txbypass:1;
2042                 uint64_t reserved_20_30:11;
2043                 uint64_t txdeemph:4;
2044                 uint64_t reserved_13_15:3;
2045                 uint64_t txmargin:5;
2046                 uint64_t reserved_4_7:4;
2047                 uint64_t lane_en:4;
2048         } cn63xxp1;
2049 };
2050
2051 union cvmx_ciu_qlm2 {
2052         uint64_t u64;
2053         struct cvmx_ciu_qlm2_s {
2054                 uint64_t reserved_32_63:32;
2055                 uint64_t txbypass:1;
2056                 uint64_t reserved_21_30:10;
2057                 uint64_t txdeemph:5;
2058                 uint64_t reserved_13_15:3;
2059                 uint64_t txmargin:5;
2060                 uint64_t reserved_4_7:4;
2061                 uint64_t lane_en:4;
2062         } s;
2063         struct cvmx_ciu_qlm2_s cn63xx;
2064         struct cvmx_ciu_qlm2_cn63xxp1 {
2065                 uint64_t reserved_32_63:32;
2066                 uint64_t txbypass:1;
2067                 uint64_t reserved_20_30:11;
2068                 uint64_t txdeemph:4;
2069                 uint64_t reserved_13_15:3;
2070                 uint64_t txmargin:5;
2071                 uint64_t reserved_4_7:4;
2072                 uint64_t lane_en:4;
2073         } cn63xxp1;
2074 };
2075
2076 union cvmx_ciu_qlm_dcok {
2077         uint64_t u64;
2078         struct cvmx_ciu_qlm_dcok_s {
2079                 uint64_t reserved_4_63:60;
2080                 uint64_t qlm_dcok:4;
2081         } s;
2082         struct cvmx_ciu_qlm_dcok_cn52xx {
2083                 uint64_t reserved_2_63:62;
2084                 uint64_t qlm_dcok:2;
2085         } cn52xx;
2086         struct cvmx_ciu_qlm_dcok_cn52xx cn52xxp1;
2087         struct cvmx_ciu_qlm_dcok_s cn56xx;
2088         struct cvmx_ciu_qlm_dcok_s cn56xxp1;
2089 };
2090
2091 union cvmx_ciu_qlm_jtgc {
2092         uint64_t u64;
2093         struct cvmx_ciu_qlm_jtgc_s {
2094                 uint64_t reserved_11_63:53;
2095                 uint64_t clk_div:3;
2096                 uint64_t reserved_6_7:2;
2097                 uint64_t mux_sel:2;
2098                 uint64_t bypass:4;
2099         } s;
2100         struct cvmx_ciu_qlm_jtgc_cn52xx {
2101                 uint64_t reserved_11_63:53;
2102                 uint64_t clk_div:3;
2103                 uint64_t reserved_5_7:3;
2104                 uint64_t mux_sel:1;
2105                 uint64_t reserved_2_3:2;
2106                 uint64_t bypass:2;
2107         } cn52xx;
2108         struct cvmx_ciu_qlm_jtgc_cn52xx cn52xxp1;
2109         struct cvmx_ciu_qlm_jtgc_s cn56xx;
2110         struct cvmx_ciu_qlm_jtgc_s cn56xxp1;
2111         struct cvmx_ciu_qlm_jtgc_cn63xx {
2112                 uint64_t reserved_11_63:53;
2113                 uint64_t clk_div:3;
2114                 uint64_t reserved_6_7:2;
2115                 uint64_t mux_sel:2;
2116                 uint64_t reserved_3_3:1;
2117                 uint64_t bypass:3;
2118         } cn63xx;
2119         struct cvmx_ciu_qlm_jtgc_cn63xx cn63xxp1;
2120 };
2121
2122 union cvmx_ciu_qlm_jtgd {
2123         uint64_t u64;
2124         struct cvmx_ciu_qlm_jtgd_s {
2125                 uint64_t capture:1;
2126                 uint64_t shift:1;
2127                 uint64_t update:1;
2128                 uint64_t reserved_44_60:17;
2129                 uint64_t select:4;
2130                 uint64_t reserved_37_39:3;
2131                 uint64_t shft_cnt:5;
2132                 uint64_t shft_reg:32;
2133         } s;
2134         struct cvmx_ciu_qlm_jtgd_cn52xx {
2135                 uint64_t capture:1;
2136                 uint64_t shift:1;
2137                 uint64_t update:1;
2138                 uint64_t reserved_42_60:19;
2139                 uint64_t select:2;
2140                 uint64_t reserved_37_39:3;
2141                 uint64_t shft_cnt:5;
2142                 uint64_t shft_reg:32;
2143         } cn52xx;
2144         struct cvmx_ciu_qlm_jtgd_cn52xx cn52xxp1;
2145         struct cvmx_ciu_qlm_jtgd_s cn56xx;
2146         struct cvmx_ciu_qlm_jtgd_cn56xxp1 {
2147                 uint64_t capture:1;
2148                 uint64_t shift:1;
2149                 uint64_t update:1;
2150                 uint64_t reserved_37_60:24;
2151                 uint64_t shft_cnt:5;
2152                 uint64_t shft_reg:32;
2153         } cn56xxp1;
2154         struct cvmx_ciu_qlm_jtgd_cn63xx {
2155                 uint64_t capture:1;
2156                 uint64_t shift:1;
2157                 uint64_t update:1;
2158                 uint64_t reserved_43_60:18;
2159                 uint64_t select:3;
2160                 uint64_t reserved_37_39:3;
2161                 uint64_t shft_cnt:5;
2162                 uint64_t shft_reg:32;
2163         } cn63xx;
2164         struct cvmx_ciu_qlm_jtgd_cn63xx cn63xxp1;
2165 };
2166
2167 union cvmx_ciu_soft_bist {
2168         uint64_t u64;
2169         struct cvmx_ciu_soft_bist_s {
2170                 uint64_t reserved_1_63:63;
2171                 uint64_t soft_bist:1;
2172         } s;
2173         struct cvmx_ciu_soft_bist_s cn30xx;
2174         struct cvmx_ciu_soft_bist_s cn31xx;
2175         struct cvmx_ciu_soft_bist_s cn38xx;
2176         struct cvmx_ciu_soft_bist_s cn38xxp2;
2177         struct cvmx_ciu_soft_bist_s cn50xx;
2178         struct cvmx_ciu_soft_bist_s cn52xx;
2179         struct cvmx_ciu_soft_bist_s cn52xxp1;
2180         struct cvmx_ciu_soft_bist_s cn56xx;
2181         struct cvmx_ciu_soft_bist_s cn56xxp1;
2182         struct cvmx_ciu_soft_bist_s cn58xx;
2183         struct cvmx_ciu_soft_bist_s cn58xxp1;
2184         struct cvmx_ciu_soft_bist_s cn63xx;
2185         struct cvmx_ciu_soft_bist_s cn63xxp1;
2186 };
2187
2188 union cvmx_ciu_soft_prst {
2189         uint64_t u64;
2190         struct cvmx_ciu_soft_prst_s {
2191                 uint64_t reserved_3_63:61;
2192                 uint64_t host64:1;
2193                 uint64_t npi:1;
2194                 uint64_t soft_prst:1;
2195         } s;
2196         struct cvmx_ciu_soft_prst_s cn30xx;
2197         struct cvmx_ciu_soft_prst_s cn31xx;
2198         struct cvmx_ciu_soft_prst_s cn38xx;
2199         struct cvmx_ciu_soft_prst_s cn38xxp2;
2200         struct cvmx_ciu_soft_prst_s cn50xx;
2201         struct cvmx_ciu_soft_prst_cn52xx {
2202                 uint64_t reserved_1_63:63;
2203                 uint64_t soft_prst:1;
2204         } cn52xx;
2205         struct cvmx_ciu_soft_prst_cn52xx cn52xxp1;
2206         struct cvmx_ciu_soft_prst_cn52xx cn56xx;
2207         struct cvmx_ciu_soft_prst_cn52xx cn56xxp1;
2208         struct cvmx_ciu_soft_prst_s cn58xx;
2209         struct cvmx_ciu_soft_prst_s cn58xxp1;
2210         struct cvmx_ciu_soft_prst_cn52xx cn63xx;
2211         struct cvmx_ciu_soft_prst_cn52xx cn63xxp1;
2212 };
2213
2214 union cvmx_ciu_soft_prst1 {
2215         uint64_t u64;
2216         struct cvmx_ciu_soft_prst1_s {
2217                 uint64_t reserved_1_63:63;
2218                 uint64_t soft_prst:1;
2219         } s;
2220         struct cvmx_ciu_soft_prst1_s cn52xx;
2221         struct cvmx_ciu_soft_prst1_s cn52xxp1;
2222         struct cvmx_ciu_soft_prst1_s cn56xx;
2223         struct cvmx_ciu_soft_prst1_s cn56xxp1;
2224         struct cvmx_ciu_soft_prst1_s cn63xx;
2225         struct cvmx_ciu_soft_prst1_s cn63xxp1;
2226 };
2227
2228 union cvmx_ciu_soft_rst {
2229         uint64_t u64;
2230         struct cvmx_ciu_soft_rst_s {
2231                 uint64_t reserved_1_63:63;
2232                 uint64_t soft_rst:1;
2233         } s;
2234         struct cvmx_ciu_soft_rst_s cn30xx;
2235         struct cvmx_ciu_soft_rst_s cn31xx;
2236         struct cvmx_ciu_soft_rst_s cn38xx;
2237         struct cvmx_ciu_soft_rst_s cn38xxp2;
2238         struct cvmx_ciu_soft_rst_s cn50xx;
2239         struct cvmx_ciu_soft_rst_s cn52xx;
2240         struct cvmx_ciu_soft_rst_s cn52xxp1;
2241         struct cvmx_ciu_soft_rst_s cn56xx;
2242         struct cvmx_ciu_soft_rst_s cn56xxp1;
2243         struct cvmx_ciu_soft_rst_s cn58xx;
2244         struct cvmx_ciu_soft_rst_s cn58xxp1;
2245         struct cvmx_ciu_soft_rst_s cn63xx;
2246         struct cvmx_ciu_soft_rst_s cn63xxp1;
2247 };
2248
2249 union cvmx_ciu_timx {
2250         uint64_t u64;
2251         struct cvmx_ciu_timx_s {
2252                 uint64_t reserved_37_63:27;
2253                 uint64_t one_shot:1;
2254                 uint64_t len:36;
2255         } s;
2256         struct cvmx_ciu_timx_s cn30xx;
2257         struct cvmx_ciu_timx_s cn31xx;
2258         struct cvmx_ciu_timx_s cn38xx;
2259         struct cvmx_ciu_timx_s cn38xxp2;
2260         struct cvmx_ciu_timx_s cn50xx;
2261         struct cvmx_ciu_timx_s cn52xx;
2262         struct cvmx_ciu_timx_s cn52xxp1;
2263         struct cvmx_ciu_timx_s cn56xx;
2264         struct cvmx_ciu_timx_s cn56xxp1;
2265         struct cvmx_ciu_timx_s cn58xx;
2266         struct cvmx_ciu_timx_s cn58xxp1;
2267         struct cvmx_ciu_timx_s cn63xx;
2268         struct cvmx_ciu_timx_s cn63xxp1;
2269 };
2270
2271 union cvmx_ciu_wdogx {
2272         uint64_t u64;
2273         struct cvmx_ciu_wdogx_s {
2274                 uint64_t reserved_46_63:18;
2275                 uint64_t gstopen:1;
2276                 uint64_t dstop:1;
2277                 uint64_t cnt:24;
2278                 uint64_t len:16;
2279                 uint64_t state:2;
2280                 uint64_t mode:2;
2281         } s;
2282         struct cvmx_ciu_wdogx_s cn30xx;
2283         struct cvmx_ciu_wdogx_s cn31xx;
2284         struct cvmx_ciu_wdogx_s cn38xx;
2285         struct cvmx_ciu_wdogx_s cn38xxp2;
2286         struct cvmx_ciu_wdogx_s cn50xx;
2287         struct cvmx_ciu_wdogx_s cn52xx;
2288         struct cvmx_ciu_wdogx_s cn52xxp1;
2289         struct cvmx_ciu_wdogx_s cn56xx;
2290         struct cvmx_ciu_wdogx_s cn56xxp1;
2291         struct cvmx_ciu_wdogx_s cn58xx;
2292         struct cvmx_ciu_wdogx_s cn58xxp1;
2293         struct cvmx_ciu_wdogx_s cn63xx;
2294         struct cvmx_ciu_wdogx_s cn63xxp1;
2295 };
2296
2297 #endif