Merge branch 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm into...
[pandora-kernel.git] / arch / mips / alchemy / devboards / db1200 / platform.c
1 /*
2  * DBAu1200 board platform device registration
3  *
4  * Copyright (C) 2008-2009 Manuel Lauss
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20
21 #include <linux/dma-mapping.h>
22 #include <linux/gpio.h>
23 #include <linux/i2c.h>
24 #include <linux/init.h>
25 #include <linux/io.h>
26 #include <linux/leds.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_8250.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/flash.h>
35 #include <linux/smc91x.h>
36
37 #include <asm/mach-au1x00/au1100_mmc.h>
38 #include <asm/mach-au1x00/au1xxx_dbdma.h>
39 #include <asm/mach-au1x00/au1550_spi.h>
40 #include <asm/mach-db1x00/bcsr.h>
41 #include <asm/mach-db1x00/db1200.h>
42
43 #include "../platform.h"
44
45 static struct mtd_partition db1200_spiflash_parts[] = {
46         {
47                 .name   = "DB1200 SPI flash",
48                 .offset = 0,
49                 .size   = MTDPART_SIZ_FULL,
50         },
51 };
52
53 static struct flash_platform_data db1200_spiflash_data = {
54         .name           = "s25fl001",
55         .parts          = db1200_spiflash_parts,
56         .nr_parts       = ARRAY_SIZE(db1200_spiflash_parts),
57         .type           = "m25p10",
58 };
59
60 static struct spi_board_info db1200_spi_devs[] __initdata = {
61         {
62                 /* TI TMP121AIDBVR temp sensor */
63                 .modalias       = "tmp121",
64                 .max_speed_hz   = 2000000,
65                 .bus_num        = 0,
66                 .chip_select    = 0,
67                 .mode           = 0,
68         },
69         {
70                 /* Spansion S25FL001D0FMA SPI flash */
71                 .modalias       = "m25p80",
72                 .max_speed_hz   = 50000000,
73                 .bus_num        = 0,
74                 .chip_select    = 1,
75                 .mode           = 0,
76                 .platform_data  = &db1200_spiflash_data,
77         },
78 };
79
80 static struct i2c_board_info db1200_i2c_devs[] __initdata = {
81         {
82                 /* AT24C04-10 I2C eeprom */
83                 I2C_BOARD_INFO("24c04", 0x52),
84         },
85         {
86                 /* Philips NE1619 temp/voltage sensor (adm1025 drv) */
87                 I2C_BOARD_INFO("ne1619", 0x2d),
88         },
89         {
90                 /* I2S audio codec WM8731 */
91                 I2C_BOARD_INFO("wm8731", 0x1b),
92         },
93 };
94
95 /**********************************************************************/
96
97 static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
98                                  unsigned int ctrl)
99 {
100         struct nand_chip *this = mtd->priv;
101         unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
102
103         ioaddr &= 0xffffff00;
104
105         if (ctrl & NAND_CLE) {
106                 ioaddr += MEM_STNAND_CMD;
107         } else if (ctrl & NAND_ALE) {
108                 ioaddr += MEM_STNAND_ADDR;
109         } else {
110                 /* assume we want to r/w real data  by default */
111                 ioaddr += MEM_STNAND_DATA;
112         }
113         this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
114         if (cmd != NAND_CMD_NONE) {
115                 __raw_writeb(cmd, this->IO_ADDR_W);
116                 wmb();
117         }
118 }
119
120 static int au1200_nand_device_ready(struct mtd_info *mtd)
121 {
122         return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
123 }
124
125 static const char *db1200_part_probes[] = { "cmdlinepart", NULL };
126
127 static struct mtd_partition db1200_nand_parts[] = {
128         {
129                 .name   = "NAND FS 0",
130                 .offset = 0,
131                 .size   = 8 * 1024 * 1024,
132         },
133         {
134                 .name   = "NAND FS 1",
135                 .offset = MTDPART_OFS_APPEND,
136                 .size   = MTDPART_SIZ_FULL
137         },
138 };
139
140 struct platform_nand_data db1200_nand_platdata = {
141         .chip = {
142                 .nr_chips       = 1,
143                 .chip_offset    = 0,
144                 .nr_partitions  = ARRAY_SIZE(db1200_nand_parts),
145                 .partitions     = db1200_nand_parts,
146                 .chip_delay     = 20,
147                 .part_probe_types = db1200_part_probes,
148         },
149         .ctrl = {
150                 .dev_ready      = au1200_nand_device_ready,
151                 .cmd_ctrl       = au1200_nand_cmd_ctrl,
152         },
153 };
154
155 static struct resource db1200_nand_res[] = {
156         [0] = {
157                 .start  = DB1200_NAND_PHYS_ADDR,
158                 .end    = DB1200_NAND_PHYS_ADDR + 0xff,
159                 .flags  = IORESOURCE_MEM,
160         },
161 };
162
163 static struct platform_device db1200_nand_dev = {
164         .name           = "gen_nand",
165         .num_resources  = ARRAY_SIZE(db1200_nand_res),
166         .resource       = db1200_nand_res,
167         .id             = -1,
168         .dev            = {
169                 .platform_data = &db1200_nand_platdata,
170         }
171 };
172
173 /**********************************************************************/
174
175 static struct smc91x_platdata db1200_eth_data = {
176         .flags  = SMC91X_NOWAIT | SMC91X_USE_16BIT,
177         .leda   = RPC_LED_100_10,
178         .ledb   = RPC_LED_TX_RX,
179 };
180
181 static struct resource db1200_eth_res[] = {
182         [0] = {
183                 .start  = DB1200_ETH_PHYS_ADDR,
184                 .end    = DB1200_ETH_PHYS_ADDR + 0xf,
185                 .flags  = IORESOURCE_MEM,
186         },
187         [1] = {
188                 .start  = DB1200_ETH_INT,
189                 .end    = DB1200_ETH_INT,
190                 .flags  = IORESOURCE_IRQ,
191         },
192 };
193
194 static struct platform_device db1200_eth_dev = {
195         .dev    = {
196                 .platform_data  = &db1200_eth_data,
197         },
198         .name           = "smc91x",
199         .id             = -1,
200         .num_resources  = ARRAY_SIZE(db1200_eth_res),
201         .resource       = db1200_eth_res,
202 };
203
204 /**********************************************************************/
205
206 static struct resource db1200_ide_res[] = {
207         [0] = {
208                 .start  = DB1200_IDE_PHYS_ADDR,
209                 .end    = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
210                 .flags  = IORESOURCE_MEM,
211         },
212         [1] = {
213                 .start  = DB1200_IDE_INT,
214                 .end    = DB1200_IDE_INT,
215                 .flags  = IORESOURCE_IRQ,
216         },
217         [2] = {
218                 .start  = AU1200_DSCR_CMD0_DMA_REQ1,
219                 .end    = AU1200_DSCR_CMD0_DMA_REQ1,
220                 .flags  = IORESOURCE_DMA,
221         },
222 };
223
224 static u64 ide_dmamask = DMA_BIT_MASK(32);
225
226 static struct platform_device db1200_ide_dev = {
227         .name           = "au1200-ide",
228         .id             = 0,
229         .dev = {
230                 .dma_mask               = &ide_dmamask,
231                 .coherent_dma_mask      = DMA_BIT_MASK(32),
232         },
233         .num_resources  = ARRAY_SIZE(db1200_ide_res),
234         .resource       = db1200_ide_res,
235 };
236
237 /**********************************************************************/
238
239 static struct platform_device db1200_rtc_dev = {
240         .name   = "rtc-au1xxx",
241         .id     = -1,
242 };
243
244 /**********************************************************************/
245
246 /* SD carddetects:  they're supposed to be edge-triggered, but ack
247  * doesn't seem to work (CPLD Rev 2).  Instead, the screaming one
248  * is disabled and its counterpart enabled.  The 500ms timeout is
249  * because the carddetect isn't debounced in hardware.
250  */
251 static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
252 {
253         void(*mmc_cd)(struct mmc_host *, unsigned long);
254
255         if (irq == DB1200_SD0_INSERT_INT) {
256                 disable_irq_nosync(DB1200_SD0_INSERT_INT);
257                 enable_irq(DB1200_SD0_EJECT_INT);
258         } else {
259                 disable_irq_nosync(DB1200_SD0_EJECT_INT);
260                 enable_irq(DB1200_SD0_INSERT_INT);
261         }
262
263         /* link against CONFIG_MMC=m */
264         mmc_cd = symbol_get(mmc_detect_change);
265         if (mmc_cd) {
266                 mmc_cd(ptr, msecs_to_jiffies(500));
267                 symbol_put(mmc_detect_change);
268         }
269
270         return IRQ_HANDLED;
271 }
272
273 static int db1200_mmc_cd_setup(void *mmc_host, int en)
274 {
275         int ret;
276
277         if (en) {
278                 ret = request_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
279                                   IRQF_DISABLED, "sd_insert", mmc_host);
280                 if (ret)
281                         goto out;
282
283                 ret = request_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
284                                   IRQF_DISABLED, "sd_eject", mmc_host);
285                 if (ret) {
286                         free_irq(DB1200_SD0_INSERT_INT, mmc_host);
287                         goto out;
288                 }
289
290                 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT)
291                         enable_irq(DB1200_SD0_EJECT_INT);
292                 else
293                         enable_irq(DB1200_SD0_INSERT_INT);
294
295         } else {
296                 free_irq(DB1200_SD0_INSERT_INT, mmc_host);
297                 free_irq(DB1200_SD0_EJECT_INT, mmc_host);
298         }
299         ret = 0;
300 out:
301         return ret;
302 }
303
304 static void db1200_mmc_set_power(void *mmc_host, int state)
305 {
306         if (state) {
307                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
308                 msleep(400);    /* stabilization time */
309         } else
310                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
311 }
312
313 static int db1200_mmc_card_readonly(void *mmc_host)
314 {
315         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
316 }
317
318 static int db1200_mmc_card_inserted(void *mmc_host)
319 {
320         return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
321 }
322
323 static void db1200_mmcled_set(struct led_classdev *led,
324                               enum led_brightness brightness)
325 {
326         if (brightness != LED_OFF)
327                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
328         else
329                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
330 }
331
332 static struct led_classdev db1200_mmc_led = {
333         .brightness_set = db1200_mmcled_set,
334 };
335
336 static struct au1xmmc_platform_data db1200mmc_platdata = {
337         .cd_setup       = db1200_mmc_cd_setup,
338         .set_power      = db1200_mmc_set_power,
339         .card_inserted  = db1200_mmc_card_inserted,
340         .card_readonly  = db1200_mmc_card_readonly,
341         .led            = &db1200_mmc_led,
342 };
343
344 static struct resource au1200_mmc0_resources[] = {
345         [0] = {
346                 .start  = AU1100_SD0_PHYS_ADDR,
347                 .end    = AU1100_SD0_PHYS_ADDR + 0xfff,
348                 .flags  = IORESOURCE_MEM,
349         },
350         [1] = {
351                 .start  = AU1200_SD_INT,
352                 .end    = AU1200_SD_INT,
353                 .flags  = IORESOURCE_IRQ,
354         },
355         [2] = {
356                 .start  = AU1200_DSCR_CMD0_SDMS_TX0,
357                 .end    = AU1200_DSCR_CMD0_SDMS_TX0,
358                 .flags  = IORESOURCE_DMA,
359         },
360         [3] = {
361                 .start  = AU1200_DSCR_CMD0_SDMS_RX0,
362                 .end    = AU1200_DSCR_CMD0_SDMS_RX0,
363                 .flags  = IORESOURCE_DMA,
364         }
365 };
366
367 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
368
369 static struct platform_device db1200_mmc0_dev = {
370         .name           = "au1xxx-mmc",
371         .id             = 0,
372         .dev = {
373                 .dma_mask               = &au1xxx_mmc_dmamask,
374                 .coherent_dma_mask      = DMA_BIT_MASK(32),
375                 .platform_data          = &db1200mmc_platdata,
376         },
377         .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
378         .resource       = au1200_mmc0_resources,
379 };
380
381 /**********************************************************************/
382
383 static struct resource au1200_lcd_res[] = {
384         [0] = {
385                 .start  = AU1200_LCD_PHYS_ADDR,
386                 .end    = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
387                 .flags  = IORESOURCE_MEM,
388         },
389         [1] = {
390                 .start  = AU1200_LCD_INT,
391                 .end    = AU1200_LCD_INT,
392                 .flags  = IORESOURCE_IRQ,
393         }
394 };
395
396 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
397
398 static struct platform_device au1200_lcd_dev = {
399         .name           = "au1200-lcd",
400         .id             = 0,
401         .dev = {
402                 .dma_mask               = &au1200_lcd_dmamask,
403                 .coherent_dma_mask      = DMA_BIT_MASK(32),
404         },
405         .num_resources  = ARRAY_SIZE(au1200_lcd_res),
406         .resource       = au1200_lcd_res,
407 };
408
409 /**********************************************************************/
410
411 static struct resource au1200_psc0_res[] = {
412         [0] = {
413                 .start  = AU1550_PSC0_PHYS_ADDR,
414                 .end    = AU1550_PSC0_PHYS_ADDR + 0xfff,
415                 .flags  = IORESOURCE_MEM,
416         },
417         [1] = {
418                 .start  = AU1200_PSC0_INT,
419                 .end    = AU1200_PSC0_INT,
420                 .flags  = IORESOURCE_IRQ,
421         },
422         [2] = {
423                 .start  = AU1200_DSCR_CMD0_PSC0_TX,
424                 .end    = AU1200_DSCR_CMD0_PSC0_TX,
425                 .flags  = IORESOURCE_DMA,
426         },
427         [3] = {
428                 .start  = AU1200_DSCR_CMD0_PSC0_RX,
429                 .end    = AU1200_DSCR_CMD0_PSC0_RX,
430                 .flags  = IORESOURCE_DMA,
431         },
432 };
433
434 static struct platform_device db1200_i2c_dev = {
435         .name           = "au1xpsc_smbus",
436         .id             = 0,    /* bus number */
437         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
438         .resource       = au1200_psc0_res,
439 };
440
441 static void db1200_spi_cs_en(struct au1550_spi_info *spi, int cs, int pol)
442 {
443         if (cs)
444                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_SPISEL);
445         else
446                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_SPISEL, 0);
447 }
448
449 static struct au1550_spi_info db1200_spi_platdata = {
450         .mainclk_hz     = 50000000,     /* PSC0 clock */
451         .num_chipselect = 2,
452         .activate_cs    = db1200_spi_cs_en,
453 };
454
455 static u64 spi_dmamask = DMA_BIT_MASK(32);
456
457 static struct platform_device db1200_spi_dev = {
458         .dev    = {
459                 .dma_mask               = &spi_dmamask,
460                 .coherent_dma_mask      = DMA_BIT_MASK(32),
461                 .platform_data          = &db1200_spi_platdata,
462         },
463         .name           = "au1550-spi",
464         .id             = 0,    /* bus number */
465         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
466         .resource       = au1200_psc0_res,
467 };
468
469 static struct resource au1200_psc1_res[] = {
470         [0] = {
471                 .start  = AU1550_PSC1_PHYS_ADDR,
472                 .end    = AU1550_PSC1_PHYS_ADDR + 0xfff,
473                 .flags  = IORESOURCE_MEM,
474         },
475         [1] = {
476                 .start  = AU1200_PSC1_INT,
477                 .end    = AU1200_PSC1_INT,
478                 .flags  = IORESOURCE_IRQ,
479         },
480         [2] = {
481                 .start  = AU1200_DSCR_CMD0_PSC1_TX,
482                 .end    = AU1200_DSCR_CMD0_PSC1_TX,
483                 .flags  = IORESOURCE_DMA,
484         },
485         [3] = {
486                 .start  = AU1200_DSCR_CMD0_PSC1_RX,
487                 .end    = AU1200_DSCR_CMD0_PSC1_RX,
488                 .flags  = IORESOURCE_DMA,
489         },
490 };
491
492 /* AC97 or I2S device */
493 static struct platform_device db1200_audio_dev = {
494         /* name assigned later based on switch setting */
495         .id             = 1,    /* PSC ID */
496         .num_resources  = ARRAY_SIZE(au1200_psc1_res),
497         .resource       = au1200_psc1_res,
498 };
499
500 /* DB1200 ASoC card device */
501 static struct platform_device db1200_sound_dev = {
502         /* name assigned later based on switch setting */
503         .id             = 1,    /* PSC ID */
504 };
505
506 static struct platform_device db1200_stac_dev = {
507         .name           = "ac97-codec",
508         .id             = 1,    /* on PSC1 */
509 };
510
511 static struct platform_device db1200_audiodma_dev = {
512         .name           = "au1xpsc-pcm",
513         .id             = 1,    /* PSC ID */
514 };
515
516 static struct platform_device *db1200_devs[] __initdata = {
517         NULL,           /* PSC0, selected by S6.8 */
518         &db1200_ide_dev,
519         &db1200_mmc0_dev,
520         &au1200_lcd_dev,
521         &db1200_eth_dev,
522         &db1200_rtc_dev,
523         &db1200_nand_dev,
524         &db1200_audiodma_dev,
525         &db1200_audio_dev,
526         &db1200_stac_dev,
527         &db1200_sound_dev,
528 };
529
530 static int __init db1200_dev_init(void)
531 {
532         unsigned long pfc;
533         unsigned short sw;
534         int swapped;
535
536         i2c_register_board_info(0, db1200_i2c_devs,
537                                 ARRAY_SIZE(db1200_i2c_devs));
538         spi_register_board_info(db1200_spi_devs,
539                                 ARRAY_SIZE(db1200_i2c_devs));
540
541         /* SWITCHES:    S6.8 I2C/SPI selector  (OFF=I2C  ON=SPI)
542          *              S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)
543          */
544
545         /* NOTE: GPIO215 controls OTG VBUS supply.  In SPI mode however
546          * this pin is claimed by PSC0 (unused though, but pinmux doesn't
547          * allow to free it without crippling the SPI interface).
548          * As a result, in SPI mode, OTG simply won't work (PSC0 uses
549          * it as an input pin which is pulled high on the boards).
550          */
551         pfc = __raw_readl((void __iomem *)SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
552
553         /* switch off OTG VBUS supply */
554         gpio_request(215, "otg-vbus");
555         gpio_direction_output(215, 1);
556
557         printk(KERN_INFO "DB1200 device configuration:\n");
558
559         sw = bcsr_read(BCSR_SWITCHES);
560         if (sw & BCSR_SWITCHES_DIP_8) {
561                 db1200_devs[0] = &db1200_i2c_dev;
562                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
563
564                 pfc |= (2 << 17);       /* GPIO2 block owns GPIO215 */
565
566                 printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
567                 printk(KERN_INFO "   OTG port VBUS supply available!\n");
568         } else {
569                 db1200_devs[0] = &db1200_spi_dev;
570                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
571
572                 pfc |= (1 << 17);       /* PSC0 owns GPIO215 */
573
574                 printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
575                 printk(KERN_INFO "   OTG port VBUS supply disabled\n");
576         }
577         __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
578         wmb();
579
580         /* Audio: DIP7 selects I2S(0)/AC97(1), but need I2C for I2S!
581          * so: DIP7=1 || DIP8=0 => AC97, DIP7=0 && DIP8=1 => I2S
582          */
583         sw &= BCSR_SWITCHES_DIP_8 | BCSR_SWITCHES_DIP_7;
584         if (sw == BCSR_SWITCHES_DIP_8) {
585                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
586                 db1200_audio_dev.name = "au1xpsc_i2s";
587                 db1200_sound_dev.name = "db1200-i2s";
588                 printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
589         } else {
590                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC1MUX, 0);
591                 db1200_audio_dev.name = "au1xpsc_ac97";
592                 db1200_sound_dev.name = "db1200-ac97";
593                 printk(KERN_INFO " S6.7 OFF: PSC1 mode AC97\n");
594         }
595
596         /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
597         __raw_writel(PSC_SEL_CLK_SERCLK,
598                 (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
599         wmb();
600
601         db1x_register_pcmcia_socket(
602                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
603                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
604                 AU1000_PCMCIA_MEM_PHYS_ADDR,
605                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
606                 AU1000_PCMCIA_IO_PHYS_ADDR,
607                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
608                 DB1200_PC0_INT, DB1200_PC0_INSERT_INT,
609                 /*DB1200_PC0_STSCHG_INT*/0, DB1200_PC0_EJECT_INT, 0);
610
611         db1x_register_pcmcia_socket(
612                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
613                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
614                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
615                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
616                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
617                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
618                 DB1200_PC1_INT, DB1200_PC1_INSERT_INT,
619                 /*DB1200_PC1_STSCHG_INT*/0, DB1200_PC1_EJECT_INT, 1);
620
621         swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
622         db1x_register_norflash(64 << 20, 2, swapped);
623
624         return platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));
625 }
626 device_initcall(db1200_dev_init);
627
628 /* au1200fb calls these: STERBT EINEN TRAGISCHEN TOD!!! */
629 int board_au1200fb_panel(void)
630 {
631         return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
632 }
633
634 int board_au1200fb_panel_init(void)
635 {
636         /* Apply power */
637         bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
638                                 BCSR_BOARD_LCDBL);
639         return 0;
640 }
641
642 int board_au1200fb_panel_shutdown(void)
643 {
644         /* Remove power */
645         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
646                              BCSR_BOARD_LCDBL, 0);
647         return 0;
648 }