Merge branch 'perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux...
[pandora-kernel.git] / arch / microblaze / kernel / cpu / mb.c
1 /*
2  * CPU-version specific code
3  *
4  * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
5  * Copyright (C) 2006-2009 PetaLogix
6  *
7  * This file is subject to the terms and conditions of the GNU General Public
8  * License. See the file "COPYING" in the main directory of this archive
9  * for more details.
10  */
11
12 #include <linux/init.h>
13 #include <linux/string.h>
14 #include <linux/seq_file.h>
15 #include <linux/cpu.h>
16 #include <linux/initrd.h>
17
18 #include <linux/bug.h>
19 #include <asm/cpuinfo.h>
20 #include <linux/delay.h>
21 #include <linux/io.h>
22 #include <asm/page.h>
23 #include <linux/param.h>
24 #include <asm/pvr.h>
25 #include <asm/sections.h>
26 #include <asm/setup.h>
27
28 static int show_cpuinfo(struct seq_file *m, void *v)
29 {
30         int count = 0;
31         char *fpga_family = "Unknown";
32         char *cpu_ver = "Unknown";
33         int i;
34
35         /* Denormalised to get the fpga family string */
36         for (i = 0; family_string_lookup[i].s != NULL; i++) {
37                 if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
38                         fpga_family = (char *)family_string_lookup[i].s;
39                         break;
40                 }
41         }
42
43         /* Denormalised to get the hw version string */
44         for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
45                 if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
46                         cpu_ver = (char *)cpu_ver_lookup[i].s;
47                         break;
48                 }
49         }
50
51         count = seq_printf(m,
52                         "CPU-Family:    MicroBlaze\n"
53                         "FPGA-Arch:     %s\n"
54                         "CPU-Ver:       %s\n"
55                         "CPU-MHz:       %d.%02d\n"
56                         "BogoMips:      %lu.%02lu\n",
57                         fpga_family,
58                         cpu_ver,
59                         cpuinfo.cpu_clock_freq /
60                         1000000,
61                         cpuinfo.cpu_clock_freq %
62                         1000000,
63                         loops_per_jiffy / (500000 / HZ),
64                         (loops_per_jiffy / (5000 / HZ)) % 100);
65
66         count += seq_printf(m,
67                 "HW:\n Shift:\t\t%s\n"
68                 " MSR:\t\t%s\n"
69                 " PCMP:\t\t%s\n"
70                 " DIV:\t\t%s\n",
71                 (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
72                 (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
73                 (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
74                 (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
75
76         count += seq_printf(m,
77                         " MMU:\t\t%x\n",
78                         cpuinfo.mmu);
79
80         count += seq_printf(m,
81                 " MUL:\t\t%s\n"
82                 " FPU:\t\t%s\n",
83                 (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
84                         (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
85                 (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
86                         (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
87
88         count += seq_printf(m,
89                 " Exc:\t\t%s%s%s%s%s%s%s%s\n",
90                 (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
91                 (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
92                 (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
93                 (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
94                 (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
95                 (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
96                 (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
97                 (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
98
99         if (cpuinfo.use_icache)
100                 count += seq_printf(m,
101                                 "Icache:\t\t%ukB\tline length:\t%dB\n",
102                                 cpuinfo.icache_size >> 10,
103                                 cpuinfo.icache_line_length);
104         else
105                 count += seq_printf(m, "Icache:\t\tno\n");
106
107         if (cpuinfo.use_dcache) {
108                 count += seq_printf(m,
109                                 "Dcache:\t\t%ukB\tline length:\t%dB\n",
110                                 cpuinfo.dcache_size >> 10,
111                                 cpuinfo.dcache_line_length);
112                 if (cpuinfo.dcache_wb)
113                         count += seq_printf(m, "\t\twrite-back\n");
114                 else
115                         count += seq_printf(m, "\t\twrite-through\n");
116         } else
117                 count += seq_printf(m, "Dcache:\t\tno\n");
118
119         count += seq_printf(m,
120                         "HW-Debug:\t%s\n",
121                         cpuinfo.hw_debug ? "yes" : "no");
122
123         count += seq_printf(m,
124                         "PVR-USR1:\t%02x\n"
125                         "PVR-USR2:\t%08x\n",
126                         cpuinfo.pvr_user1,
127                         cpuinfo.pvr_user2);
128
129         return 0;
130 }
131
132 static void *c_start(struct seq_file *m, loff_t *pos)
133 {
134         int i = *pos;
135
136         return i < NR_CPUS ? (void *) (i + 1) : NULL;
137 }
138
139 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
140 {
141         ++*pos;
142         return c_start(m, pos);
143 }
144
145 static void c_stop(struct seq_file *m, void *v)
146 {
147 }
148
149 const struct seq_operations cpuinfo_op = {
150         .start = c_start,
151         .next = c_next,
152         .stop = c_stop,
153         .show = show_cpuinfo,
154 };