Pull bugzilla-5452 into release branch
[pandora-kernel.git] / arch / ia64 / kernel / time.c
1 /*
2  * linux/arch/ia64/kernel/time.c
3  *
4  * Copyright (C) 1998-2003 Hewlett-Packard Co
5  *      Stephane Eranian <eranian@hpl.hp.com>
6  *      David Mosberger <davidm@hpl.hp.com>
7  * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
8  * Copyright (C) 1999-2000 VA Linux Systems
9  * Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
10  */
11 #include <linux/config.h>
12
13 #include <linux/cpu.h>
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/profile.h>
18 #include <linux/sched.h>
19 #include <linux/time.h>
20 #include <linux/interrupt.h>
21 #include <linux/efi.h>
22 #include <linux/profile.h>
23 #include <linux/timex.h>
24
25 #include <asm/machvec.h>
26 #include <asm/delay.h>
27 #include <asm/hw_irq.h>
28 #include <asm/ptrace.h>
29 #include <asm/sal.h>
30 #include <asm/sections.h>
31 #include <asm/system.h>
32
33 extern unsigned long wall_jiffies;
34
35 volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
36
37 #ifdef CONFIG_IA64_DEBUG_IRQ
38
39 unsigned long last_cli_ip;
40 EXPORT_SYMBOL(last_cli_ip);
41
42 #endif
43
44 static struct time_interpolator itc_interpolator = {
45         .shift = 16,
46         .mask = 0xffffffffffffffffLL,
47         .source = TIME_SOURCE_CPU
48 };
49
50 static irqreturn_t
51 timer_interrupt (int irq, void *dev_id, struct pt_regs *regs)
52 {
53         unsigned long new_itm;
54
55         if (unlikely(cpu_is_offline(smp_processor_id()))) {
56                 return IRQ_HANDLED;
57         }
58
59         platform_timer_interrupt(irq, dev_id, regs);
60
61         new_itm = local_cpu_data->itm_next;
62
63         if (!time_after(ia64_get_itc(), new_itm))
64                 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
65                        ia64_get_itc(), new_itm);
66
67         profile_tick(CPU_PROFILING, regs);
68
69         while (1) {
70                 update_process_times(user_mode(regs));
71
72                 new_itm += local_cpu_data->itm_delta;
73
74                 if (smp_processor_id() == time_keeper_id) {
75                         /*
76                          * Here we are in the timer irq handler. We have irqs locally
77                          * disabled, but we don't know if the timer_bh is running on
78                          * another CPU. We need to avoid to SMP race by acquiring the
79                          * xtime_lock.
80                          */
81                         write_seqlock(&xtime_lock);
82                         do_timer(regs);
83                         local_cpu_data->itm_next = new_itm;
84                         write_sequnlock(&xtime_lock);
85                 } else
86                         local_cpu_data->itm_next = new_itm;
87
88                 if (time_after(new_itm, ia64_get_itc()))
89                         break;
90         }
91
92         do {
93                 /*
94                  * If we're too close to the next clock tick for
95                  * comfort, we increase the safety margin by
96                  * intentionally dropping the next tick(s).  We do NOT
97                  * update itm.next because that would force us to call
98                  * do_timer() which in turn would let our clock run
99                  * too fast (with the potentially devastating effect
100                  * of losing monotony of time).
101                  */
102                 while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
103                         new_itm += local_cpu_data->itm_delta;
104                 ia64_set_itm(new_itm);
105                 /* double check, in case we got hit by a (slow) PMI: */
106         } while (time_after_eq(ia64_get_itc(), new_itm));
107         return IRQ_HANDLED;
108 }
109
110 /*
111  * Encapsulate access to the itm structure for SMP.
112  */
113 void
114 ia64_cpu_local_tick (void)
115 {
116         int cpu = smp_processor_id();
117         unsigned long shift = 0, delta;
118
119         /* arrange for the cycle counter to generate a timer interrupt: */
120         ia64_set_itv(IA64_TIMER_VECTOR);
121
122         delta = local_cpu_data->itm_delta;
123         /*
124          * Stagger the timer tick for each CPU so they don't occur all at (almost) the
125          * same time:
126          */
127         if (cpu) {
128                 unsigned long hi = 1UL << ia64_fls(cpu);
129                 shift = (2*(cpu - hi) + 1) * delta/hi/2;
130         }
131         local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
132         ia64_set_itm(local_cpu_data->itm_next);
133 }
134
135 static int nojitter;
136
137 static int __init nojitter_setup(char *str)
138 {
139         nojitter = 1;
140         printk("Jitter checking for ITC timers disabled\n");
141         return 1;
142 }
143
144 __setup("nojitter", nojitter_setup);
145
146
147 void __devinit
148 ia64_init_itm (void)
149 {
150         unsigned long platform_base_freq, itc_freq;
151         struct pal_freq_ratio itc_ratio, proc_ratio;
152         long status, platform_base_drift, itc_drift;
153
154         /*
155          * According to SAL v2.6, we need to use a SAL call to determine the platform base
156          * frequency and then a PAL call to determine the frequency ratio between the ITC
157          * and the base frequency.
158          */
159         status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
160                                     &platform_base_freq, &platform_base_drift);
161         if (status != 0) {
162                 printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
163         } else {
164                 status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
165                 if (status != 0)
166                         printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
167         }
168         if (status != 0) {
169                 /* invent "random" values */
170                 printk(KERN_ERR
171                        "SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
172                 platform_base_freq = 100000000;
173                 platform_base_drift = -1;       /* no drift info */
174                 itc_ratio.num = 3;
175                 itc_ratio.den = 1;
176         }
177         if (platform_base_freq < 40000000) {
178                 printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
179                        platform_base_freq);
180                 platform_base_freq = 75000000;
181                 platform_base_drift = -1;
182         }
183         if (!proc_ratio.den)
184                 proc_ratio.den = 1;     /* avoid division by zero */
185         if (!itc_ratio.den)
186                 itc_ratio.den = 1;      /* avoid division by zero */
187
188         itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
189
190         local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
191         printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
192                "ITC freq=%lu.%03luMHz", smp_processor_id(),
193                platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
194                itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
195
196         if (platform_base_drift != -1) {
197                 itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
198                 printk("+/-%ldppm\n", itc_drift);
199         } else {
200                 itc_drift = -1;
201                 printk("\n");
202         }
203
204         local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
205         local_cpu_data->itc_freq = itc_freq;
206         local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
207         local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
208                                         + itc_freq/2)/itc_freq;
209
210         if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
211                 itc_interpolator.frequency = local_cpu_data->itc_freq;
212                 itc_interpolator.drift = itc_drift;
213 #ifdef CONFIG_SMP
214                 /* On IA64 in an SMP configuration ITCs are never accurately synchronized.
215                  * Jitter compensation requires a cmpxchg which may limit
216                  * the scalability of the syscalls for retrieving time.
217                  * The ITC synchronization is usually successful to within a few
218                  * ITC ticks but this is not a sure thing. If you need to improve
219                  * timer performance in SMP situations then boot the kernel with the
220                  * "nojitter" option. However, doing so may result in time fluctuating (maybe
221                  * even going backward) if the ITC offsets between the individual CPUs
222                  * are too large.
223                  */
224                 if (!nojitter) itc_interpolator.jitter = 1;
225 #endif
226                 register_time_interpolator(&itc_interpolator);
227         }
228
229         /* Setup the CPU local timer tick */
230         ia64_cpu_local_tick();
231 }
232
233 static struct irqaction timer_irqaction = {
234         .handler =      timer_interrupt,
235         .flags =        SA_INTERRUPT,
236         .name =         "timer"
237 };
238
239 void __devinit ia64_disable_timer(void)
240 {
241         ia64_set_itv(1 << 16);
242 }
243
244 void __init
245 time_init (void)
246 {
247         register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
248         efi_gettimeofday(&xtime);
249         ia64_init_itm();
250
251         /*
252          * Initialize wall_to_monotonic such that adding it to xtime will yield zero, the
253          * tv_nsec field must be normalized (i.e., 0 <= nsec < NSEC_PER_SEC).
254          */
255         set_normalized_timespec(&wall_to_monotonic, -xtime.tv_sec, -xtime.tv_nsec);
256 }
257
258 /*
259  * Generic udelay assumes that if preemption is allowed and the thread
260  * migrates to another CPU, that the ITC values are synchronized across
261  * all CPUs.
262  */
263 static void
264 ia64_itc_udelay (unsigned long usecs)
265 {
266         unsigned long start = ia64_get_itc();
267         unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
268
269         while (time_before(ia64_get_itc(), end))
270                 cpu_relax();
271 }
272
273 void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
274
275 void
276 udelay (unsigned long usecs)
277 {
278         (*ia64_udelay)(usecs);
279 }
280 EXPORT_SYMBOL(udelay);
281
282 static unsigned long long ia64_itc_printk_clock(void)
283 {
284         if (ia64_get_kr(IA64_KR_PER_CPU_DATA))
285                 return sched_clock();
286         return 0;
287 }
288
289 static unsigned long long ia64_default_printk_clock(void)
290 {
291         return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) *
292                 (1000000000/HZ);
293 }
294
295 unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock;
296
297 unsigned long long printk_clock(void)
298 {
299         return ia64_printk_clock();
300 }
301
302 void __init
303 ia64_setup_printk_clock(void)
304 {
305         if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT))
306                 ia64_printk_clock = ia64_itc_printk_clock;
307 }