2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/config.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/init.h>
12 #include <linux/slab.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/dmi.h>
18 #include <asm/io_apic.h>
19 #include <asm/hw_irq.h>
20 #include <linux/acpi.h>
24 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
25 #define PIRQ_VERSION 0x0100
27 static int broken_hp_bios_irq9;
28 static int acer_tm360_irqrouting;
30 static struct irq_routing_table *pirq_table;
32 static int pirq_enable_irq(struct pci_dev *dev);
35 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
36 * Avoid using: 13, 14 and 15 (FP error and IDE).
37 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
39 unsigned int pcibios_irq_mask = 0xfff8;
41 static int pirq_penalty[16] = {
42 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
43 0, 0, 0, 0, 1000, 100000, 100000, 100000
49 int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
50 int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
53 struct irq_router_handler {
55 int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
58 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
59 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
62 * Check passed address for the PCI IRQ Routing Table signature
63 * and perform checksum verification.
66 static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
68 struct irq_routing_table *rt;
72 rt = (struct irq_routing_table *) addr;
73 if (rt->signature != PIRQ_SIGNATURE ||
74 rt->version != PIRQ_VERSION ||
76 rt->size < sizeof(struct irq_routing_table))
79 for (i=0; i < rt->size; i++)
82 DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);
91 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
94 static struct irq_routing_table * __init pirq_find_routing_table(void)
97 struct irq_routing_table *rt;
99 if (pirq_table_addr) {
100 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
103 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
105 for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
106 rt = pirq_check_routing_table(addr);
114 * If we have a IRQ routing table, use it to search for peer host
115 * bridges. It's a gross hack, but since there are no other known
116 * ways how to get a list of buses, we have to go this way.
119 static void __init pirq_peer_trick(void)
121 struct irq_routing_table *rt = pirq_table;
126 memset(busmap, 0, sizeof(busmap));
127 for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
132 DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
134 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
140 for(i = 1; i < 256; i++) {
141 if (!busmap[i] || pci_find_bus(0, i))
143 if (pci_scan_bus(i, &pci_root_ops, NULL))
144 printk(KERN_INFO "PCI: Discovered primary peer bus %02x [IRQ]\n", i);
146 pcibios_last_bus = -1;
150 * Code for querying and setting of IRQ routes on various interrupt routers.
153 void eisa_set_level_irq(unsigned int irq)
155 unsigned char mask = 1 << (irq & 7);
156 unsigned int port = 0x4d0 + (irq >> 3);
158 static u16 eisa_irq_mask;
160 if (irq >= 16 || (1 << irq) & eisa_irq_mask)
163 eisa_irq_mask |= (1 << irq);
164 printk("PCI: setting IRQ %u as level-triggered\n", irq);
168 outb(val | mask, port);
173 * Common IRQ routing practice: nybbles in config space,
174 * offset by some magic constant.
176 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
179 unsigned reg = offset + (nr >> 1);
181 pci_read_config_byte(router, reg, &x);
182 return (nr & 1) ? (x >> 4) : (x & 0xf);
185 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
188 unsigned reg = offset + (nr >> 1);
190 pci_read_config_byte(router, reg, &x);
191 x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
192 pci_write_config_byte(router, reg, x);
196 * ALI pirq entries are damn ugly, and completely undocumented.
197 * This has been figured out from pirq tables, and it's not a pretty
200 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
202 static unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
204 return irqmap[read_config_nybble(router, 0x48, pirq-1)];
207 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
209 static unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
210 unsigned int val = irqmap[irq];
213 write_config_nybble(router, 0x48, pirq-1, val);
220 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
221 * just a pointer to the config space.
223 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
227 pci_read_config_byte(router, pirq, &x);
228 return (x < 16) ? x : 0;
231 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
233 pci_write_config_byte(router, pirq, irq);
238 * The VIA pirq rules are nibble-based, like ALI,
239 * but without the ugly irq number munging.
240 * However, PIRQD is in the upper instead of lower 4 bits.
242 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
244 return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
247 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
249 write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
254 * The VIA pirq rules are nibble-based, like ALI,
255 * but without the ugly irq number munging.
256 * However, for 82C586, nibble map is different .
258 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
260 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
261 return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
264 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
266 static unsigned int pirqmap[4] = { 3, 2, 5, 1 };
267 write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
272 * ITE 8330G pirq rules are nibble-based
273 * FIXME: pirqmap may be { 1, 0, 3, 2 },
274 * 2+3 are both mapped to irq 9 on my system
276 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
278 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
279 return read_config_nybble(router,0x43, pirqmap[pirq-1]);
282 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
284 static unsigned char pirqmap[4] = { 1, 0, 2, 3 };
285 write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
290 * OPTI: high four bits are nibble pointer..
291 * I wonder what the low bits do?
293 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
295 return read_config_nybble(router, 0xb8, pirq >> 4);
298 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
300 write_config_nybble(router, 0xb8, pirq >> 4, irq);
305 * Cyrix: nibble offset 0x5C
306 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
307 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
309 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
311 return read_config_nybble(router, 0x5C, (pirq-1)^1);
314 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
316 write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
321 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
322 * We have to deal with the following issues here:
323 * - vendors have different ideas about the meaning of link values
324 * - some onboard devices (integrated in the chipset) have special
325 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
326 * - different revision of the router have a different layout for
327 * the routing registers, particularly for the onchip devices
329 * For all routing registers the common thing is we have one byte
330 * per routeable link which is defined as:
331 * bit 7 IRQ mapping enabled (0) or disabled (1)
332 * bits [6:4] reserved (sometimes used for onchip devices)
333 * bits [3:0] IRQ to map to
334 * allowed: 3-7, 9-12, 14-15
335 * reserved: 0, 1, 2, 8, 13
337 * The config-space registers located at 0x41/0x42/0x43/0x44 are
338 * always used to route the normal PCI INT A/B/C/D respectively.
339 * Apparently there are systems implementing PCI routing table using
340 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
341 * We try our best to handle both link mappings.
343 * Currently (2003-05-21) it appears most SiS chipsets follow the
344 * definition of routing registers from the SiS-5595 southbridge.
345 * According to the SiS 5595 datasheets the revision id's of the
346 * router (ISA-bridge) should be 0x01 or 0xb0.
348 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
349 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
350 * They seem to work with the current routing code. However there is
351 * some concern because of the two USB-OHCI HCs (original SiS 5595
352 * had only one). YMMV.
354 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
357 * bits [6:5] must be written 01
358 * bit 4 channel-select primary (0), secondary (1)
361 * bit 6 OHCI function disabled (0), enabled (1)
363 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
365 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
367 * We support USBIRQ (in addition to INTA-INTD) and keep the
368 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
370 * Currently the only reported exception is the new SiS 65x chipset
371 * which includes the SiS 69x southbridge. Here we have the 85C503
372 * router revision 0x04 and there are changes in the register layout
373 * mostly related to the different USB HCs with USB 2.0 support.
375 * Onchip routing for router rev-id 0x04 (try-and-error observation)
377 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
378 * bit 6-4 are probably unused, not like 5595
381 #define PIRQ_SIS_IRQ_MASK 0x0f
382 #define PIRQ_SIS_IRQ_DISABLE 0x80
383 #define PIRQ_SIS_USB_ENABLE 0x40
385 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
391 if (reg >= 0x01 && reg <= 0x04)
393 pci_read_config_byte(router, reg, &x);
394 return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
397 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
403 if (reg >= 0x01 && reg <= 0x04)
405 pci_read_config_byte(router, reg, &x);
406 x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
407 x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
408 pci_write_config_byte(router, reg, x);
414 * VLSI: nibble offset 0x74 - educated guess due to routing table and
415 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
416 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
417 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
418 * for the busbridge to the docking station.
421 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
424 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
427 return read_config_nybble(router, 0x74, pirq-1);
430 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
433 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
436 write_config_nybble(router, 0x74, pirq-1, irq);
441 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
442 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
443 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
444 * register is a straight binary coding of desired PIC IRQ (low nibble).
446 * The 'link' value in the PIRQ table is already in the correct format
447 * for the Index register. There are some special index values:
448 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
449 * and 0x03 for SMBus.
451 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
454 return inb(0xc01) & 0xf;
457 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
464 /* Support for AMD756 PCI IRQ Routing
465 * Jhon H. Caicedo <jhcaiced@osso.org.co>
466 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
467 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
468 * The AMD756 pirq rules are nibble-based
469 * offset 0x56 0-3 PIRQA 4-7 PIRQB
470 * offset 0x57 0-3 PIRQC 4-7 PIRQD
472 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
478 irq = read_config_nybble(router, 0x56, pirq - 1);
480 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
481 dev->vendor, dev->device, pirq, irq);
485 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
487 printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
488 dev->vendor, dev->device, pirq, irq);
491 write_config_nybble(router, 0x56, pirq - 1, irq);
496 #ifdef CONFIG_PCI_BIOS
498 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
500 struct pci_dev *bridge;
501 int pin = pci_get_interrupt_pin(dev, &bridge);
502 return pcibios_set_irq_routing(bridge, pin, irq);
507 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
509 static struct pci_device_id pirq_440gx[] = {
510 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
511 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
515 /* 440GX has a proprietary PIRQ router -- don't use it */
516 if (pci_dev_present(pirq_440gx))
521 case PCI_DEVICE_ID_INTEL_82371FB_0:
522 case PCI_DEVICE_ID_INTEL_82371SB_0:
523 case PCI_DEVICE_ID_INTEL_82371AB_0:
524 case PCI_DEVICE_ID_INTEL_82371MX:
525 case PCI_DEVICE_ID_INTEL_82443MX_0:
526 case PCI_DEVICE_ID_INTEL_82801AA_0:
527 case PCI_DEVICE_ID_INTEL_82801AB_0:
528 case PCI_DEVICE_ID_INTEL_82801BA_0:
529 case PCI_DEVICE_ID_INTEL_82801BA_10:
530 case PCI_DEVICE_ID_INTEL_82801CA_0:
531 case PCI_DEVICE_ID_INTEL_82801CA_12:
532 case PCI_DEVICE_ID_INTEL_82801DB_0:
533 case PCI_DEVICE_ID_INTEL_82801E_0:
534 case PCI_DEVICE_ID_INTEL_82801EB_0:
535 case PCI_DEVICE_ID_INTEL_ESB_1:
536 case PCI_DEVICE_ID_INTEL_ICH6_0:
537 case PCI_DEVICE_ID_INTEL_ICH6_1:
538 case PCI_DEVICE_ID_INTEL_ICH7_0:
539 case PCI_DEVICE_ID_INTEL_ICH7_1:
540 case PCI_DEVICE_ID_INTEL_ICH7_30:
541 case PCI_DEVICE_ID_INTEL_ICH7_31:
542 case PCI_DEVICE_ID_INTEL_ESB2_0:
543 r->name = "PIIX/ICH";
544 r->get = pirq_piix_get;
545 r->set = pirq_piix_set;
551 static __init int via_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
553 /* FIXME: We should move some of the quirk fixup stuff here */
556 case PCI_DEVICE_ID_VIA_82C586_0:
558 r->get = pirq_via586_get;
559 r->set = pirq_via586_set;
561 case PCI_DEVICE_ID_VIA_82C596:
562 case PCI_DEVICE_ID_VIA_82C686:
563 case PCI_DEVICE_ID_VIA_8231:
564 /* FIXME: add new ones for 8233/5 */
566 r->get = pirq_via_get;
567 r->set = pirq_via_set;
573 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
577 case PCI_DEVICE_ID_VLSI_82C534:
578 r->name = "VLSI 82C534";
579 r->get = pirq_vlsi_get;
580 r->set = pirq_vlsi_set;
587 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
591 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
592 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
593 r->name = "ServerWorks";
594 r->get = pirq_serverworks_get;
595 r->set = pirq_serverworks_set;
601 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
603 if (device != PCI_DEVICE_ID_SI_503)
607 r->get = pirq_sis_get;
608 r->set = pirq_sis_set;
612 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
616 case PCI_DEVICE_ID_CYRIX_5520:
618 r->get = pirq_cyrix_get;
619 r->set = pirq_cyrix_set;
625 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
629 case PCI_DEVICE_ID_OPTI_82C700:
631 r->get = pirq_opti_get;
632 r->set = pirq_opti_set;
638 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
642 case PCI_DEVICE_ID_ITE_IT8330G_0:
644 r->get = pirq_ite_get;
645 r->set = pirq_ite_set;
651 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
655 case PCI_DEVICE_ID_AL_M1533:
656 case PCI_DEVICE_ID_AL_M1563:
657 printk("PCI: Using ALI IRQ Router\n");
659 r->get = pirq_ali_get;
660 r->set = pirq_ali_set;
666 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
670 case PCI_DEVICE_ID_AMD_VIPER_740B:
673 case PCI_DEVICE_ID_AMD_VIPER_7413:
676 case PCI_DEVICE_ID_AMD_VIPER_7443:
682 r->get = pirq_amd756_get;
683 r->set = pirq_amd756_set;
687 static __initdata struct irq_router_handler pirq_routers[] = {
688 { PCI_VENDOR_ID_INTEL, intel_router_probe },
689 { PCI_VENDOR_ID_AL, ali_router_probe },
690 { PCI_VENDOR_ID_ITE, ite_router_probe },
691 { PCI_VENDOR_ID_VIA, via_router_probe },
692 { PCI_VENDOR_ID_OPTI, opti_router_probe },
693 { PCI_VENDOR_ID_SI, sis_router_probe },
694 { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
695 { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
696 { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
697 { PCI_VENDOR_ID_AMD, amd_router_probe },
698 /* Someone with docs needs to add the ATI Radeon IGP */
701 static struct irq_router pirq_router;
702 static struct pci_dev *pirq_router_dev;
706 * FIXME: should we have an option to say "generic for
710 static void __init pirq_find_router(struct irq_router *r)
712 struct irq_routing_table *rt = pirq_table;
713 struct irq_router_handler *h;
715 #ifdef CONFIG_PCI_BIOS
716 if (!rt->signature) {
717 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
718 r->set = pirq_bios_set;
724 /* Default unless a driver reloads it */
729 DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",
730 rt->rtr_vendor, rt->rtr_device);
732 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);
733 if (!pirq_router_dev) {
734 DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
738 for( h = pirq_routers; h->vendor; h++) {
739 /* First look for a router match */
740 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
742 /* Fall back to a device match */
743 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
746 printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
748 pirq_router_dev->vendor,
749 pirq_router_dev->device,
750 pci_name(pirq_router_dev));
753 static struct irq_info *pirq_get_info(struct pci_dev *dev)
755 struct irq_routing_table *rt = pirq_table;
756 int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
757 struct irq_info *info;
759 for (info = rt->slots; entries--; info++)
760 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
765 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
768 struct irq_info *info;
772 struct irq_router *r = &pirq_router;
773 struct pci_dev *dev2 = NULL;
777 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
779 DBG(" -> no interrupt pin\n");
784 /* Find IRQ routing entry */
789 DBG("IRQ for %s[%c]", pci_name(dev), 'A' + pin);
790 info = pirq_get_info(dev);
792 DBG(" -> not found in routing table\n");
795 pirq = info->irq[pin].link;
796 mask = info->irq[pin].bitmap;
798 DBG(" -> not routed\n");
801 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
802 mask &= pcibios_irq_mask;
804 /* Work around broken HP Pavilion Notebooks which assign USB to
805 IRQ 9 even though it is actually wired to IRQ 11 */
807 if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
809 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
810 r->set(pirq_router_dev, dev, pirq, 11);
813 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
814 if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
817 dev->irq = r->get(pirq_router_dev, dev, pirq);
818 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
822 * Find the best IRQ to assign: use the one
823 * reported by the device if possible.
826 if (!((1 << newirq) & mask)) {
827 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
828 else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));
830 if (!newirq && assign) {
831 for (i = 0; i < 16; i++) {
832 if (!(mask & (1 << i)))
834 if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, SA_SHIRQ))
838 DBG(" -> newirq=%d", newirq);
840 /* Check if it is hardcoded */
841 if ((pirq & 0xf0) == 0xf0) {
843 DBG(" -> hardcoded IRQ %d\n", irq);
845 } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
846 ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
847 DBG(" -> got IRQ %d\n", irq);
849 } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
850 DBG(" -> assigning IRQ %d", newirq);
851 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
852 eisa_set_level_irq(newirq);
860 DBG(" ... failed\n");
861 if (newirq && mask == (1 << newirq)) {
867 printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
869 /* Update IRQ for all devices with the same pirq value */
870 while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
871 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
875 info = pirq_get_info(dev2);
878 if (info->irq[pin].link == pirq) {
879 /* We refuse to override the dev->irq information. Give a warning! */
880 if ( dev2->irq && dev2->irq != irq && \
881 (!(pci_probe & PCI_USE_PIRQ_MASK) || \
882 ((1 << dev2->irq) & mask)) ) {
883 #ifndef CONFIG_PCI_MSI
884 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
885 pci_name(dev2), dev2->irq, irq);
892 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
898 static void __init pcibios_fixup_irqs(void)
900 struct pci_dev *dev = NULL;
903 DBG("PCI: IRQ fixup\n");
904 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
906 * If the BIOS has set an out of range IRQ number, just ignore it.
907 * Also keep track of which IRQ's are already in use.
909 if (dev->irq >= 16) {
910 DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
913 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
914 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
915 pirq_penalty[dev->irq] = 0;
916 pirq_penalty[dev->irq]++;
920 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
921 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
922 #ifdef CONFIG_X86_IO_APIC
924 * Recalculate IRQ numbers if we use the I/O APIC.
926 if (io_apic_assign_pci_irqs)
931 pin--; /* interrupt pins are numbered starting from 1 */
932 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
934 * Busses behind bridges are typically not listed in the MP-table.
935 * In this case we have to look up the IRQ based on the parent bus,
936 * parent slot, and pin number. The SMP code detects such bridged
937 * busses itself so we should get into this branch reliably.
939 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
940 struct pci_dev * bridge = dev->bus->self;
942 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
943 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
944 PCI_SLOT(bridge->devfn), pin);
946 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
947 pci_name(bridge), 'A' + pin, irq);
950 if (use_pci_vector() &&
951 !platform_legacy_irq(irq))
952 irq = IO_APIC_VECTOR(irq);
954 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
955 pci_name(dev), 'A' + pin, irq);
962 * Still no IRQ? Try to lookup one...
964 if (pin && !dev->irq)
965 pcibios_lookup_irq(dev, 0);
970 * Work around broken HP Pavilion Notebooks which assign USB to
971 * IRQ 9 even though it is actually wired to IRQ 11
973 static int __init fix_broken_hp_bios_irq9(struct dmi_system_id *d)
975 if (!broken_hp_bios_irq9) {
976 broken_hp_bios_irq9 = 1;
977 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
983 * Work around broken Acer TravelMate 360 Notebooks which assign
984 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
986 static int __init fix_acer_tm360_irqrouting(struct dmi_system_id *d)
988 if (!acer_tm360_irqrouting) {
989 acer_tm360_irqrouting = 1;
990 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
995 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
997 .callback = fix_broken_hp_bios_irq9,
998 .ident = "HP Pavilion N5400 Series Laptop",
1000 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1001 DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1002 DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1003 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1007 .callback = fix_acer_tm360_irqrouting,
1008 .ident = "Acer TravelMate 36x Laptop",
1010 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1011 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1017 static int __init pcibios_irq_init(void)
1019 DBG("PCI: IRQ init\n");
1021 if (pcibios_enable_irq || raw_pci_ops == NULL)
1024 dmi_check_system(pciirq_dmi_table);
1026 pirq_table = pirq_find_routing_table();
1028 #ifdef CONFIG_PCI_BIOS
1029 if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1030 pirq_table = pcibios_get_irq_routing_table();
1034 pirq_find_router(&pirq_router);
1035 if (pirq_table->exclusive_irqs) {
1037 for (i=0; i<16; i++)
1038 if (!(pirq_table->exclusive_irqs & (1 << i)))
1039 pirq_penalty[i] += 100;
1041 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1042 if (io_apic_assign_pci_irqs)
1046 pcibios_enable_irq = pirq_enable_irq;
1048 pcibios_fixup_irqs();
1052 subsys_initcall(pcibios_irq_init);
1055 static void pirq_penalize_isa_irq(int irq, int active)
1058 * If any ISAPnP device reports an IRQ in its list of possible
1059 * IRQ's, we try to avoid assigning it to PCI devices.
1063 pirq_penalty[irq] += 1000;
1065 pirq_penalty[irq] += 100;
1069 void pcibios_penalize_isa_irq(int irq, int active)
1071 #ifdef CONFIG_ACPI_PCI
1073 acpi_penalize_isa_irq(irq, active);
1076 pirq_penalize_isa_irq(irq, active);
1079 static int pirq_enable_irq(struct pci_dev *dev)
1082 struct pci_dev *temp_dev;
1084 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1085 if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1088 pin--; /* interrupt pins are numbered starting from 1 */
1090 if (io_apic_assign_pci_irqs) {
1093 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1095 * Busses behind bridges are typically not listed in the MP-table.
1096 * In this case we have to look up the IRQ based on the parent bus,
1097 * parent slot, and pin number. The SMP code detects such bridged
1098 * busses itself so we should get into this branch reliably.
1101 while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1102 struct pci_dev * bridge = dev->bus->self;
1104 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1105 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1106 PCI_SLOT(bridge->devfn), pin);
1108 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1109 pci_name(bridge), 'A' + pin, irq);
1114 #ifdef CONFIG_PCI_MSI
1115 if (!platform_legacy_irq(irq))
1116 irq = IO_APIC_VECTOR(irq);
1118 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1119 pci_name(dev), 'A' + pin, irq);
1123 msg = " Probably buggy MP table.";
1124 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1127 msg = " Please try using pci=biosirq.";
1129 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1130 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1133 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1134 'A' + pin, pci_name(dev), msg);
1139 int pci_vector_resources(int last, int nr_released)
1141 int count = nr_released;
1144 int offset = (last % 8);
1146 while (next < FIRST_SYSTEM_VECTOR) {
1148 #ifdef CONFIG_X86_64
1149 if (next == IA32_SYSCALL_VECTOR)
1152 if (next == SYSCALL_VECTOR)
1156 if (next >= FIRST_SYSTEM_VECTOR) {
1158 next = FIRST_DEVICE_VECTOR + offset;