arch/blackfin/mach-bf538/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/physmap.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/interrupt.h>
  18 #include <asm/bfin5xx_spi.h>
  19 #include <asm/dma.h>
  20 #include <asm/gpio.h>
  21 #include <asm/nand.h>
  22 #include <asm/portmux.h>
  23 #include <asm/dpmc.h>
  24 #include <linux/input.h>
  25
  26 /*
  27  * Name the Board for the /proc/cpuinfo
  28  */
  29 const char bfin_board_name[] = "ADI BF538-EZKIT";
  30
  31 /*
  32  *  Driver needs to know address, irq and flag pin.
  33  */
  34
  35
  36 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  37 static struct platform_device rtc_device = {
  38         .name = "rtc-bfin",
  39         .id   = -1,
  40 };
  41 #endif
  42
  43 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  44 #ifdef CONFIG_SERIAL_BFIN_UART0
  45 static struct resource bfin_uart0_resources[] = {
  46         {
  47                 .start = UART0_THR,
  48                 .end = UART0_GCTL+2,
  49                 .flags = IORESOURCE_MEM,
  50         },
  51         {
  52                 .start = IRQ_UART0_RX,
  53                 .end = IRQ_UART0_RX+1,
  54                 .flags = IORESOURCE_IRQ,
  55         },
  56         {
  57                 .start = IRQ_UART0_ERROR,
  58                 .end = IRQ_UART0_ERROR,
  59                 .flags = IORESOURCE_IRQ,
  60         },
  61         {
  62                 .start = CH_UART0_TX,
  63                 .end = CH_UART0_TX,
  64                 .flags = IORESOURCE_DMA,
  65         },
  66         {
  67                 .start = CH_UART0_RX,
  68                 .end = CH_UART0_RX,
  69                 .flags = IORESOURCE_DMA,
  70         },
  71 #ifdef CONFIG_BFIN_UART0_CTSRTS
  72         {       /* CTS pin */
  73                 .start = GPIO_PG7,
  74                 .end = GPIO_PG7,
  75                 .flags = IORESOURCE_IO,
  76         },
  77         {       /* RTS pin */
  78                 .start = GPIO_PG6,
  79                 .end = GPIO_PG6,
  80                 .flags = IORESOURCE_IO,
  81         },
  82 #endif
  83 };
  84
  85 unsigned short bfin_uart0_peripherals[] = {
  86         P_UART0_TX, P_UART0_RX, 0
  87 };
  88
  89 static struct platform_device bfin_uart0_device = {
  90         .name = "bfin-uart",
  91         .id = 0,
  92         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  93         .resource = bfin_uart0_resources,
  94         .dev = {
  95                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  96         },
  97 };
  98 #endif
  99 #ifdef CONFIG_SERIAL_BFIN_UART1
 100 static struct resource bfin_uart1_resources[] = {
 101         {
 102                 .start = UART1_THR,
 103                 .end = UART1_GCTL+2,
 104                 .flags = IORESOURCE_MEM,
 105         },
 106         {
 107                 .start = IRQ_UART1_RX,
 108                 .end = IRQ_UART1_RX+1,
 109                 .flags = IORESOURCE_IRQ,
 110         },
 111         {
 112                 .start = IRQ_UART1_ERROR,
 113                 .end = IRQ_UART1_ERROR,
 114                 .flags = IORESOURCE_IRQ,
 115         },
 116         {
 117                 .start = CH_UART1_TX,
 118                 .end = CH_UART1_TX,
 119                 .flags = IORESOURCE_DMA,
 120         },
 121         {
 122                 .start = CH_UART1_RX,
 123                 .end = CH_UART1_RX,
 124                 .flags = IORESOURCE_DMA,
 125         },
 126 };
 127
 128 unsigned short bfin_uart1_peripherals[] = {
 129         P_UART1_TX, P_UART1_RX, 0
 130 };
 131
 132 static struct platform_device bfin_uart1_device = {
 133         .name = "bfin-uart",
 134         .id = 1,
 135         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 136         .resource = bfin_uart1_resources,
 137         .dev = {
 138                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 139         },
 140 };
 141 #endif
 142 #ifdef CONFIG_SERIAL_BFIN_UART2
 143 static struct resource bfin_uart2_resources[] = {
 144         {
 145                 .start = UART2_THR,
 146                 .end = UART2_GCTL+2,
 147                 .flags = IORESOURCE_MEM,
 148         },
 149         {
 150                 .start = IRQ_UART2_RX,
 151                 .end = IRQ_UART2_RX+1,
 152                 .flags = IORESOURCE_IRQ,
 153         },
 154         {
 155                 .start = IRQ_UART2_ERROR,
 156                 .end = IRQ_UART2_ERROR,
 157                 .flags = IORESOURCE_IRQ,
 158         },
 159         {
 160                 .start = CH_UART2_TX,
 161                 .end = CH_UART2_TX,
 162                 .flags = IORESOURCE_DMA,
 163         },
 164         {
 165                 .start = CH_UART2_RX,
 166                 .end = CH_UART2_RX,
 167                 .flags = IORESOURCE_DMA,
 168         },
 169 };
 170
 171 unsigned short bfin_uart2_peripherals[] = {
 172         P_UART2_TX, P_UART2_RX, 0
 173 };
 174
 175 static struct platform_device bfin_uart2_device = {
 176         .name = "bfin-uart",
 177         .id = 2,
 178         .num_resources = ARRAY_SIZE(bfin_uart2_resources),
 179         .resource = bfin_uart2_resources,
 180         .dev = {
 181                 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
 182         },
 183 };
 184 #endif
 185 #endif
 186
 187 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 188 #ifdef CONFIG_BFIN_SIR0
 189 static struct resource bfin_sir0_resources[] = {
 190         {
 191                 .start = 0xFFC00400,
 192                 .end = 0xFFC004FF,
 193                 .flags = IORESOURCE_MEM,
 194         },
 195         {
 196                 .start = IRQ_UART0_RX,
 197                 .end = IRQ_UART0_RX+1,
 198                 .flags = IORESOURCE_IRQ,
 199         },
 200         {
 201                 .start = CH_UART0_RX,
 202                 .end = CH_UART0_RX+1,
 203                 .flags = IORESOURCE_DMA,
 204         },
 205 };
 206 static struct platform_device bfin_sir0_device = {
 207         .name = "bfin_sir",
 208         .id = 0,
 209         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 210         .resource = bfin_sir0_resources,
 211 };
 212 #endif
 213 #ifdef CONFIG_BFIN_SIR1
 214 static struct resource bfin_sir1_resources[] = {
 215         {
 216                 .start = 0xFFC02000,
 217                 .end = 0xFFC020FF,
 218                 .flags = IORESOURCE_MEM,
 219         },
 220         {
 221                 .start = IRQ_UART1_RX,
 222                 .end = IRQ_UART1_RX+1,
 223                 .flags = IORESOURCE_IRQ,
 224         },
 225         {
 226                 .start = CH_UART1_RX,
 227                 .end = CH_UART1_RX+1,
 228                 .flags = IORESOURCE_DMA,
 229         },
 230 };
 231 static struct platform_device bfin_sir1_device = {
 232         .name = "bfin_sir",
 233         .id = 1,
 234         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 235         .resource = bfin_sir1_resources,
 236 };
 237 #endif
 238 #ifdef CONFIG_BFIN_SIR2
 239 static struct resource bfin_sir2_resources[] = {
 240         {
 241                 .start = 0xFFC02100,
 242                 .end = 0xFFC021FF,
 243                 .flags = IORESOURCE_MEM,
 244         },
 245         {
 246                 .start = IRQ_UART2_RX,
 247                 .end = IRQ_UART2_RX+1,
 248                 .flags = IORESOURCE_IRQ,
 249         },
 250         {
 251                 .start = CH_UART2_RX,
 252                 .end = CH_UART2_RX+1,
 253                 .flags = IORESOURCE_DMA,
 254         },
 255 };
 256 static struct platform_device bfin_sir2_device = {
 257         .name = "bfin_sir",
 258         .id = 2,
 259         .num_resources = ARRAY_SIZE(bfin_sir2_resources),
 260         .resource = bfin_sir2_resources,
 261 };
 262 #endif
 263 #endif
 264
 265 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 266 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 267 static struct resource bfin_sport0_uart_resources[] = {
 268         {
 269                 .start = SPORT0_TCR1,
 270                 .end = SPORT0_MRCS3+4,
 271                 .flags = IORESOURCE_MEM,
 272         },
 273         {
 274                 .start = IRQ_SPORT0_RX,
 275                 .end = IRQ_SPORT0_RX+1,
 276                 .flags = IORESOURCE_IRQ,
 277         },
 278         {
 279                 .start = IRQ_SPORT0_ERROR,
 280                 .end = IRQ_SPORT0_ERROR,
 281                 .flags = IORESOURCE_IRQ,
 282         },
 283 };
 284
 285 unsigned short bfin_sport0_peripherals[] = {
 286         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 287         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 288 };
 289
 290 static struct platform_device bfin_sport0_uart_device = {
 291         .name = "bfin-sport-uart",
 292         .id = 0,
 293         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 294         .resource = bfin_sport0_uart_resources,
 295         .dev = {
 296                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 297         },
 298 };
 299 #endif
 300 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 301 static struct resource bfin_sport1_uart_resources[] = {
 302         {
 303                 .start = SPORT1_TCR1,
 304                 .end = SPORT1_MRCS3+4,
 305                 .flags = IORESOURCE_MEM,
 306         },
 307         {
 308                 .start = IRQ_SPORT1_RX,
 309                 .end = IRQ_SPORT1_RX+1,
 310                 .flags = IORESOURCE_IRQ,
 311         },
 312         {
 313                 .start = IRQ_SPORT1_ERROR,
 314                 .end = IRQ_SPORT1_ERROR,
 315                 .flags = IORESOURCE_IRQ,
 316         },
 317 };
 318
 319 unsigned short bfin_sport1_peripherals[] = {
 320         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 321         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 322 };
 323
 324 static struct platform_device bfin_sport1_uart_device = {
 325         .name = "bfin-sport-uart",
 326         .id = 1,
 327         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 328         .resource = bfin_sport1_uart_resources,
 329         .dev = {
 330                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 331         },
 332 };
 333 #endif
 334 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 335 static struct resource bfin_sport2_uart_resources[] = {
 336         {
 337                 .start = SPORT2_TCR1,
 338                 .end = SPORT2_MRCS3+4,
 339                 .flags = IORESOURCE_MEM,
 340         },
 341         {
 342                 .start = IRQ_SPORT2_RX,
 343                 .end = IRQ_SPORT2_RX+1,
 344                 .flags = IORESOURCE_IRQ,
 345         },
 346         {
 347                 .start = IRQ_SPORT2_ERROR,
 348                 .end = IRQ_SPORT2_ERROR,
 349                 .flags = IORESOURCE_IRQ,
 350         },
 351 };
 352
 353 unsigned short bfin_sport2_peripherals[] = {
 354         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 355         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 356 };
 357
 358 static struct platform_device bfin_sport2_uart_device = {
 359         .name = "bfin-sport-uart",
 360         .id = 2,
 361         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 362         .resource = bfin_sport2_uart_resources,
 363         .dev = {
 364                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 365         },
 366 };
 367 #endif
 368 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
 369 static struct resource bfin_sport3_uart_resources[] = {
 370         {
 371                 .start = SPORT3_TCR1,
 372                 .end = SPORT3_MRCS3+4,
 373                 .flags = IORESOURCE_MEM,
 374         },
 375         {
 376                 .start = IRQ_SPORT3_RX,
 377                 .end = IRQ_SPORT3_RX+1,
 378                 .flags = IORESOURCE_IRQ,
 379         },
 380         {
 381                 .start = IRQ_SPORT3_ERROR,
 382                 .end = IRQ_SPORT3_ERROR,
 383                 .flags = IORESOURCE_IRQ,
 384         },
 385 };
 386
 387 unsigned short bfin_sport3_peripherals[] = {
 388         P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
 389         P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
 390 };
 391
 392 static struct platform_device bfin_sport3_uart_device = {
 393         .name = "bfin-sport-uart",
 394         .id = 3,
 395         .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
 396         .resource = bfin_sport3_uart_resources,
 397         .dev = {
 398                 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
 399         },
 400 };
 401 #endif
 402 #endif
 403
 404 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 405 unsigned short bfin_can_peripherals[] = {
 406         P_CAN0_RX, P_CAN0_TX, 0
 407 };
 408
 409 static struct resource bfin_can_resources[] = {
 410         {
 411                 .start = 0xFFC02A00,
 412                 .end = 0xFFC02FFF,
 413                 .flags = IORESOURCE_MEM,
 414         },
 415         {
 416                 .start = IRQ_CAN_RX,
 417                 .end = IRQ_CAN_RX,
 418                 .flags = IORESOURCE_IRQ,
 419         },
 420         {
 421                 .start = IRQ_CAN_TX,
 422                 .end = IRQ_CAN_TX,
 423                 .flags = IORESOURCE_IRQ,
 424         },
 425         {
 426                 .start = IRQ_CAN_ERROR,
 427                 .end = IRQ_CAN_ERROR,
 428                 .flags = IORESOURCE_IRQ,
 429         },
 430 };
 431
 432 static struct platform_device bfin_can_device = {
 433         .name = "bfin_can",
 434         .num_resources = ARRAY_SIZE(bfin_can_resources),
 435         .resource = bfin_can_resources,
 436         .dev = {
 437                 .platform_data = &bfin_can_peripherals, /* Passed to driver */
 438         },
 439 };
 440 #endif
 441
 442 /*
 443  *  USB-LAN EzExtender board
 444  *  Driver needs to know address, irq and flag pin.
 445  */
 446 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 447 #include <linux/smc91x.h>
 448
 449 static struct smc91x_platdata smc91x_info = {
 450         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 451         .leda = RPC_LED_100_10,
 452         .ledb = RPC_LED_TX_RX,
 453 };
 454
 455 static struct resource smc91x_resources[] = {
 456         {
 457                 .name = "smc91x-regs",
 458                 .start = 0x20310300,
 459                 .end = 0x20310300 + 16,
 460                 .flags = IORESOURCE_MEM,
 461         }, {
 462                 .start = IRQ_PF0,
 463                 .end = IRQ_PF0,
 464                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 465         },
 466 };
 467 static struct platform_device smc91x_device = {
 468         .name = "smc91x",
 469         .id = 0,
 470         .num_resources = ARRAY_SIZE(smc91x_resources),
 471         .resource = smc91x_resources,
 472         .dev    = {
 473                 .platform_data  = &smc91x_info,
 474         },
 475 };
 476 #endif
 477
 478 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 479 /* all SPI peripherals info goes here */
 480 #if defined(CONFIG_MTD_M25P80) \
 481         || defined(CONFIG_MTD_M25P80_MODULE)
 482 /* SPI flash chip (m25p16) */
 483 static struct mtd_partition bfin_spi_flash_partitions[] = {
 484         {
 485                 .name = "bootloader(spi)",
 486                 .size = 0x00040000,
 487                 .offset = 0,
 488                 .mask_flags = MTD_CAP_ROM
 489         }, {
 490                 .name = "linux kernel(spi)",
 491                 .size = 0x1c0000,
 492                 .offset = 0x40000
 493         }
 494 };
 495
 496 static struct flash_platform_data bfin_spi_flash_data = {
 497         .name = "m25p80",
 498         .parts = bfin_spi_flash_partitions,
 499         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 500         .type = "m25p16",
 501 };
 502
 503 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 504         .enable_dma = 0,         /* use dma transfer with this chip*/
 505         .bits_per_word = 8,
 506 };
 507 #endif
 508
 509 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 510 #include <linux/spi/ad7879.h>
 511 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 512         .model                  = 7879, /* Model = AD7879 */
 513         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 514         .pressure_max           = 10000,
 515         .pressure_min           = 0,
 516         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 517         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 518         .median                 = 2,    /* do 8 measurements */
 519         .averaging              = 1,    /* take the average of 4 middle samples */
 520         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 521         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 522         .gpio_base              = -1,   /* Dynamic allocation */
 523 };
 524 #endif
 525
 526 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 527 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 528         .enable_dma = 0,
 529         .bits_per_word = 16,
 530 };
 531 #endif
 532
 533 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 534 #include <asm/bfin-lq035q1.h>
 535
 536 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 537         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 538         .ppi_mode = USE_RGB565_16_BIT_PPI,
 539         .use_bl = 0,    /* let something else control the LCD Blacklight */
 540         .gpio_bl = GPIO_PF7,
 541 };
 542
 543 static struct resource bfin_lq035q1_resources[] = {
 544         {
 545                 .start = IRQ_PPI_ERROR,
 546                 .end = IRQ_PPI_ERROR,
 547                 .flags = IORESOURCE_IRQ,
 548         },
 549 };
 550
 551 static struct platform_device bfin_lq035q1_device = {
 552         .name           = "bfin-lq035q1",
 553         .id             = -1,
 554         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 555         .resource       = bfin_lq035q1_resources,
 556         .dev            = {
 557                 .platform_data = &bfin_lq035q1_data,
 558         },
 559 };
 560 #endif
 561
 562 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 563 static struct bfin5xx_spi_chip spidev_chip_info = {
 564         .enable_dma = 0,
 565         .bits_per_word = 8,
 566 };
 567 #endif
 568
 569 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 570 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 571         .enable_dma     = 0,
 572         .bits_per_word  = 8,
 573 };
 574 #endif
 575
 576 static struct spi_board_info bf538_spi_board_info[] __initdata = {
 577 #if defined(CONFIG_MTD_M25P80) \
 578         || defined(CONFIG_MTD_M25P80_MODULE)
 579         {
 580                 /* the modalias must be the same as spi device driver name */
 581                 .modalias = "m25p80", /* Name of spi_driver for this device */
 582                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 583                 .bus_num = 0, /* Framework bus number */
 584                 .chip_select = 1, /* SPI_SSEL1*/
 585                 .platform_data = &bfin_spi_flash_data,
 586                 .controller_data = &spi_flash_chip_info,
 587                 .mode = SPI_MODE_3,
 588         },
 589 #endif
 590 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 591         {
 592                 .modalias = "ad7879",
 593                 .platform_data = &bfin_ad7879_ts_info,
 594                 .irq = IRQ_PF3,
 595                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 596                 .bus_num = 0,
 597                 .chip_select = 1,
 598                 .controller_data = &spi_ad7879_chip_info,
 599                 .mode = SPI_CPHA | SPI_CPOL,
 600         },
 601 #endif
 602 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 603         {
 604                 .modalias = "bfin-lq035q1-spi",
 605                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 606                 .bus_num = 0,
 607                 .chip_select = 2,
 608                 .controller_data = &lq035q1_spi_chip_info,
 609                 .mode = SPI_CPHA | SPI_CPOL,
 610         },
 611 #endif
 612 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 613         {
 614                 .modalias = "spidev",
 615                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 616                 .bus_num = 0,
 617                 .chip_select = 1,
 618                 .controller_data = &spidev_chip_info,
 619         },
 620 #endif
 621 };
 622
 623 /* SPI (0) */
 624 static struct resource bfin_spi0_resource[] = {
 625         [0] = {
 626                 .start = SPI0_REGBASE,
 627                 .end   = SPI0_REGBASE + 0xFF,
 628                 .flags = IORESOURCE_MEM,
 629         },
 630         [1] = {
 631                 .start = CH_SPI0,
 632                 .end   = CH_SPI0,
 633                 .flags = IORESOURCE_DMA,
 634         },
 635         [2] = {
 636                 .start = IRQ_SPI0,
 637                 .end   = IRQ_SPI0,
 638                 .flags = IORESOURCE_IRQ,
 639         }
 640 };
 641
 642 /* SPI (1) */
 643 static struct resource bfin_spi1_resource[] = {
 644         [0] = {
 645                 .start = SPI1_REGBASE,
 646                 .end   = SPI1_REGBASE + 0xFF,
 647                 .flags = IORESOURCE_MEM,
 648         },
 649         [1] = {
 650                 .start = CH_SPI1,
 651                 .end   = CH_SPI1,
 652                 .flags = IORESOURCE_DMA,
 653         },
 654         [2] = {
 655                 .start = IRQ_SPI1,
 656                 .end   = IRQ_SPI1,
 657                 .flags = IORESOURCE_IRQ,
 658         }
 659 };
 660
 661 /* SPI (2) */
 662 static struct resource bfin_spi2_resource[] = {
 663         [0] = {
 664                 .start = SPI2_REGBASE,
 665                 .end   = SPI2_REGBASE + 0xFF,
 666                 .flags = IORESOURCE_MEM,
 667         },
 668         [1] = {
 669                 .start = CH_SPI2,
 670                 .end   = CH_SPI2,
 671                 .flags = IORESOURCE_DMA,
 672         },
 673         [2] = {
 674                 .start = IRQ_SPI2,
 675                 .end   = IRQ_SPI2,
 676                 .flags = IORESOURCE_IRQ,
 677         }
 678 };
 679
 680 /* SPI controller data */
 681 static struct bfin5xx_spi_master bf538_spi_master_info0 = {
 682         .num_chipselect = 8,
 683         .enable_dma = 1,  /* master has the ability to do dma transfer */
 684         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 685 };
 686
 687 static struct platform_device bf538_spi_master0 = {
 688         .name = "bfin-spi",
 689         .id = 0, /* Bus number */
 690         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 691         .resource = bfin_spi0_resource,
 692         .dev = {
 693                 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
 694                 },
 695 };
 696
 697 static struct bfin5xx_spi_master bf538_spi_master_info1 = {
 698         .num_chipselect = 8,
 699         .enable_dma = 1,  /* master has the ability to do dma transfer */
 700         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 701 };
 702
 703 static struct platform_device bf538_spi_master1 = {
 704         .name = "bfin-spi",
 705         .id = 1, /* Bus number */
 706         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 707         .resource = bfin_spi1_resource,
 708         .dev = {
 709                 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
 710                 },
 711 };
 712
 713 static struct bfin5xx_spi_master bf538_spi_master_info2 = {
 714         .num_chipselect = 8,
 715         .enable_dma = 1,  /* master has the ability to do dma transfer */
 716         .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
 717 };
 718
 719 static struct platform_device bf538_spi_master2 = {
 720         .name = "bfin-spi",
 721         .id = 2, /* Bus number */
 722         .num_resources = ARRAY_SIZE(bfin_spi2_resource),
 723         .resource = bfin_spi2_resource,
 724         .dev = {
 725                 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
 726                 },
 727 };
 728
 729 #endif  /* spi master and devices */
 730
 731 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 732 static struct resource bfin_twi0_resource[] = {
 733         [0] = {
 734                 .start = TWI0_REGBASE,
 735                 .end   = TWI0_REGBASE + 0xFF,
 736                 .flags = IORESOURCE_MEM,
 737         },
 738         [1] = {
 739                 .start = IRQ_TWI0,
 740                 .end   = IRQ_TWI0,
 741                 .flags = IORESOURCE_IRQ,
 742         },
 743 };
 744
 745 static struct platform_device i2c_bfin_twi0_device = {
 746         .name = "i2c-bfin-twi",
 747         .id = 0,
 748         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 749         .resource = bfin_twi0_resource,
 750 };
 751
 752 #if !defined(CONFIG_BF542)      /* The BF542 only has 1 TWI */
 753 static struct resource bfin_twi1_resource[] = {
 754         [0] = {
 755                 .start = TWI1_REGBASE,
 756                 .end   = TWI1_REGBASE + 0xFF,
 757                 .flags = IORESOURCE_MEM,
 758         },
 759         [1] = {
 760                 .start = IRQ_TWI1,
 761                 .end   = IRQ_TWI1,
 762                 .flags = IORESOURCE_IRQ,
 763         },
 764 };
 765
 766 static struct platform_device i2c_bfin_twi1_device = {
 767         .name = "i2c-bfin-twi",
 768         .id = 1,
 769         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
 770         .resource = bfin_twi1_resource,
 771 };
 772 #endif
 773 #endif
 774
 775 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 776 #include <linux/gpio_keys.h>
 777
 778 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 779         {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
 780 };
 781
 782 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 783         .buttons        = bfin_gpio_keys_table,
 784         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 785 };
 786
 787 static struct platform_device bfin_device_gpiokeys = {
 788         .name      = "gpio-keys",
 789         .dev = {
 790                 .platform_data = &bfin_gpio_keys_data,
 791         },
 792 };
 793 #endif
 794
 795 static const unsigned int cclk_vlev_datasheet[] =
 796 {
 797 /*
 798  * Internal VLEV BF538SBBC1533
 799  ****temporarily using these values until data sheet is updated
 800  */
 801         VRPAIR(VLEV_100, 150000000),
 802         VRPAIR(VLEV_100, 250000000),
 803         VRPAIR(VLEV_110, 276000000),
 804         VRPAIR(VLEV_115, 301000000),
 805         VRPAIR(VLEV_120, 525000000),
 806         VRPAIR(VLEV_125, 550000000),
 807         VRPAIR(VLEV_130, 600000000),
 808 };
 809
 810 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 811         .tuple_tab = cclk_vlev_datasheet,
 812         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 813         .vr_settling_time = 25 /* us */,
 814 };
 815
 816 static struct platform_device bfin_dpmc = {
 817         .name = "bfin dpmc",
 818         .dev = {
 819                 .platform_data = &bfin_dmpc_vreg_data,
 820         },
 821 };
 822
 823 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 824 static struct mtd_partition ezkit_partitions[] = {
 825         {
 826                 .name       = "bootloader(nor)",
 827                 .size       = 0x40000,
 828                 .offset     = 0,
 829         }, {
 830                 .name       = "linux kernel(nor)",
 831                 .size       = 0x180000,
 832                 .offset     = MTDPART_OFS_APPEND,
 833         }, {
 834                 .name       = "file system(nor)",
 835                 .size       = MTDPART_SIZ_FULL,
 836                 .offset     = MTDPART_OFS_APPEND,
 837         }
 838 };
 839
 840 static struct physmap_flash_data ezkit_flash_data = {
 841         .width      = 2,
 842         .parts      = ezkit_partitions,
 843         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 844 };
 845
 846 static struct resource ezkit_flash_resource = {
 847         .start = 0x20000000,
 848 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 849         .end   = 0x202fffff,
 850 #else
 851         .end   = 0x203fffff,
 852 #endif
 853         .flags = IORESOURCE_MEM,
 854 };
 855
 856 static struct platform_device ezkit_flash_device = {
 857         .name          = "physmap-flash",
 858         .id            = 0,
 859         .dev = {
 860                 .platform_data = &ezkit_flash_data,
 861         },
 862         .num_resources = 1,
 863         .resource      = &ezkit_flash_resource,
 864 };
 865 #endif
 866
 867 static struct platform_device *cm_bf538_devices[] __initdata = {
 868
 869         &bfin_dpmc,
 870
 871 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 872         &rtc_device,
 873 #endif
 874
 875 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 876 #ifdef CONFIG_SERIAL_BFIN_UART0
 877         &bfin_uart0_device,
 878 #endif
 879 #ifdef CONFIG_SERIAL_BFIN_UART1
 880         &bfin_uart1_device,
 881 #endif
 882 #ifdef CONFIG_SERIAL_BFIN_UART2
 883         &bfin_uart2_device,
 884 #endif
 885 #endif
 886
 887 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 888         &bf538_spi_master0,
 889         &bf538_spi_master1,
 890         &bf538_spi_master2,
 891 #endif
 892
 893 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 894         &i2c_bfin_twi0_device,
 895         &i2c_bfin_twi1_device,
 896 #endif
 897
 898 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 899 #ifdef CONFIG_BFIN_SIR0
 900         &bfin_sir0_device,
 901 #endif
 902 #ifdef CONFIG_BFIN_SIR1
 903         &bfin_sir1_device,
 904 #endif
 905 #ifdef CONFIG_BFIN_SIR2
 906         &bfin_sir2_device,
 907 #endif
 908 #endif
 909
 910 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 911 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 912         &bfin_sport0_uart_device,
 913 #endif
 914 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 915         &bfin_sport1_uart_device,
 916 #endif
 917 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 918         &bfin_sport2_uart_device,
 919 #endif
 920 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
 921         &bfin_sport3_uart_device,
 922 #endif
 923 #endif
 924
 925 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 926         &bfin_can_device,
 927 #endif
 928
 929 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 930         &smc91x_device,
 931 #endif
 932
 933 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 934         &bfin_lq035q1_device,
 935 #endif
 936
 937 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 938         &bfin_device_gpiokeys,
 939 #endif
 940
 941 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 942         &ezkit_flash_device,
 943 #endif
 944 };
 945
 946 static int __init ezkit_init(void)
 947 {
 948         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 949         platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
 950
 951 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 952         spi_register_board_info(bf538_spi_board_info,
 953                         ARRAY_SIZE(bf538_spi_board_info));
 954 #endif
 955
 956         return 0;
 957 }
 958
 959 arch_initcall(ezkit_init);
 960
 961 static struct platform_device *ezkit_early_devices[] __initdata = {
 962 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 963 #ifdef CONFIG_SERIAL_BFIN_UART0
 964         &bfin_uart0_device,
 965 #endif
 966 #ifdef CONFIG_SERIAL_BFIN_UART1
 967         &bfin_uart1_device,
 968 #endif
 969 #ifdef CONFIG_SERIAL_BFIN_UART2
 970         &bfin_uart2_device,
 971 #endif
 972 #endif
 973
 974 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 975 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 976         &bfin_sport0_uart_device,
 977 #endif
 978 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 979         &bfin_sport1_uart_device,
 980 #endif
 981 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 982         &bfin_sport2_uart_device,
 983 #endif
 984 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
 985         &bfin_sport3_uart_device,
 986 #endif
 987 #endif
 988 };
 989
 990 void __init native_machine_early_platform_add_devices(void)
 991 {
 992         printk(KERN_INFO "register early platform devices\n");
 993         early_platform_add_devices(ezkit_early_devices,
 994                 ARRAY_SIZE(ezkit_early_devices));
 995 }