arch/blackfin/mach-bf537/boards/stamp.c

   1 /*
   2  * File:         arch/blackfin/mach-bf537/boards/stamp.c
   3  * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
   4  * Author:       Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2006 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/kernel.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/mtd/mtd.h>
  35 #include <linux/mtd/nand.h>
  36 #include <linux/mtd/partitions.h>
  37 #include <linux/mtd/plat-ram.h>
  38 #include <linux/mtd/physmap.h>
  39 #include <linux/spi/spi.h>
  40 #include <linux/spi/flash.h>
  41 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  42 #include <linux/usb/isp1362.h>
  43 #endif
  44 #include <linux/ata_platform.h>
  45 #include <linux/irq.h>
  46 #include <linux/interrupt.h>
  47 #include <linux/i2c.h>
  48 #include <linux/usb/sl811.h>
  49 #include <asm/dma.h>
  50 #include <asm/bfin5xx_spi.h>
  51 #include <asm/reboot.h>
  52 #include <asm/portmux.h>
  53 #include <asm/dpmc.h>
  54 #include <linux/spi/ad7877.h>
  55
  56 /*
  57  * Name the Board for the /proc/cpuinfo
  58  */
  59 const char bfin_board_name[] = "ADDS-BF537-STAMP";
  60
  61 /*
  62  *  Driver needs to know address, irq and flag pin.
  63  */
  64
  65 #define ISP1761_BASE       0x203C0000
  66 #define ISP1761_IRQ        IRQ_PF7
  67
  68 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  69 static struct resource bfin_isp1761_resources[] = {
  70         [0] = {
  71                 .name   = "isp1761-regs",
  72                 .start  = ISP1761_BASE + 0x00000000,
  73                 .end    = ISP1761_BASE + 0x000fffff,
  74                 .flags  = IORESOURCE_MEM,
  75         },
  76         [1] = {
  77                 .start  = ISP1761_IRQ,
  78                 .end    = ISP1761_IRQ,
  79                 .flags  = IORESOURCE_IRQ,
  80         },
  81 };
  82
  83 static struct platform_device bfin_isp1761_device = {
  84         .name           = "isp1761",
  85         .id             = 0,
  86         .num_resources  = ARRAY_SIZE(bfin_isp1761_resources),
  87         .resource       = bfin_isp1761_resources,
  88 };
  89
  90 static struct platform_device *bfin_isp1761_devices[] = {
  91         &bfin_isp1761_device,
  92 };
  93
  94 int __init bfin_isp1761_init(void)
  95 {
  96         unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
  97
  98         printk(KERN_INFO "%s(): registering device resources\n", __func__);
  99         set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
 100
 101         return platform_add_devices(bfin_isp1761_devices, num_devices);
 102 }
 103
 104 void __exit bfin_isp1761_exit(void)
 105 {
 106         platform_device_unregister(&bfin_isp1761_device);
 107 }
 108
 109 arch_initcall(bfin_isp1761_init);
 110 #endif
 111
 112 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 113 #include <linux/input.h>
 114 #include <linux/gpio_keys.h>
 115
 116 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 117         {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
 118         {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
 119         {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
 120         {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
 121 };
 122
 123 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 124         .buttons        = bfin_gpio_keys_table,
 125         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 126 };
 127
 128 static struct platform_device bfin_device_gpiokeys = {
 129         .name      = "gpio-keys",
 130         .dev = {
 131                 .platform_data = &bfin_gpio_keys_data,
 132         },
 133 };
 134 #endif
 135
 136 static struct resource bfin_gpios_resources = {
 137         .start = 0,
 138         .end   = MAX_BLACKFIN_GPIOS - 1,
 139         .flags = IORESOURCE_IRQ,
 140 };
 141
 142 static struct platform_device bfin_gpios_device = {
 143         .name = "simple-gpio",
 144         .id = -1,
 145         .num_resources = 1,
 146         .resource = &bfin_gpios_resources,
 147 };
 148
 149 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 150 static struct resource bfin_pcmcia_cf_resources[] = {
 151         {
 152                 .start = 0x20310000, /* IO PORT */
 153                 .end = 0x20312000,
 154                 .flags = IORESOURCE_MEM,
 155         }, {
 156                 .start = 0x20311000, /* Attribute Memory */
 157                 .end = 0x20311FFF,
 158                 .flags = IORESOURCE_MEM,
 159         }, {
 160                 .start = IRQ_PF4,
 161                 .end = IRQ_PF4,
 162                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 163         }, {
 164                 .start = 6, /* Card Detect PF6 */
 165                 .end = 6,
 166                 .flags = IORESOURCE_IRQ,
 167         },
 168 };
 169
 170 static struct platform_device bfin_pcmcia_cf_device = {
 171         .name = "bfin_cf_pcmcia",
 172         .id = -1,
 173         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
 174         .resource = bfin_pcmcia_cf_resources,
 175 };
 176 #endif
 177
 178 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 179 static struct platform_device rtc_device = {
 180         .name = "rtc-bfin",
 181         .id   = -1,
 182 };
 183 #endif
 184
 185 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 186 static struct resource smc91x_resources[] = {
 187         {
 188                 .name = "smc91x-regs",
 189                 .start = 0x20300300,
 190                 .end = 0x20300300 + 16,
 191                 .flags = IORESOURCE_MEM,
 192         }, {
 193
 194                 .start = IRQ_PF7,
 195                 .end = IRQ_PF7,
 196                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 197         },
 198 };
 199 static struct platform_device smc91x_device = {
 200         .name = "smc91x",
 201         .id = 0,
 202         .num_resources = ARRAY_SIZE(smc91x_resources),
 203         .resource = smc91x_resources,
 204 };
 205 #endif
 206
 207 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 208 static struct resource dm9000_resources[] = {
 209         [0] = {
 210                 .start  = 0x203FB800,
 211                 .end    = 0x203FB800 + 8,
 212                 .flags  = IORESOURCE_MEM,
 213         },
 214         [1] = {
 215                 .start  = IRQ_PF9,
 216                 .end    = IRQ_PF9,
 217                 .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
 218         },
 219 };
 220
 221 static struct platform_device dm9000_device = {
 222         .name           = "dm9000",
 223         .id             = -1,
 224         .num_resources  = ARRAY_SIZE(dm9000_resources),
 225         .resource       = dm9000_resources,
 226 };
 227 #endif
 228
 229 #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
 230 static struct resource ax88180_resources[] = {
 231         [0] = {
 232                 .start  = 0x20300000,
 233                 .end    = 0x20300000 + 0x8000,
 234                 .flags  = IORESOURCE_MEM,
 235         },
 236         [1] = {
 237                 .start  = IRQ_PF7,
 238                 .end    = IRQ_PF7,
 239                 .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL),
 240         },
 241 };
 242
 243 static struct platform_device ax88180_device = {
 244         .name           = "ax88180",
 245         .id             = -1,
 246         .num_resources  = ARRAY_SIZE(ax88180_resources),
 247         .resource       = ax88180_resources,
 248 };
 249 #endif
 250
 251 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 252 static struct resource sl811_hcd_resources[] = {
 253         {
 254                 .start = 0x20340000,
 255                 .end = 0x20340000,
 256                 .flags = IORESOURCE_MEM,
 257         }, {
 258                 .start = 0x20340004,
 259                 .end = 0x20340004,
 260                 .flags = IORESOURCE_MEM,
 261         }, {
 262                 .start = CONFIG_USB_SL811_BFIN_IRQ,
 263                 .end = CONFIG_USB_SL811_BFIN_IRQ,
 264                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 265         },
 266 };
 267
 268 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
 269 void sl811_port_power(struct device *dev, int is_on)
 270 {
 271         gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
 272         gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
 273 }
 274 #endif
 275
 276 static struct sl811_platform_data sl811_priv = {
 277         .potpg = 10,
 278         .power = 250,       /* == 500mA */
 279 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
 280         .port_power = &sl811_port_power,
 281 #endif
 282 };
 283
 284 static struct platform_device sl811_hcd_device = {
 285         .name = "sl811-hcd",
 286         .id = 0,
 287         .dev = {
 288                 .platform_data = &sl811_priv,
 289         },
 290         .num_resources = ARRAY_SIZE(sl811_hcd_resources),
 291         .resource = sl811_hcd_resources,
 292 };
 293 #endif
 294
 295 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 296 static struct resource isp1362_hcd_resources[] = {
 297         {
 298                 .start = 0x20360000,
 299                 .end = 0x20360000,
 300                 .flags = IORESOURCE_MEM,
 301         }, {
 302                 .start = 0x20360004,
 303                 .end = 0x20360004,
 304                 .flags = IORESOURCE_MEM,
 305         }, {
 306                 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
 307                 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
 308                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 309         },
 310 };
 311
 312 static struct isp1362_platform_data isp1362_priv = {
 313         .sel15Kres = 1,
 314         .clknotstop = 0,
 315         .oc_enable = 0,
 316         .int_act_high = 0,
 317         .int_edge_triggered = 0,
 318         .remote_wakeup_connected = 0,
 319         .no_power_switching = 1,
 320         .power_switching_mode = 0,
 321 };
 322
 323 static struct platform_device isp1362_hcd_device = {
 324         .name = "isp1362-hcd",
 325         .id = 0,
 326         .dev = {
 327                 .platform_data = &isp1362_priv,
 328         },
 329         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 330         .resource = isp1362_hcd_resources,
 331 };
 332 #endif
 333
 334 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 335 static struct platform_device bfin_mac_device = {
 336         .name = "bfin_mac",
 337 };
 338 #endif
 339
 340 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 341 static struct resource net2272_bfin_resources[] = {
 342         {
 343                 .start = 0x20300000,
 344                 .end = 0x20300000 + 0x100,
 345                 .flags = IORESOURCE_MEM,
 346         }, {
 347                 .start = IRQ_PF7,
 348                 .end = IRQ_PF7,
 349                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 350         },
 351 };
 352
 353 static struct platform_device net2272_bfin_device = {
 354         .name = "net2272",
 355         .id = -1,
 356         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 357         .resource = net2272_bfin_resources,
 358 };
 359 #endif
 360
 361 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 362 #ifdef CONFIG_MTD_PARTITIONS
 363 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
 364
 365 static struct mtd_partition bfin_plat_nand_partitions[] = {
 366         {
 367                 .name   = "linux kernel",
 368                 .size   = 0x400000,
 369                 .offset = 0,
 370         }, {
 371                 .name   = "file system",
 372                 .size   = MTDPART_SIZ_FULL,
 373                 .offset = MTDPART_OFS_APPEND,
 374         },
 375 };
 376 #endif
 377
 378 #define BFIN_NAND_PLAT_CLE 2
 379 #define BFIN_NAND_PLAT_ALE 1
 380 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 381 {
 382         struct nand_chip *this = mtd->priv;
 383
 384         if (cmd == NAND_CMD_NONE)
 385                 return;
 386
 387         if (ctrl & NAND_CLE)
 388                 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
 389         else
 390                 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
 391 }
 392
 393 #define BFIN_NAND_PLAT_READY GPIO_PF3
 394 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
 395 {
 396         return gpio_get_value(BFIN_NAND_PLAT_READY);
 397 }
 398
 399 static struct platform_nand_data bfin_plat_nand_data = {
 400         .chip = {
 401                 .chip_delay = 30,
 402 #ifdef CONFIG_MTD_PARTITIONS
 403                 .part_probe_types = part_probes,
 404                 .partitions = bfin_plat_nand_partitions,
 405                 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
 406 #endif
 407         },
 408         .ctrl = {
 409                 .cmd_ctrl  = bfin_plat_nand_cmd_ctrl,
 410                 .dev_ready = bfin_plat_nand_dev_ready,
 411         },
 412 };
 413
 414 #define MAX(x, y) (x > y ? x : y)
 415 static struct resource bfin_plat_nand_resources = {
 416         .start = 0x20212000,
 417         .end   = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
 418         .flags = IORESOURCE_IO,
 419 };
 420
 421 static struct platform_device bfin_async_nand_device = {
 422         .name = "gen_nand",
 423         .id = -1,
 424         .num_resources = 1,
 425         .resource = &bfin_plat_nand_resources,
 426         .dev = {
 427                 .platform_data = &bfin_plat_nand_data,
 428         },
 429 };
 430
 431 static void bfin_plat_nand_init(void)
 432 {
 433         gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
 434 }
 435 #else
 436 static void bfin_plat_nand_init(void) {}
 437 #endif
 438
 439 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 440 static struct mtd_partition stamp_partitions[] = {
 441         {
 442                 .name       = "Bootloader",
 443                 .size       = 0x40000,
 444                 .offset     = 0,
 445         }, {
 446                 .name       = "Kernel",
 447                 .size       = 0xE0000,
 448                 .offset     = MTDPART_OFS_APPEND,
 449         }, {
 450                 .name       = "RootFS",
 451                 .size       = 0x400000 - 0x40000 - 0xE0000 - 0x10000,
 452                 .offset     = MTDPART_OFS_APPEND,
 453         }, {
 454                 .name       = "MAC Address",
 455                 .size       = MTDPART_SIZ_FULL,
 456                 .offset     = 0x3F0000,
 457                 .mask_flags = MTD_WRITEABLE,
 458         }
 459 };
 460
 461 static struct physmap_flash_data stamp_flash_data = {
 462         .width      = 2,
 463         .parts      = stamp_partitions,
 464         .nr_parts   = ARRAY_SIZE(stamp_partitions),
 465 };
 466
 467 static struct resource stamp_flash_resource = {
 468         .start = 0x20000000,
 469         .end   = 0x203fffff,
 470         .flags = IORESOURCE_MEM,
 471 };
 472
 473 static struct platform_device stamp_flash_device = {
 474         .name          = "physmap-flash",
 475         .id            = 0,
 476         .dev = {
 477                 .platform_data = &stamp_flash_data,
 478         },
 479         .num_resources = 1,
 480         .resource      = &stamp_flash_resource,
 481 };
 482 #endif
 483
 484 #if defined(CONFIG_MTD_M25P80) \
 485         || defined(CONFIG_MTD_M25P80_MODULE)
 486 static struct mtd_partition bfin_spi_flash_partitions[] = {
 487         {
 488                 .name = "bootloader",
 489                 .size = 0x00040000,
 490                 .offset = 0,
 491                 .mask_flags = MTD_CAP_ROM
 492         }, {
 493                 .name = "kernel",
 494                 .size = 0xe0000,
 495                 .offset = MTDPART_OFS_APPEND,
 496         }, {
 497                 .name = "file system",
 498                 .size = MTDPART_SIZ_FULL,
 499                 .offset = MTDPART_OFS_APPEND,
 500         }
 501 };
 502
 503 static struct flash_platform_data bfin_spi_flash_data = {
 504         .name = "m25p80",
 505         .parts = bfin_spi_flash_partitions,
 506         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 507         .type = "m25p64",
 508 };
 509
 510 /* SPI flash chip (m25p64) */
 511 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 512         .enable_dma = 0,         /* use dma transfer with this chip*/
 513         .bits_per_word = 8,
 514 };
 515 #endif
 516
 517 #if defined(CONFIG_SPI_ADC_BF533) \
 518         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 519 /* SPI ADC chip */
 520 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 521         .enable_dma = 1,         /* use dma transfer with this chip*/
 522         .bits_per_word = 16,
 523 };
 524 #endif
 525
 526 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 527         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 528 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 529         .enable_dma = 0,
 530         .bits_per_word = 16,
 531 };
 532 #endif
 533
 534 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 535 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 536         .enable_dma = 0,
 537         .bits_per_word = 16,
 538 };
 539 #endif
 540
 541 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 542 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 543         .enable_dma = 1,
 544         .bits_per_word = 8,
 545 };
 546 #endif
 547
 548 #if defined(CONFIG_PBX)
 549 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 550         .ctl_reg        = 0x4, /* send zero */
 551         .enable_dma     = 0,
 552         .bits_per_word  = 8,
 553         .cs_change_per_word = 1,
 554 };
 555 #endif
 556
 557 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 558 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 559         .enable_dma = 0,
 560         .bits_per_word = 16,
 561 };
 562
 563 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 564         .model                  = 7877,
 565         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 566         .x_plate_ohms           = 419,
 567         .y_plate_ohms           = 486,
 568         .pressure_max           = 1000,
 569         .pressure_min           = 0,
 570         .stopacq_polarity       = 1,
 571         .first_conversion_delay = 3,
 572         .acquisition_time       = 1,
 573         .averaging              = 1,
 574         .pen_down_acc_interval  = 1,
 575 };
 576 #endif
 577
 578 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 579 static struct bfin5xx_spi_chip spidev_chip_info = {
 580         .enable_dma = 0,
 581         .bits_per_word = 8,
 582 };
 583 #endif
 584
 585 #if defined(CONFIG_MTD_DATAFLASH) \
 586         || defined(CONFIG_MTD_DATAFLASH_MODULE)
 587 /* DataFlash chip */
 588 static struct bfin5xx_spi_chip data_flash_chip_info = {
 589         .enable_dma = 0,         /* use dma transfer with this chip*/
 590         .bits_per_word = 8,
 591 };
 592 #endif
 593
 594 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 595 #if defined(CONFIG_MTD_M25P80) \
 596         || defined(CONFIG_MTD_M25P80_MODULE)
 597         {
 598                 /* the modalias must be the same as spi device driver name */
 599                 .modalias = "m25p80", /* Name of spi_driver for this device */
 600                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 601                 .bus_num = 0, /* Framework bus number */
 602                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 603                 .platform_data = &bfin_spi_flash_data,
 604                 .controller_data = &spi_flash_chip_info,
 605                 .mode = SPI_MODE_3,
 606         },
 607 #endif
 608 #if defined(CONFIG_MTD_DATAFLASH) \
 609         || defined(CONFIG_MTD_DATAFLASH_MODULE)
 610         {       /* DataFlash chip */
 611                 .modalias = "mtd_dataflash",
 612                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 613                 .bus_num = 0, /* Framework bus number */
 614                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 615                 .controller_data = &data_flash_chip_info,
 616                 .mode = SPI_MODE_3,
 617         },
 618 #endif
 619 #if defined(CONFIG_SPI_ADC_BF533) \
 620         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 621         {
 622                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 623                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 624                 .bus_num = 0, /* Framework bus number */
 625                 .chip_select = 1, /* Framework chip select. */
 626                 .platform_data = NULL, /* No spi_driver specific config */
 627                 .controller_data = &spi_adc_chip_info,
 628         },
 629 #endif
 630
 631 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 632         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 633         {
 634                 .modalias = "ad1836-spi",
 635                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 636                 .bus_num = 0,
 637                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 638                 .controller_data = &ad1836_spi_chip_info,
 639         },
 640 #endif
 641 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 642         {
 643                 .modalias = "ad9960-spi",
 644                 .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
 645                 .bus_num = 0,
 646                 .chip_select = 1,
 647                 .controller_data = &ad9960_spi_chip_info,
 648         },
 649 #endif
 650 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 651         {
 652                 .modalias = "spi_mmc_dummy",
 653                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 654                 .bus_num = 0,
 655                 .chip_select = 0,
 656                 .platform_data = NULL,
 657                 .controller_data = &spi_mmc_chip_info,
 658                 .mode = SPI_MODE_3,
 659         },
 660         {
 661                 .modalias = "spi_mmc",
 662                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 663                 .bus_num = 0,
 664                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 665                 .platform_data = NULL,
 666                 .controller_data = &spi_mmc_chip_info,
 667                 .mode = SPI_MODE_3,
 668         },
 669 #endif
 670 #if defined(CONFIG_PBX)
 671         {
 672                 .modalias = "fxs-spi",
 673                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 674                 .bus_num = 0,
 675                 .chip_select = 8 - CONFIG_J11_JUMPER,
 676                 .controller_data = &spi_si3xxx_chip_info,
 677                 .mode = SPI_MODE_3,
 678         },
 679         {
 680                 .modalias = "fxo-spi",
 681                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 682                 .bus_num = 0,
 683                 .chip_select = 8 - CONFIG_J19_JUMPER,
 684                 .controller_data = &spi_si3xxx_chip_info,
 685                 .mode = SPI_MODE_3,
 686         },
 687 #endif
 688 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 689         {
 690                 .modalias               = "ad7877",
 691                 .platform_data          = &bfin_ad7877_ts_info,
 692                 .irq                    = IRQ_PF6,
 693                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 694                 .bus_num        = 0,
 695                 .chip_select  = 1,
 696                 .controller_data = &spi_ad7877_chip_info,
 697         },
 698 #endif
 699 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 700         {
 701                 .modalias = "spidev",
 702                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 703                 .bus_num = 0,
 704                 .chip_select = 1,
 705                 .controller_data = &spidev_chip_info,
 706         },
 707 #endif
 708 };
 709
 710 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 711 /* SPI controller data */
 712 static struct bfin5xx_spi_master bfin_spi0_info = {
 713         .num_chipselect = 8,
 714         .enable_dma = 1,  /* master has the ability to do dma transfer */
 715         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 716 };
 717
 718 /* SPI (0) */
 719 static struct resource bfin_spi0_resource[] = {
 720         [0] = {
 721                 .start = SPI0_REGBASE,
 722                 .end   = SPI0_REGBASE + 0xFF,
 723                 .flags = IORESOURCE_MEM,
 724                 },
 725         [1] = {
 726                 .start = CH_SPI,
 727                 .end   = CH_SPI,
 728                 .flags = IORESOURCE_IRQ,
 729         },
 730 };
 731
 732 static struct platform_device bfin_spi0_device = {
 733         .name = "bfin-spi",
 734         .id = 0, /* Bus number */
 735         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 736         .resource = bfin_spi0_resource,
 737         .dev = {
 738                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 739         },
 740 };
 741 #endif  /* spi master and devices */
 742
 743 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 744 static struct platform_device bfin_fb_device = {
 745         .name = "bf537-lq035",
 746 };
 747 #endif
 748
 749 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 750 static struct platform_device bfin_fb_adv7393_device = {
 751         .name = "bfin-adv7393",
 752 };
 753 #endif
 754
 755 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 756 static struct resource bfin_uart_resources[] = {
 757 #ifdef CONFIG_SERIAL_BFIN_UART0
 758         {
 759                 .start = 0xFFC00400,
 760                 .end = 0xFFC004FF,
 761                 .flags = IORESOURCE_MEM,
 762         },
 763 #endif
 764 #ifdef CONFIG_SERIAL_BFIN_UART1
 765         {
 766                 .start = 0xFFC02000,
 767                 .end = 0xFFC020FF,
 768                 .flags = IORESOURCE_MEM,
 769         },
 770 #endif
 771 };
 772
 773 static struct platform_device bfin_uart_device = {
 774         .name = "bfin-uart",
 775         .id = 1,
 776         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 777         .resource = bfin_uart_resources,
 778 };
 779 #endif
 780
 781 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 782 static struct resource bfin_sir_resources[] = {
 783 #ifdef CONFIG_BFIN_SIR0
 784         {
 785                 .start = 0xFFC00400,
 786                 .end = 0xFFC004FF,
 787                 .flags = IORESOURCE_MEM,
 788         },
 789 #endif
 790 #ifdef CONFIG_BFIN_SIR1
 791         {
 792                 .start = 0xFFC02000,
 793                 .end = 0xFFC020FF,
 794                 .flags = IORESOURCE_MEM,
 795         },
 796 #endif
 797 };
 798
 799 static struct platform_device bfin_sir_device = {
 800         .name = "bfin_sir",
 801         .id = 0,
 802         .num_resources = ARRAY_SIZE(bfin_sir_resources),
 803         .resource = bfin_sir_resources,
 804 };
 805 #endif
 806
 807 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 808 static struct resource bfin_twi0_resource[] = {
 809         [0] = {
 810                 .start = TWI0_REGBASE,
 811                 .end   = TWI0_REGBASE,
 812                 .flags = IORESOURCE_MEM,
 813         },
 814         [1] = {
 815                 .start = IRQ_TWI,
 816                 .end   = IRQ_TWI,
 817                 .flags = IORESOURCE_IRQ,
 818         },
 819 };
 820
 821 static struct platform_device i2c_bfin_twi_device = {
 822         .name = "i2c-bfin-twi",
 823         .id = 0,
 824         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 825         .resource = bfin_twi0_resource,
 826 };
 827 #endif
 828
 829 #ifdef CONFIG_I2C_BOARDINFO
 830 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 831 #if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
 832         {
 833                 I2C_BOARD_INFO("ad7142_joystick", 0x2C),
 834                 .irq = 55,
 835         },
 836 #endif
 837 #if defined(CONFIG_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 838         {
 839                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 840         },
 841 #endif
 842 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 843         {
 844                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 845                 .irq = 72,
 846         },
 847 #endif
 848 };
 849 #endif
 850
 851 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 852 static struct platform_device bfin_sport0_uart_device = {
 853         .name = "bfin-sport-uart",
 854         .id = 0,
 855 };
 856
 857 static struct platform_device bfin_sport1_uart_device = {
 858         .name = "bfin-sport-uart",
 859         .id = 1,
 860 };
 861 #endif
 862
 863 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 864 #define PATA_INT        IRQ_PF5
 865
 866 static struct pata_platform_info bfin_pata_platform_data = {
 867         .ioport_shift = 1,
 868         .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
 869 };
 870
 871 static struct resource bfin_pata_resources[] = {
 872         {
 873                 .start = 0x20314020,
 874                 .end = 0x2031403F,
 875                 .flags = IORESOURCE_MEM,
 876         },
 877         {
 878                 .start = 0x2031401C,
 879                 .end = 0x2031401F,
 880                 .flags = IORESOURCE_MEM,
 881         },
 882         {
 883                 .start = PATA_INT,
 884                 .end = PATA_INT,
 885                 .flags = IORESOURCE_IRQ,
 886         },
 887 };
 888
 889 static struct platform_device bfin_pata_device = {
 890         .name = "pata_platform",
 891         .id = -1,
 892         .num_resources = ARRAY_SIZE(bfin_pata_resources),
 893         .resource = bfin_pata_resources,
 894         .dev = {
 895                 .platform_data = &bfin_pata_platform_data,
 896         }
 897 };
 898 #endif
 899
 900 static const unsigned int cclk_vlev_datasheet[] =
 901 {
 902         VRPAIR(VLEV_085, 250000000),
 903         VRPAIR(VLEV_090, 376000000),
 904         VRPAIR(VLEV_095, 426000000),
 905         VRPAIR(VLEV_100, 426000000),
 906         VRPAIR(VLEV_105, 476000000),
 907         VRPAIR(VLEV_110, 476000000),
 908         VRPAIR(VLEV_115, 476000000),
 909         VRPAIR(VLEV_120, 500000000),
 910         VRPAIR(VLEV_125, 533000000),
 911         VRPAIR(VLEV_130, 600000000),
 912 };
 913
 914 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 915         .tuple_tab = cclk_vlev_datasheet,
 916         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 917         .vr_settling_time = 25 /* us */,
 918 };
 919
 920 static struct platform_device bfin_dpmc = {
 921         .name = "bfin dpmc",
 922         .dev = {
 923                 .platform_data = &bfin_dmpc_vreg_data,
 924         },
 925 };
 926
 927 static struct platform_device *stamp_devices[] __initdata = {
 928
 929         &bfin_dpmc,
 930
 931 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 932         &bfin_pcmcia_cf_device,
 933 #endif
 934
 935 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 936         &rtc_device,
 937 #endif
 938
 939 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 940         &sl811_hcd_device,
 941 #endif
 942
 943 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 944         &isp1362_hcd_device,
 945 #endif
 946
 947 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 948         &smc91x_device,
 949 #endif
 950
 951 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 952         &dm9000_device,
 953 #endif
 954
 955 #if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE)
 956         &ax88180_device,
 957 #endif
 958
 959 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 960         &bfin_mac_device,
 961 #endif
 962
 963 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 964         &net2272_bfin_device,
 965 #endif
 966
 967 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 968         &bfin_spi0_device,
 969 #endif
 970
 971 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 972         &bfin_fb_device,
 973 #endif
 974
 975 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 976         &bfin_fb_adv7393_device,
 977 #endif
 978
 979 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 980         &bfin_uart_device,
 981 #endif
 982
 983 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 984         &bfin_sir_device,
 985 #endif
 986
 987 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 988         &i2c_bfin_twi_device,
 989 #endif
 990
 991 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 992         &bfin_sport0_uart_device,
 993         &bfin_sport1_uart_device,
 994 #endif
 995
 996 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 997         &bfin_pata_device,
 998 #endif
 999
1000 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1001         &bfin_device_gpiokeys,
1002 #endif
1003
1004         &bfin_gpios_device,
1005
1006 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1007         &bfin_async_nand_device,
1008 #endif
1009
1010 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1011         &stamp_flash_device,
1012 #endif
1013 };
1014
1015 static int __init stamp_init(void)
1016 {
1017         printk(KERN_INFO "%s(): registering device resources\n", __func__);
1018
1019 #ifdef CONFIG_I2C_BOARDINFO
1020         i2c_register_board_info(0, bfin_i2c_board_info,
1021                                 ARRAY_SIZE(bfin_i2c_board_info));
1022 #endif
1023
1024         bfin_plat_nand_init();
1025         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
1026         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1027
1028 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1029         irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
1030 #endif
1031
1032         return 0;
1033 }
1034
1035 arch_initcall(stamp_init);
1036
1037 void native_machine_restart(char *cmd)
1038 {
1039         /* workaround reboot hang when booting from SPI */
1040         if ((bfin_read_SYSCR() & 0x7) == 0x3)
1041                 bfin_gpio_reset_spi0_ssel1();
1042 }
1043
1044 /*
1045  * Currently the MAC address is saved in Flash by U-Boot
1046  */
1047 #define FLASH_MAC       0x203f0000
1048 void bfin_get_ether_addr(char *addr)
1049 {
1050         *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
1051         *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
1052 }
1053 EXPORT_SYMBOL(bfin_get_ether_addr);