arch/blackfin/mach-bf533/include/mach/pll.h

   1 /*
   2  * Copyright 2005-2008 Analog Devices Inc.
   3  *
   4  * Licensed under the GPL-2 or later
   5  */
   6
   7 #ifndef _MACH_PLL_H
   8 #define _MACH_PLL_H
   9
  10 #include <asm/blackfin.h>
  11 #include <asm/irqflags.h>
  12
  13 /* Writing to PLL_CTL initiates a PLL relock sequence. */
  14 static __inline__ void bfin_write_PLL_CTL(unsigned int val)
  15 {
  16         unsigned long flags, iwr;
  17
  18         if (val == bfin_read_PLL_CTL())
  19                 return;
  20
  21         flags = hard_local_irq_save();
  22         /* Enable the PLL Wakeup bit in SIC IWR */
  23         iwr = bfin_read32(SIC_IWR);
  24         /* Only allow PPL Wakeup) */
  25         bfin_write32(SIC_IWR, IWR_ENABLE(0));
  26
  27         bfin_write16(PLL_CTL, val);
  28         SSYNC();
  29         asm("IDLE;");
  30
  31         bfin_write32(SIC_IWR, iwr);
  32         hard_local_irq_restore(flags);
  33 }
  34
  35 /* Writing to VR_CTL initiates a PLL relock sequence. */
  36 static __inline__ void bfin_write_VR_CTL(unsigned int val)
  37 {
  38         unsigned long flags, iwr;
  39
  40         if (val == bfin_read_VR_CTL())
  41                 return;
  42
  43         flags = hard_local_irq_save();
  44         /* Enable the PLL Wakeup bit in SIC IWR */
  45         iwr = bfin_read32(SIC_IWR);
  46         /* Only allow PPL Wakeup) */
  47         bfin_write32(SIC_IWR, IWR_ENABLE(0));
  48
  49         bfin_write16(VR_CTL, val);
  50         SSYNC();
  51         asm("IDLE;");
  52
  53         bfin_write32(SIC_IWR, iwr);
  54         hard_local_irq_restore(flags);
  55 }
  56
  57 #endif /* _MACH_PLL_H */