arch/blackfin/mach-bf527/boards/tll6527m.c

   1 /* File:        arch/blackfin/mach-bf527/boards/tll6527m.c
   2  * Based on:    arch/blackfin/mach-bf527/boards/ezkit.c
   3  * Author:      Ashish Gupta
   4  *
   5  * Copyright: 2010 - The Learning Labs Inc.
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <linux/leds.h>
  22 #include <linux/input.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/reboot.h>
  26 #include <asm/nand.h>
  27 #include <asm/portmux.h>
  28 #include <asm/dpmc.h>
  29
  30 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  31         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  32 #include <linux/spi/ad7879.h>
  33 #define LCD_BACKLIGHT_GPIO 0x40
  34 /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  35  * LCD Backlight Enable
  36  */
  37 #endif
  38
  39 /*
  40  * Name the Board for the /proc/cpuinfo
  41  */
  42 const char bfin_board_name[] = "TLL6527M";
  43 /*
  44  *  Driver needs to know address, irq and flag pin.
  45  */
  46
  47 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  48 static struct resource musb_resources[] = {
  49         [0] = {
  50                 .start  = 0xffc03800,
  51                 .end    = 0xffc03cff,
  52                 .flags  = IORESOURCE_MEM,
  53         },
  54         [1] = { /* general IRQ */
  55                 .start  = IRQ_USB_INT0,
  56                 .end    = IRQ_USB_INT0,
  57                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  58         },
  59         [2] = { /* DMA IRQ */
  60                 .start  = IRQ_USB_DMA,
  61                 .end    = IRQ_USB_DMA,
  62                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  63         },
  64 };
  65
  66 static struct musb_hdrc_config musb_config = {
  67         .multipoint     = 0,
  68         .dyn_fifo       = 0,
  69         .soft_con       = 1,
  70         .dma            = 1,
  71         .num_eps        = 8,
  72         .dma_channels   = 8,
  73         /*.gpio_vrsel   = GPIO_PG13,*/
  74         /* Some custom boards need to be active low, just set it to "0"
  75          * if it is the case.
  76          */
  77         .gpio_vrsel_active      = 1,
  78 };
  79
  80 static struct musb_hdrc_platform_data musb_plat = {
  81 #if defined(CONFIG_USB_MUSB_OTG)
  82         .mode           = MUSB_OTG,
  83 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  84         .mode           = MUSB_HOST,
  85 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  86         .mode           = MUSB_PERIPHERAL,
  87 #endif
  88         .config         = &musb_config,
  89 };
  90
  91 static u64 musb_dmamask = ~(u32)0;
  92
  93 static struct platform_device musb_device = {
  94         .name           = "musb-blackfin",
  95         .id             = 0,
  96         .dev = {
  97                 .dma_mask               = &musb_dmamask,
  98                 .coherent_dma_mask      = 0xffffffff,
  99                 .platform_data          = &musb_plat,
 100         },
 101         .num_resources  = ARRAY_SIZE(musb_resources),
 102         .resource       = musb_resources,
 103 };
 104 #endif
 105
 106 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 107 #include <asm/bfin-lq035q1.h>
 108
 109 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 110         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 111         .ppi_mode = USE_RGB565_16_BIT_PPI,
 112         .use_bl = 1,
 113         .gpio_bl = LCD_BACKLIGHT_GPIO,
 114 };
 115
 116 static struct resource bfin_lq035q1_resources[] = {
 117         {
 118                 .start = IRQ_PPI_ERROR,
 119                 .end = IRQ_PPI_ERROR,
 120                 .flags = IORESOURCE_IRQ,
 121         },
 122 };
 123
 124 static struct platform_device bfin_lq035q1_device = {
 125         .name           = "bfin-lq035q1",
 126         .id             = -1,
 127         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 128         .resource       = bfin_lq035q1_resources,
 129         .dev            = {
 130                 .platform_data = &bfin_lq035q1_data,
 131         },
 132 };
 133 #endif
 134
 135 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 136 static struct mtd_partition tll6527m_partitions[] = {
 137         {
 138                 .name       = "bootloader(nor)",
 139                 .size       = 0xA0000,
 140                 .offset     = 0,
 141         }, {
 142                 .name       = "linux kernel(nor)",
 143                 .size       = 0xD00000,
 144                 .offset     = MTDPART_OFS_APPEND,
 145         }, {
 146                 .name       = "file system(nor)",
 147                 .size       = MTDPART_SIZ_FULL,
 148                 .offset     = MTDPART_OFS_APPEND,
 149         }
 150 };
 151
 152 static struct physmap_flash_data tll6527m_flash_data = {
 153         .width      = 2,
 154         .parts      = tll6527m_partitions,
 155         .nr_parts   = ARRAY_SIZE(tll6527m_partitions),
 156 };
 157
 158 static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
 159
 160 static struct resource tll6527m_flash_resource[] = {
 161         {
 162                 .name  = "cfi_probe",
 163                 .start = 0x20000000,
 164                 .end   = 0x201fffff,
 165                 .flags = IORESOURCE_MEM,
 166         }, {
 167                 .start = (unsigned long)tll6527m_flash_gpios,
 168                 .end   = ARRAY_SIZE(tll6527m_flash_gpios),
 169                 .flags = IORESOURCE_IRQ,
 170         }
 171 };
 172
 173 static struct platform_device tll6527m_flash_device = {
 174         .name          = "gpio-addr-flash",
 175         .id            = 0,
 176         .dev = {
 177                 .platform_data = &tll6527m_flash_data,
 178         },
 179         .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
 180         .resource      = tll6527m_flash_resource,
 181 };
 182 #endif
 183
 184 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 185 /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
 186  * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
 187  * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
 188  * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
 189  */
 190 #include <linux/gpio-decoder.h>
 191 #define EXP_GPIO_SPISEL_BASE 0x64
 192 static unsigned gpio_addr_inputs[] = {
 193         GPIO_PG1, GPIO_PH9, GPIO_PH10
 194 };
 195
 196 static struct gpio_decoder_platform_data spi_decoded_cs = {
 197         .base           = EXP_GPIO_SPISEL_BASE,
 198         .input_addrs    = gpio_addr_inputs,
 199         .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
 200         .default_output = 0,
 201 /*      .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
 202 };
 203
 204 static struct platform_device spi_decoded_gpio = {
 205         .name   = "gpio-decoder",
 206         .id     = 0,
 207         .dev    = {
 208                 .platform_data = &spi_decoded_cs,
 209         },
 210 };
 211
 212 #else
 213 #define EXP_GPIO_SPISEL_BASE 0x0
 214
 215 #endif
 216
 217 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 218 #include <linux/input/adxl34x.h>
 219 static const struct adxl34x_platform_data adxl345_info = {
 220         .x_axis_offset = 0,
 221         .y_axis_offset = 0,
 222         .z_axis_offset = 0,
 223         .tap_threshold = 0x31,
 224         .tap_duration = 0x10,
 225         .tap_latency = 0x60,
 226         .tap_window = 0xF0,
 227         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 228         .act_axis_control = 0xFF,
 229         .activity_threshold = 5,
 230         .inactivity_threshold = 2,
 231         .inactivity_time = 2,
 232         .free_fall_threshold = 0x7,
 233         .free_fall_time = 0x20,
 234         .data_rate = 0x8,
 235         .data_range = ADXL_FULL_RES,
 236
 237         .ev_type = EV_ABS,
 238         .ev_code_x = ABS_X,             /* EV_REL */
 239         .ev_code_y = ABS_Y,             /* EV_REL */
 240         .ev_code_z = ABS_Z,             /* EV_REL */
 241
 242         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 243
 244 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 245         .ev_code_act_inactivity = KEY_A,        /* EV_KEY */
 246         .use_int2 = 1,
 247         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 248         .fifo_mode = ADXL_FIFO_STREAM,
 249 };
 250 #endif
 251
 252 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 253 static struct platform_device rtc_device = {
 254         .name = "rtc-bfin",
 255         .id   = -1,
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 260 #include <linux/bfin_mac.h>
 261 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 262
 263 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 264         {
 265                 .addr = 1,
 266                 .irq = IRQ_MAC_PHYINT,
 267         },
 268 };
 269
 270 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 271         .phydev_number = 1,
 272         .phydev_data = bfin_phydev_data,
 273         .phy_mode = PHY_INTERFACE_MODE_RMII,
 274         .mac_peripherals = bfin_mac_peripherals,
 275 };
 276
 277 static struct platform_device bfin_mii_bus = {
 278         .name = "bfin_mii_bus",
 279         .dev = {
 280                 .platform_data = &bfin_mii_bus_data,
 281         }
 282 };
 283
 284 static struct platform_device bfin_mac_device = {
 285         .name = "bfin_mac",
 286         .dev = {
 287                 .platform_data = &bfin_mii_bus,
 288         }
 289 };
 290 #endif
 291
 292 #if defined(CONFIG_MTD_M25P80) \
 293         || defined(CONFIG_MTD_M25P80_MODULE)
 294 static struct mtd_partition bfin_spi_flash_partitions[] = {
 295         {
 296                 .name = "bootloader(spi)",
 297                 .size = 0x00040000,
 298                 .offset = 0,
 299                 .mask_flags = MTD_CAP_ROM
 300         }, {
 301                 .name = "linux kernel(spi)",
 302                 .size = MTDPART_SIZ_FULL,
 303                 .offset = MTDPART_OFS_APPEND,
 304         }
 305 };
 306
 307 static struct flash_platform_data bfin_spi_flash_data = {
 308         .name = "m25p80",
 309         .parts = bfin_spi_flash_partitions,
 310         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 311         .type = "m25p16",
 312 };
 313
 314 /* SPI flash chip (m25p64) */
 315 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 316         .enable_dma = 0,         /* use dma transfer with this chip*/
 317 };
 318 #endif
 319
 320 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 321 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 322         .enable_dma = 0,
 323 };
 324 #endif
 325
 326 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
 327         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 328 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 329         .model                  = 7879, /* Model = AD7879 */
 330         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 331         .pressure_max           = 10000,
 332         .pressure_min           = 0,
 333         .first_conversion_delay = 3,
 334                                 /* wait 512us before do a first conversion */
 335         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 336         .median                 = 2,    /* do 8 measurements */
 337         .averaging              = 1,
 338                                 /* take the average of 4 middle samples */
 339         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 340         .gpio_export            = 1,    /* configure AUX as GPIO output*/
 341         .gpio_base              = LCD_BACKLIGHT_GPIO,
 342 };
 343 #endif
 344
 345 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 346 static struct platform_device bfin_i2s = {
 347         .name = "bfin-i2s",
 348         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 349         /* TODO: add platform data here */
 350 };
 351 #endif
 352
 353 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 354 #include <linux/spi/mcp23s08.h>
 355 static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
 356         .chip[0].is_present = true,
 357         .base = 0x30,
 358 };
 359 static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
 360         .chip[2].is_present = true,
 361         .base = 0x38,
 362 };
 363 #endif
 364
 365 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 366 #if defined(CONFIG_MTD_M25P80) \
 367         || defined(CONFIG_MTD_M25P80_MODULE)
 368         {
 369                 /* the modalias must be the same as spi device driver name */
 370                 .modalias = "m25p80", /* Name of spi_driver for this device */
 371                 .max_speed_hz = 25000000,
 372                                 /* max spi clock (SCK) speed in HZ */
 373                 .bus_num = 0, /* Framework bus number */
 374                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
 375                 /* Can be connected to TLL6527M GPIO connector */
 376                 /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
 377                 .platform_data = &bfin_spi_flash_data,
 378                 .controller_data = &spi_flash_chip_info,
 379                 .mode = SPI_MODE_3,
 380         },
 381 #endif
 382
 383 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 384         {
 385                 .modalias = "mmc_spi",
 386 /*
 387  * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
 388  * SPI buffer limitations
 389  */
 390                 .max_speed_hz = 10000000,
 391                                         /* max spi clock (SCK) speed in HZ */
 392                 .bus_num = 0,
 393                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
 394                 .controller_data = &mmc_spi_chip_info,
 395                 .mode = SPI_MODE_0,
 396         },
 397 #endif
 398 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
 399         || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 400         {
 401                 .modalias = "ad7879",
 402                 .platform_data = &bfin_ad7879_ts_info,
 403                 .irq = IRQ_PH14,
 404                 .max_speed_hz = 5000000,
 405                                         /* max spi clock (SCK) speed in HZ */
 406                 .bus_num = 0,
 407                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
 408                 .mode = SPI_CPHA | SPI_CPOL,
 409         },
 410 #endif
 411 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 412         {
 413                 .modalias = "spidev",
 414                 .max_speed_hz = 10000000,
 415                 /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
 416                 .bus_num = 0,
 417                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
 418                 .mode = SPI_CPHA | SPI_CPOL,
 419         },
 420 #endif
 421 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 422         {
 423                 .modalias = "bfin-lq035q1-spi",
 424                 .max_speed_hz = 20000000,
 425                 .bus_num = 0,
 426                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
 427                 .mode = SPI_CPHA | SPI_CPOL,
 428         },
 429 #endif
 430 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 431         {
 432                 .modalias = "mcp23s08",
 433                 .platform_data = &bfin_mcp23s08_sys_gpio_info,
 434                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 435                 .bus_num = 0,
 436                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
 437                 .mode = SPI_CPHA | SPI_CPOL,
 438         },
 439         {
 440                 .modalias = "mcp23s08",
 441                 .platform_data = &bfin_mcp23s08_usr_gpio_info,
 442                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 443                 .bus_num = 0,
 444                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
 445                 .mode = SPI_CPHA | SPI_CPOL,
 446         },
 447 #endif
 448 };
 449
 450 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 451 /* SPI controller data */
 452 static struct bfin5xx_spi_master bfin_spi0_info = {
 453         .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
 454         /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
 455         .enable_dma = 1,  /* master has the ability to do dma transfer */
 456         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 457 };
 458
 459 /* SPI (0) */
 460 static struct resource bfin_spi0_resource[] = {
 461         [0] = {
 462                 .start = SPI0_REGBASE,
 463                 .end   = SPI0_REGBASE + 0xFF,
 464                 .flags = IORESOURCE_MEM,
 465                 },
 466         [1] = {
 467                 .start = CH_SPI,
 468                 .end   = CH_SPI,
 469                 .flags = IORESOURCE_DMA,
 470         },
 471         [2] = {
 472                 .start = IRQ_SPI,
 473                 .end   = IRQ_SPI,
 474                 .flags = IORESOURCE_IRQ,
 475         },
 476 };
 477
 478 static struct platform_device bfin_spi0_device = {
 479         .name = "bfin-spi",
 480         .id = 0, /* Bus number */
 481         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 482         .resource = bfin_spi0_resource,
 483         .dev = {
 484                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 485         },
 486 };
 487 #endif  /* spi master and devices */
 488
 489 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 490 #ifdef CONFIG_SERIAL_BFIN_UART0
 491 static struct resource bfin_uart0_resources[] = {
 492         {
 493                 .start = UART0_THR,
 494                 .end = UART0_GCTL+2,
 495                 .flags = IORESOURCE_MEM,
 496         },
 497         {
 498                 .start = IRQ_UART0_RX,
 499                 .end = IRQ_UART0_RX+1,
 500                 .flags = IORESOURCE_IRQ,
 501         },
 502         {
 503                 .start = IRQ_UART0_ERROR,
 504                 .end = IRQ_UART0_ERROR,
 505                 .flags = IORESOURCE_IRQ,
 506         },
 507         {
 508                 .start = CH_UART0_TX,
 509                 .end = CH_UART0_TX,
 510                 .flags = IORESOURCE_DMA,
 511         },
 512         {
 513                 .start = CH_UART0_RX,
 514                 .end = CH_UART0_RX,
 515                 .flags = IORESOURCE_DMA,
 516         },
 517 };
 518
 519 static unsigned short bfin_uart0_peripherals[] = {
 520         P_UART0_TX, P_UART0_RX, 0
 521 };
 522
 523 static struct platform_device bfin_uart0_device = {
 524         .name = "bfin-uart",
 525         .id = 0,
 526         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 527         .resource = bfin_uart0_resources,
 528         .dev = {
 529                 .platform_data = &bfin_uart0_peripherals,
 530                                         /* Passed to driver */
 531         },
 532 };
 533 #endif
 534 #ifdef CONFIG_SERIAL_BFIN_UART1
 535 static struct resource bfin_uart1_resources[] = {
 536         {
 537                 .start = UART1_THR,
 538                 .end = UART1_GCTL+2,
 539                 .flags = IORESOURCE_MEM,
 540         },
 541         {
 542                 .start = IRQ_UART1_RX,
 543                 .end = IRQ_UART1_RX+1,
 544                 .flags = IORESOURCE_IRQ,
 545         },
 546         {
 547                 .start = IRQ_UART1_ERROR,
 548                 .end = IRQ_UART1_ERROR,
 549                 .flags = IORESOURCE_IRQ,
 550         },
 551         {
 552                 .start = CH_UART1_TX,
 553                 .end = CH_UART1_TX,
 554                 .flags = IORESOURCE_DMA,
 555         },
 556         {
 557                 .start = CH_UART1_RX,
 558                 .end = CH_UART1_RX,
 559                 .flags = IORESOURCE_DMA,
 560         },
 561 #ifdef CONFIG_BFIN_UART1_CTSRTS
 562         {       /* CTS pin */
 563                 .start = GPIO_PF9,
 564                 .end = GPIO_PF9,
 565                 .flags = IORESOURCE_IO,
 566         },
 567         {       /* RTS pin */
 568                 .start = GPIO_PF10,
 569                 .end = GPIO_PF10,
 570                 .flags = IORESOURCE_IO,
 571         },
 572 #endif
 573 };
 574
 575 static unsigned short bfin_uart1_peripherals[] = {
 576         P_UART1_TX, P_UART1_RX, 0
 577 };
 578
 579 static struct platform_device bfin_uart1_device = {
 580         .name = "bfin-uart",
 581         .id = 1,
 582         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 583         .resource = bfin_uart1_resources,
 584         .dev = {
 585                 .platform_data = &bfin_uart1_peripherals,
 586                                                 /* Passed to driver */
 587         },
 588 };
 589 #endif
 590 #endif
 591
 592 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 593 #ifdef CONFIG_BFIN_SIR0
 594 static struct resource bfin_sir0_resources[] = {
 595         {
 596                 .start = 0xFFC00400,
 597                 .end = 0xFFC004FF,
 598                 .flags = IORESOURCE_MEM,
 599         },
 600         {
 601                 .start = IRQ_UART0_RX,
 602                 .end = IRQ_UART0_RX+1,
 603                 .flags = IORESOURCE_IRQ,
 604         },
 605         {
 606                 .start = CH_UART0_RX,
 607                 .end = CH_UART0_RX+1,
 608                 .flags = IORESOURCE_DMA,
 609         },
 610 };
 611
 612 static struct platform_device bfin_sir0_device = {
 613         .name = "bfin_sir",
 614         .id = 0,
 615         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 616         .resource = bfin_sir0_resources,
 617 };
 618 #endif
 619 #ifdef CONFIG_BFIN_SIR1
 620 static struct resource bfin_sir1_resources[] = {
 621         {
 622                 .start = 0xFFC02000,
 623                 .end = 0xFFC020FF,
 624                 .flags = IORESOURCE_MEM,
 625         },
 626         {
 627                 .start = IRQ_UART1_RX,
 628                 .end = IRQ_UART1_RX+1,
 629                 .flags = IORESOURCE_IRQ,
 630         },
 631         {
 632                 .start = CH_UART1_RX,
 633                 .end = CH_UART1_RX+1,
 634                 .flags = IORESOURCE_DMA,
 635         },
 636 };
 637
 638 static struct platform_device bfin_sir1_device = {
 639         .name = "bfin_sir",
 640         .id = 1,
 641         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 642         .resource = bfin_sir1_resources,
 643 };
 644 #endif
 645 #endif
 646
 647 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 648 static struct resource bfin_twi0_resource[] = {
 649         [0] = {
 650                 .start = TWI0_REGBASE,
 651                 .end   = TWI0_REGBASE,
 652                 .flags = IORESOURCE_MEM,
 653         },
 654         [1] = {
 655                 .start = IRQ_TWI,
 656                 .end   = IRQ_TWI,
 657                 .flags = IORESOURCE_IRQ,
 658         },
 659 };
 660
 661 static struct platform_device i2c_bfin_twi_device = {
 662         .name = "i2c-bfin-twi",
 663         .id = 0,
 664         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 665         .resource = bfin_twi0_resource,
 666 };
 667 #endif
 668
 669 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 670 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 671         {
 672                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 673         },
 674 #endif
 675
 676 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 677         {
 678                 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
 679         },
 680 #endif
 681 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
 682         || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
 683         {
 684                 I2C_BOARD_INFO("ad7879", 0x2C),
 685                 .irq = IRQ_PH14,
 686                 .platform_data = (void *)&bfin_ad7879_ts_info,
 687         },
 688 #endif
 689 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 690         {
 691                 I2C_BOARD_INFO("ssm2602", 0x1b),
 692         },
 693 #endif
 694         {
 695                 I2C_BOARD_INFO("adm1192", 0x2e),
 696         },
 697
 698         {
 699                 I2C_BOARD_INFO("ltc3576", 0x09),
 700         },
 701 #if defined(CONFIG_INPUT_ADXL34X_I2C) \
 702         || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
 703         {
 704                 I2C_BOARD_INFO("adxl34x", 0x53),
 705                 .irq = IRQ_PH13,
 706                 .platform_data = (void *)&adxl345_info,
 707         },
 708 #endif
 709 };
 710
 711 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 712         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 713 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 714 static struct resource bfin_sport0_uart_resources[] = {
 715         {
 716                 .start = SPORT0_TCR1,
 717                 .end = SPORT0_MRCS3+4,
 718                 .flags = IORESOURCE_MEM,
 719         },
 720         {
 721                 .start = IRQ_SPORT0_RX,
 722                 .end = IRQ_SPORT0_RX+1,
 723                 .flags = IORESOURCE_IRQ,
 724         },
 725         {
 726                 .start = IRQ_SPORT0_ERROR,
 727                 .end = IRQ_SPORT0_ERROR,
 728                 .flags = IORESOURCE_IRQ,
 729         },
 730 };
 731
 732 static unsigned short bfin_sport0_peripherals[] = {
 733         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 734         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 735 };
 736
 737 static struct platform_device bfin_sport0_uart_device = {
 738         .name = "bfin-sport-uart",
 739         .id = 0,
 740         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 741         .resource = bfin_sport0_uart_resources,
 742         .dev = {
 743                 .platform_data = &bfin_sport0_peripherals,
 744                 /* Passed to driver */
 745         },
 746 };
 747 #endif
 748 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 749 static struct resource bfin_sport1_uart_resources[] = {
 750         {
 751                 .start = SPORT1_TCR1,
 752                 .end = SPORT1_MRCS3+4,
 753                 .flags = IORESOURCE_MEM,
 754         },
 755         {
 756                 .start = IRQ_SPORT1_RX,
 757                 .end = IRQ_SPORT1_RX+1,
 758                 .flags = IORESOURCE_IRQ,
 759         },
 760         {
 761                 .start = IRQ_SPORT1_ERROR,
 762                 .end = IRQ_SPORT1_ERROR,
 763                 .flags = IORESOURCE_IRQ,
 764         },
 765 };
 766
 767 static unsigned short bfin_sport1_peripherals[] = {
 768         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 769         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 770 };
 771
 772 static struct platform_device bfin_sport1_uart_device = {
 773         .name = "bfin-sport-uart",
 774         .id = 1,
 775         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 776         .resource = bfin_sport1_uart_resources,
 777         .dev = {
 778                 .platform_data = &bfin_sport1_peripherals,
 779                 /* Passed to driver */
 780         },
 781 };
 782 #endif
 783 #endif
 784
 785 static const unsigned int cclk_vlev_datasheet[] = {
 786         VRPAIR(VLEV_100, 400000000),
 787         VRPAIR(VLEV_105, 426000000),
 788         VRPAIR(VLEV_110, 500000000),
 789         VRPAIR(VLEV_115, 533000000),
 790         VRPAIR(VLEV_120, 600000000),
 791 };
 792
 793 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 794         .tuple_tab = cclk_vlev_datasheet,
 795         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 796         .vr_settling_time = 25 /* us */,
 797 };
 798
 799 static struct platform_device bfin_dpmc = {
 800         .name = "bfin dpmc",
 801         .dev = {
 802                 .platform_data = &bfin_dmpc_vreg_data,
 803         },
 804 };
 805
 806 static struct platform_device *tll6527m_devices[] __initdata = {
 807
 808         &bfin_dpmc,
 809
 810 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 811         &rtc_device,
 812 #endif
 813
 814 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 815         &musb_device,
 816 #endif
 817
 818 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 819         &bfin_mii_bus,
 820         &bfin_mac_device,
 821 #endif
 822
 823 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 824         &bfin_spi0_device,
 825 #endif
 826
 827 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 828         &bfin_lq035q1_device,
 829 #endif
 830
 831 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 832 #ifdef CONFIG_SERIAL_BFIN_UART0
 833         &bfin_uart0_device,
 834 #endif
 835 #ifdef CONFIG_SERIAL_BFIN_UART1
 836         &bfin_uart1_device,
 837 #endif
 838 #endif
 839
 840 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 841 #ifdef CONFIG_BFIN_SIR0
 842         &bfin_sir0_device,
 843 #endif
 844 #ifdef CONFIG_BFIN_SIR1
 845         &bfin_sir1_device,
 846 #endif
 847 #endif
 848
 849 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 850         &i2c_bfin_twi_device,
 851 #endif
 852
 853 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 854         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 855 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 856         &bfin_sport0_uart_device,
 857 #endif
 858 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 859         &bfin_sport1_uart_device,
 860 #endif
 861 #endif
 862
 863 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 864         &tll6527m_flash_device,
 865 #endif
 866
 867 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 868         &bfin_i2s,
 869 #endif
 870
 871 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 872         &spi_decoded_gpio,
 873 #endif
 874 };
 875
 876 static int __init tll6527m_init(void)
 877 {
 878         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 879         i2c_register_board_info(0, bfin_i2c_board_info,
 880                                 ARRAY_SIZE(bfin_i2c_board_info));
 881         platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
 882         spi_register_board_info(bfin_spi_board_info,
 883                                 ARRAY_SIZE(bfin_spi_board_info));
 884         return 0;
 885 }
 886
 887 arch_initcall(tll6527m_init);
 888
 889 static struct platform_device *tll6527m_early_devices[] __initdata = {
 890 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 891 #ifdef CONFIG_SERIAL_BFIN_UART0
 892         &bfin_uart0_device,
 893 #endif
 894 #ifdef CONFIG_SERIAL_BFIN_UART1
 895         &bfin_uart1_device,
 896 #endif
 897 #endif
 898
 899 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 900 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 901         &bfin_sport0_uart_device,
 902 #endif
 903 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 904         &bfin_sport1_uart_device,
 905 #endif
 906 #endif
 907 };
 908
 909 void __init native_machine_early_platform_add_devices(void)
 910 {
 911         printk(KERN_INFO "register early platform devices\n");
 912         early_platform_add_devices(tll6527m_early_devices,
 913                 ARRAY_SIZE(tll6527m_early_devices));
 914 }
 915
 916 void native_machine_restart(char *cmd)
 917 {
 918         /* workaround reboot hang when booting from SPI */
 919         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 920                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 921 }
 922
 923 void bfin_get_ether_addr(char *addr)
 924 {
 925         /* the MAC is stored in OTP memory page 0xDF */
 926         u32 ret;
 927         u64 otp_mac;
 928         u32 (*otp_read)(u32 page, u32 flags,
 929                         u64 *page_content) = (void *)0xEF00001A;
 930
 931         ret = otp_read(0xDF, 0x00, &otp_mac);
 932         if (!(ret & 0x1)) {
 933                 char *otp_mac_p = (char *)&otp_mac;
 934                 for (ret = 0; ret < 6; ++ret)
 935                         addr[ret] = otp_mac_p[5 - ret];
 936         }
 937 }
 938 EXPORT_SYMBOL(bfin_get_ether_addr);