arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49         },
  50         [2] = { /* DMA IRQ */
  51                 .start  = IRQ_USB_DMA,
  52                 .end    = IRQ_USB_DMA,
  53                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54         },
  55 };
  56
  57 static struct musb_hdrc_config musb_config = {
  58         .multipoint     = 0,
  59         .dyn_fifo       = 0,
  60         .soft_con       = 1,
  61         .dma            = 1,
  62         .num_eps        = 8,
  63         .dma_channels   = 8,
  64         .gpio_vrsel     = GPIO_PG13,
  65         /* Some custom boards need to be active low, just set it to "0"
  66          * if it is the case.
  67          */
  68         .gpio_vrsel_active      = 1,
  69 };
  70
  71 static struct musb_hdrc_platform_data musb_plat = {
  72 #if defined(CONFIG_USB_MUSB_OTG)
  73         .mode           = MUSB_OTG,
  74 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  75         .mode           = MUSB_HOST,
  76 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  77         .mode           = MUSB_PERIPHERAL,
  78 #endif
  79         .config         = &musb_config,
  80 };
  81
  82 static u64 musb_dmamask = ~(u32)0;
  83
  84 static struct platform_device musb_device = {
  85         .name           = "musb_hdrc",
  86         .id             = 0,
  87         .dev = {
  88                 .dma_mask               = &musb_dmamask,
  89                 .coherent_dma_mask      = 0xffffffff,
  90                 .platform_data          = &musb_plat,
  91         },
  92         .num_resources  = ARRAY_SIZE(musb_resources),
  93         .resource       = musb_resources,
  94 };
  95 #endif
  96
  97 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  98 static struct mtd_partition ezbrd_partitions[] = {
  99         {
 100                 .name       = "bootloader(nor)",
 101                 .size       = 0x40000,
 102                 .offset     = 0,
 103         }, {
 104                 .name       = "linux kernel(nor)",
 105                 .size       = 0x1C0000,
 106                 .offset     = MTDPART_OFS_APPEND,
 107         }, {
 108                 .name       = "file system(nor)",
 109                 .size       = MTDPART_SIZ_FULL,
 110                 .offset     = MTDPART_OFS_APPEND,
 111         }
 112 };
 113
 114 static struct physmap_flash_data ezbrd_flash_data = {
 115         .width      = 2,
 116         .parts      = ezbrd_partitions,
 117         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 118 };
 119
 120 static struct resource ezbrd_flash_resource = {
 121         .start = 0x20000000,
 122         .end   = 0x203fffff,
 123         .flags = IORESOURCE_MEM,
 124 };
 125
 126 static struct platform_device ezbrd_flash_device = {
 127         .name          = "physmap-flash",
 128         .id            = 0,
 129         .dev = {
 130                 .platform_data = &ezbrd_flash_data,
 131         },
 132         .num_resources = 1,
 133         .resource      = &ezbrd_flash_resource,
 134 };
 135 #endif
 136
 137 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 138 static struct mtd_partition partition_info[] = {
 139         {
 140                 .name = "bootloader(nand)",
 141                 .offset = 0,
 142                 .size = 0x40000,
 143         }, {
 144                 .name = "linux kernel(nand)",
 145                 .offset = MTDPART_OFS_APPEND,
 146                 .size = 4 * 1024 * 1024,
 147         },
 148         {
 149                 .name = "file system(nand)",
 150                 .offset = MTDPART_OFS_APPEND,
 151                 .size = MTDPART_SIZ_FULL,
 152         },
 153 };
 154
 155 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 156         .data_width = NFC_NWIDTH_8,
 157         .partitions = partition_info,
 158         .nr_partitions = ARRAY_SIZE(partition_info),
 159         .rd_dly = 3,
 160         .wr_dly = 3,
 161 };
 162
 163 static struct resource bf5xx_nand_resources[] = {
 164         {
 165                 .start = NFC_CTL,
 166                 .end = NFC_DATA_RD + 2,
 167                 .flags = IORESOURCE_MEM,
 168         },
 169         {
 170                 .start = CH_NFC,
 171                 .end = CH_NFC,
 172                 .flags = IORESOURCE_IRQ,
 173         },
 174 };
 175
 176 static struct platform_device bf5xx_nand_device = {
 177         .name = "bf5xx-nand",
 178         .id = 0,
 179         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 180         .resource = bf5xx_nand_resources,
 181         .dev = {
 182                 .platform_data = &bf5xx_nand_platform,
 183         },
 184 };
 185 #endif
 186
 187 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 188 static struct platform_device rtc_device = {
 189         .name = "rtc-bfin",
 190         .id   = -1,
 191 };
 192 #endif
 193
 194
 195 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 196 static struct platform_device bfin_mii_bus = {
 197         .name = "bfin_mii_bus",
 198 };
 199
 200 static struct platform_device bfin_mac_device = {
 201         .name = "bfin_mac",
 202         .dev.platform_data = &bfin_mii_bus,
 203 };
 204 #endif
 205
 206 #if defined(CONFIG_MTD_M25P80) \
 207         || defined(CONFIG_MTD_M25P80_MODULE)
 208 static struct mtd_partition bfin_spi_flash_partitions[] = {
 209         {
 210                 .name = "bootloader(spi)",
 211                 .size = 0x00040000,
 212                 .offset = 0,
 213                 .mask_flags = MTD_CAP_ROM
 214         }, {
 215                 .name = "linux kernel(spi)",
 216                 .size = MTDPART_SIZ_FULL,
 217                 .offset = MTDPART_OFS_APPEND,
 218         }
 219 };
 220
 221 static struct flash_platform_data bfin_spi_flash_data = {
 222         .name = "m25p80",
 223         .parts = bfin_spi_flash_partitions,
 224         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 225         .type = "sst25wf040",
 226 };
 227
 228 /* SPI flash chip (sst25wf040) */
 229 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 230         .enable_dma = 0,         /* use dma transfer with this chip*/
 231         .bits_per_word = 8,
 232 };
 233 #endif
 234
 235 #if defined(CONFIG_BFIN_SPI_ADC) \
 236         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 237 /* SPI ADC chip */
 238 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 239         .enable_dma = 1,         /* use dma transfer with this chip*/
 240         .bits_per_word = 16,
 241 };
 242 #endif
 243
 244 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 245 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 246         .enable_dma = 0,
 247         .bits_per_word = 8,
 248 };
 249 #endif
 250
 251 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 252 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 253         .enable_dma = 0,
 254         .bits_per_word = 16,
 255 };
 256
 257 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 258         .model                  = 7877,
 259         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 260         .x_plate_ohms           = 419,
 261         .y_plate_ohms           = 486,
 262         .pressure_max           = 1000,
 263         .pressure_min           = 0,
 264         .stopacq_polarity       = 1,
 265         .first_conversion_delay = 3,
 266         .acquisition_time       = 1,
 267         .averaging              = 1,
 268         .pen_down_acc_interval  = 1,
 269 };
 270 #endif
 271
 272 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 273 #include <linux/spi/ad7879.h>
 274 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 275         .model                  = 7879, /* Model = AD7879 */
 276         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 277         .pressure_max           = 10000,
 278         .pressure_min           = 0,
 279         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 280         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 281         .median                 = 2,    /* do 8 measurements */
 282         .averaging              = 1,    /* take the average of 4 middle samples */
 283         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 284         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 285         .gpio_base              = -1,   /* Dynamic allocation */
 286 };
 287 #endif
 288
 289 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 290 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 291         .enable_dma = 0,
 292         .bits_per_word = 16,
 293 };
 294 #endif
 295
 296 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 297          && defined(CONFIG_SND_SOC_WM8731_SPI)
 298 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 299         .enable_dma = 0,
 300         .bits_per_word = 16,
 301 };
 302 #endif
 303
 304 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 305 static struct bfin5xx_spi_chip spidev_chip_info = {
 306         .enable_dma = 0,
 307         .bits_per_word = 8,
 308 };
 309 #endif
 310
 311 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 312 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 313         .enable_dma = 0,
 314         .bits_per_word = 8,
 315 };
 316 #endif
 317
 318 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 319 #if defined(CONFIG_MTD_M25P80) \
 320         || defined(CONFIG_MTD_M25P80_MODULE)
 321         {
 322                 /* the modalias must be the same as spi device driver name */
 323                 .modalias = "m25p80", /* Name of spi_driver for this device */
 324                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 325                 .bus_num = 0, /* Framework bus number */
 326                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 327                 .platform_data = &bfin_spi_flash_data,
 328                 .controller_data = &spi_flash_chip_info,
 329                 .mode = SPI_MODE_3,
 330         },
 331 #endif
 332
 333 #if defined(CONFIG_BFIN_SPI_ADC) \
 334         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 335         {
 336                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 337                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 338                 .bus_num = 0, /* Framework bus number */
 339                 .chip_select = 1, /* Framework chip select. */
 340                 .platform_data = NULL, /* No spi_driver specific config */
 341                 .controller_data = &spi_adc_chip_info,
 342         },
 343 #endif
 344
 345 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 346         {
 347                 .modalias = "mmc_spi",
 348                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 349                 .bus_num = 0,
 350                 .chip_select = 5,
 351                 .controller_data = &mmc_spi_chip_info,
 352                 .mode = SPI_MODE_3,
 353         },
 354 #endif
 355 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 356         {
 357                 .modalias               = "ad7877",
 358                 .platform_data          = &bfin_ad7877_ts_info,
 359                 .irq                    = IRQ_PF8,
 360                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 361                 .bus_num        = 0,
 362                 .chip_select  = 2,
 363                 .controller_data = &spi_ad7877_chip_info,
 364         },
 365 #endif
 366 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 367         {
 368                 .modalias = "ad7879",
 369                 .platform_data = &bfin_ad7879_ts_info,
 370                 .irq = IRQ_PG0,
 371                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 372                 .bus_num = 0,
 373                 .chip_select = 5,
 374                 .controller_data = &spi_ad7879_chip_info,
 375                 .mode = SPI_CPHA | SPI_CPOL,
 376         },
 377 #endif
 378 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 379          && defined(CONFIG_SND_SOC_WM8731_SPI)
 380         {
 381                 .modalias       = "wm8731",
 382                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 383                 .bus_num        = 0,
 384                 .chip_select    = 5,
 385                 .controller_data = &spi_wm8731_chip_info,
 386                 .mode = SPI_MODE_0,
 387         },
 388 #endif
 389 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 390         {
 391                 .modalias = "spidev",
 392                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 393                 .bus_num = 0,
 394                 .chip_select = 1,
 395                 .controller_data = &spidev_chip_info,
 396         },
 397 #endif
 398 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 399         {
 400                 .modalias = "bfin-lq035q1-spi",
 401                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 402                 .bus_num = 0,
 403                 .chip_select = 1,
 404                 .controller_data = &lq035q1_spi_chip_info,
 405                 .mode = SPI_CPHA | SPI_CPOL,
 406         },
 407 #endif
 408 };
 409
 410 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 411 /* SPI controller data */
 412 static struct bfin5xx_spi_master bfin_spi0_info = {
 413         .num_chipselect = 8,
 414         .enable_dma = 1,  /* master has the ability to do dma transfer */
 415         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 416 };
 417
 418 /* SPI (0) */
 419 static struct resource bfin_spi0_resource[] = {
 420         [0] = {
 421                 .start = SPI0_REGBASE,
 422                 .end   = SPI0_REGBASE + 0xFF,
 423                 .flags = IORESOURCE_MEM,
 424                 },
 425         [1] = {
 426                 .start = CH_SPI,
 427                 .end   = CH_SPI,
 428                 .flags = IORESOURCE_DMA,
 429         },
 430         [2] = {
 431                 .start = IRQ_SPI,
 432                 .end   = IRQ_SPI,
 433                 .flags = IORESOURCE_IRQ,
 434         },
 435 };
 436
 437 static struct platform_device bfin_spi0_device = {
 438         .name = "bfin-spi",
 439         .id = 0, /* Bus number */
 440         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 441         .resource = bfin_spi0_resource,
 442         .dev = {
 443                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 444         },
 445 };
 446 #endif  /* spi master and devices */
 447
 448 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 449 #ifdef CONFIG_SERIAL_BFIN_UART0
 450 static struct resource bfin_uart0_resources[] = {
 451         {
 452                 .start = UART0_THR,
 453                 .end = UART0_GCTL+2,
 454                 .flags = IORESOURCE_MEM,
 455         },
 456         {
 457                 .start = IRQ_UART0_RX,
 458                 .end = IRQ_UART0_RX+1,
 459                 .flags = IORESOURCE_IRQ,
 460         },
 461         {
 462                 .start = IRQ_UART0_ERROR,
 463                 .end = IRQ_UART0_ERROR,
 464                 .flags = IORESOURCE_IRQ,
 465         },
 466         {
 467                 .start = CH_UART0_TX,
 468                 .end = CH_UART0_TX,
 469                 .flags = IORESOURCE_DMA,
 470         },
 471         {
 472                 .start = CH_UART0_RX,
 473                 .end = CH_UART0_RX,
 474                 .flags = IORESOURCE_DMA,
 475         },
 476 };
 477
 478 unsigned short bfin_uart0_peripherals[] = {
 479         P_UART0_TX, P_UART0_RX, 0
 480 };
 481
 482 static struct platform_device bfin_uart0_device = {
 483         .name = "bfin-uart",
 484         .id = 0,
 485         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 486         .resource = bfin_uart0_resources,
 487         .dev = {
 488                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 489         },
 490 };
 491 #endif
 492 #ifdef CONFIG_SERIAL_BFIN_UART1
 493 static struct resource bfin_uart1_resources[] = {
 494         {
 495                 .start = UART1_THR,
 496                 .end = UART1_GCTL+2,
 497                 .flags = IORESOURCE_MEM,
 498         },
 499         {
 500                 .start = IRQ_UART1_RX,
 501                 .end = IRQ_UART1_RX+1,
 502                 .flags = IORESOURCE_IRQ,
 503         },
 504         {
 505                 .start = IRQ_UART1_ERROR,
 506                 .end = IRQ_UART1_ERROR,
 507                 .flags = IORESOURCE_IRQ,
 508         },
 509         {
 510                 .start = CH_UART1_TX,
 511                 .end = CH_UART1_TX,
 512                 .flags = IORESOURCE_DMA,
 513         },
 514         {
 515                 .start = CH_UART1_RX,
 516                 .end = CH_UART1_RX,
 517                 .flags = IORESOURCE_DMA,
 518         },
 519 #ifdef CONFIG_BFIN_UART1_CTSRTS
 520         {       /* CTS pin */
 521                 .start = GPIO_PG0,
 522                 .end = GPIO_PG0,
 523                 .flags = IORESOURCE_IO,
 524         },
 525         {       /* RTS pin */
 526                 .start = GPIO_PF10,
 527                 .end = GPIO_PF10,
 528                 .flags = IORESOURCE_IO,
 529         },
 530 #endif
 531 };
 532
 533 unsigned short bfin_uart1_peripherals[] = {
 534         P_UART1_TX, P_UART1_RX, 0
 535 };
 536
 537 static struct platform_device bfin_uart1_device = {
 538         .name = "bfin-uart",
 539         .id = 1,
 540         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 541         .resource = bfin_uart1_resources,
 542         .dev = {
 543                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 544         },
 545 };
 546 #endif
 547 #endif
 548
 549 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 550 #ifdef CONFIG_BFIN_SIR0
 551 static struct resource bfin_sir0_resources[] = {
 552         {
 553                 .start = 0xFFC00400,
 554                 .end = 0xFFC004FF,
 555                 .flags = IORESOURCE_MEM,
 556         },
 557         {
 558                 .start = IRQ_UART0_RX,
 559                 .end = IRQ_UART0_RX+1,
 560                 .flags = IORESOURCE_IRQ,
 561         },
 562         {
 563                 .start = CH_UART0_RX,
 564                 .end = CH_UART0_RX+1,
 565                 .flags = IORESOURCE_DMA,
 566         },
 567 };
 568
 569 static struct platform_device bfin_sir0_device = {
 570         .name = "bfin_sir",
 571         .id = 0,
 572         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 573         .resource = bfin_sir0_resources,
 574 };
 575 #endif
 576 #ifdef CONFIG_BFIN_SIR1
 577 static struct resource bfin_sir1_resources[] = {
 578         {
 579                 .start = 0xFFC02000,
 580                 .end = 0xFFC020FF,
 581                 .flags = IORESOURCE_MEM,
 582         },
 583         {
 584                 .start = IRQ_UART1_RX,
 585                 .end = IRQ_UART1_RX+1,
 586                 .flags = IORESOURCE_IRQ,
 587         },
 588         {
 589                 .start = CH_UART1_RX,
 590                 .end = CH_UART1_RX+1,
 591                 .flags = IORESOURCE_DMA,
 592         },
 593 };
 594
 595 static struct platform_device bfin_sir1_device = {
 596         .name = "bfin_sir",
 597         .id = 1,
 598         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 599         .resource = bfin_sir1_resources,
 600 };
 601 #endif
 602 #endif
 603
 604 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 605 static struct resource bfin_twi0_resource[] = {
 606         [0] = {
 607                 .start = TWI0_REGBASE,
 608                 .end   = TWI0_REGBASE,
 609                 .flags = IORESOURCE_MEM,
 610         },
 611         [1] = {
 612                 .start = IRQ_TWI,
 613                 .end   = IRQ_TWI,
 614                 .flags = IORESOURCE_IRQ,
 615         },
 616 };
 617
 618 static struct platform_device i2c_bfin_twi_device = {
 619         .name = "i2c-bfin-twi",
 620         .id = 0,
 621         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 622         .resource = bfin_twi0_resource,
 623 };
 624 #endif
 625
 626 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 627 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 628         {
 629                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 630         },
 631 #endif
 632 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 633         {
 634                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 635                 .irq = IRQ_PF8,
 636         },
 637 #endif
 638 };
 639
 640 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 641 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 642 static struct resource bfin_sport0_uart_resources[] = {
 643         {
 644                 .start = SPORT0_TCR1,
 645                 .end = SPORT0_MRCS3+4,
 646                 .flags = IORESOURCE_MEM,
 647         },
 648         {
 649                 .start = IRQ_SPORT0_RX,
 650                 .end = IRQ_SPORT0_RX+1,
 651                 .flags = IORESOURCE_IRQ,
 652         },
 653         {
 654                 .start = IRQ_SPORT0_ERROR,
 655                 .end = IRQ_SPORT0_ERROR,
 656                 .flags = IORESOURCE_IRQ,
 657         },
 658 };
 659
 660 unsigned short bfin_sport0_peripherals[] = {
 661         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 662         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 663 };
 664
 665 static struct platform_device bfin_sport0_uart_device = {
 666         .name = "bfin-sport-uart",
 667         .id = 0,
 668         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 669         .resource = bfin_sport0_uart_resources,
 670         .dev = {
 671                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 672         },
 673 };
 674 #endif
 675 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 676 static struct resource bfin_sport1_uart_resources[] = {
 677         {
 678                 .start = SPORT1_TCR1,
 679                 .end = SPORT1_MRCS3+4,
 680                 .flags = IORESOURCE_MEM,
 681         },
 682         {
 683                 .start = IRQ_SPORT1_RX,
 684                 .end = IRQ_SPORT1_RX+1,
 685                 .flags = IORESOURCE_IRQ,
 686         },
 687         {
 688                 .start = IRQ_SPORT1_ERROR,
 689                 .end = IRQ_SPORT1_ERROR,
 690                 .flags = IORESOURCE_IRQ,
 691         },
 692 };
 693
 694 unsigned short bfin_sport1_peripherals[] = {
 695         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 696         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 697 };
 698
 699 static struct platform_device bfin_sport1_uart_device = {
 700         .name = "bfin-sport-uart",
 701         .id = 1,
 702         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 703         .resource = bfin_sport1_uart_resources,
 704         .dev = {
 705                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 706         },
 707 };
 708 #endif
 709 #endif
 710
 711 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 712 #include <linux/input.h>
 713 #include <linux/gpio_keys.h>
 714
 715 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 716         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 717         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 718 };
 719
 720 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 721         .buttons        = bfin_gpio_keys_table,
 722         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 723 };
 724
 725 static struct platform_device bfin_device_gpiokeys = {
 726         .name      = "gpio-keys",
 727         .dev = {
 728                 .platform_data = &bfin_gpio_keys_data,
 729         },
 730 };
 731 #endif
 732
 733 static const unsigned int cclk_vlev_datasheet[] =
 734 {
 735         VRPAIR(VLEV_100, 400000000),
 736         VRPAIR(VLEV_105, 426000000),
 737         VRPAIR(VLEV_110, 500000000),
 738         VRPAIR(VLEV_115, 533000000),
 739         VRPAIR(VLEV_120, 600000000),
 740 };
 741
 742 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 743         .tuple_tab = cclk_vlev_datasheet,
 744         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 745         .vr_settling_time = 25 /* us */,
 746 };
 747
 748 static struct platform_device bfin_dpmc = {
 749         .name = "bfin dpmc",
 750         .dev = {
 751                 .platform_data = &bfin_dmpc_vreg_data,
 752         },
 753 };
 754
 755 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 756 #include <asm/bfin-lq035q1.h>
 757
 758 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 759         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 760         .ppi_mode = USE_RGB565_16_BIT_PPI,
 761         .use_bl = 1,
 762         .gpio_bl = GPIO_PG12,
 763 };
 764
 765 static struct resource bfin_lq035q1_resources[] = {
 766         {
 767                 .start = IRQ_PPI_ERROR,
 768                 .end = IRQ_PPI_ERROR,
 769                 .flags = IORESOURCE_IRQ,
 770         },
 771 };
 772
 773 static struct platform_device bfin_lq035q1_device = {
 774         .name           = "bfin-lq035q1",
 775         .id             = -1,
 776         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 777         .resource       = bfin_lq035q1_resources,
 778         .dev            = {
 779                 .platform_data = &bfin_lq035q1_data,
 780         },
 781 };
 782 #endif
 783
 784 static struct platform_device *stamp_devices[] __initdata = {
 785
 786         &bfin_dpmc,
 787
 788 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 789         &bf5xx_nand_device,
 790 #endif
 791
 792 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 793         &rtc_device,
 794 #endif
 795
 796 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 797         &musb_device,
 798 #endif
 799
 800 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 801         &bfin_mii_bus,
 802         &bfin_mac_device,
 803 #endif
 804
 805 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 806         &bfin_spi0_device,
 807 #endif
 808
 809 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 810 #ifdef CONFIG_SERIAL_BFIN_UART0
 811         &bfin_uart0_device,
 812 #endif
 813 #ifdef CONFIG_SERIAL_BFIN_UART1
 814         &bfin_uart1_device,
 815 #endif
 816 #endif
 817
 818 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 819         &bfin_lq035q1_device,
 820 #endif
 821
 822 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 823 #ifdef CONFIG_BFIN_SIR0
 824         &bfin_sir0_device,
 825 #endif
 826 #ifdef CONFIG_BFIN_SIR1
 827         &bfin_sir1_device,
 828 #endif
 829 #endif
 830
 831 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 832         &i2c_bfin_twi_device,
 833 #endif
 834
 835 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 836 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 837         &bfin_sport0_uart_device,
 838 #endif
 839 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 840         &bfin_sport1_uart_device,
 841 #endif
 842 #endif
 843
 844 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 845         &bfin_device_gpiokeys,
 846 #endif
 847
 848 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 849         &ezbrd_flash_device,
 850 #endif
 851 };
 852
 853 static int __init ezbrd_init(void)
 854 {
 855         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 856         i2c_register_board_info(0, bfin_i2c_board_info,
 857                                 ARRAY_SIZE(bfin_i2c_board_info));
 858         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 859         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 860         return 0;
 861 }
 862
 863 arch_initcall(ezbrd_init);
 864
 865 static struct platform_device *ezbrd_early_devices[] __initdata = {
 866 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 867 #ifdef CONFIG_SERIAL_BFIN_UART0
 868         &bfin_uart0_device,
 869 #endif
 870 #ifdef CONFIG_SERIAL_BFIN_UART1
 871         &bfin_uart1_device,
 872 #endif
 873 #endif
 874
 875 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 876 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 877         &bfin_sport0_uart_device,
 878 #endif
 879 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 880         &bfin_sport1_uart_device,
 881 #endif
 882 #endif
 883 };
 884
 885 void __init native_machine_early_platform_add_devices(void)
 886 {
 887         printk(KERN_INFO "register early platform devices\n");
 888         early_platform_add_devices(ezbrd_early_devices,
 889                 ARRAY_SIZE(ezbrd_early_devices));
 890 }
 891
 892 void native_machine_restart(char *cmd)
 893 {
 894         /* workaround reboot hang when booting from SPI */
 895         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 896                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 897 }
 898
 899 void bfin_get_ether_addr(char *addr)
 900 {
 901         /* the MAC is stored in OTP memory page 0xDF */
 902         u32 ret;
 903         u64 otp_mac;
 904         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 905
 906         ret = otp_read(0xDF, 0x00, &otp_mac);
 907         if (!(ret & 0x1)) {
 908                 char *otp_mac_p = (char *)&otp_mac;
 909                 for (ret = 0; ret < 6; ++ret)
 910                         addr[ret] = otp_mac_p[5 - ret];
 911         }
 912 }
 913 EXPORT_SYMBOL(bfin_get_ether_addr);