arch/blackfin/mach-bf527/boards/ad7160eval.c

   1 /*
   2  * Copyright 2004-20010 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/i2c.h>
  17 #include <linux/irq.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <linux/leds.h>
  21 #include <linux/input.h>
  22 #include <asm/dma.h>
  23 #include <asm/bfin5xx_spi.h>
  24 #include <asm/reboot.h>
  25 #include <asm/nand.h>
  26 #include <asm/portmux.h>
  27 #include <asm/dpmc.h>
  28
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  40 static struct resource musb_resources[] = {
  41         [0] = {
  42                 .start  = 0xffc03800,
  43                 .end    = 0xffc03cff,
  44                 .flags  = IORESOURCE_MEM,
  45         },
  46         [1] = { /* general IRQ */
  47                 .start  = IRQ_USB_INT0,
  48                 .end    = IRQ_USB_INT0,
  49                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  50         },
  51         [2] = { /* DMA IRQ */
  52                 .start  = IRQ_USB_DMA,
  53                 .end    = IRQ_USB_DMA,
  54                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  55         },
  56 };
  57
  58 static struct musb_hdrc_config musb_config = {
  59         .multipoint     = 0,
  60         .dyn_fifo       = 0,
  61         .soft_con       = 1,
  62         .dma            = 1,
  63         .num_eps        = 8,
  64         .dma_channels   = 8,
  65         .gpio_vrsel     = GPIO_PG13,
  66         /* Some custom boards need to be active low, just set it to "0"
  67          * if it is the case.
  68          */
  69         .gpio_vrsel_active      = 1,
  70         .clkin          = 24,           /* musb CLKIN in MHZ */
  71 };
  72
  73 static struct musb_hdrc_platform_data musb_plat = {
  74 #if defined(CONFIG_USB_MUSB_OTG)
  75         .mode           = MUSB_OTG,
  76 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  77         .mode           = MUSB_HOST,
  78 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  79         .mode           = MUSB_PERIPHERAL,
  80 #endif
  81         .config         = &musb_config,
  82 };
  83
  84 static u64 musb_dmamask = ~(u32)0;
  85
  86 static struct platform_device musb_device = {
  87         .name           = "musb-blackfin",
  88         .id             = 0,
  89         .dev = {
  90                 .dma_mask               = &musb_dmamask,
  91                 .coherent_dma_mask      = 0xffffffff,
  92                 .platform_data          = &musb_plat,
  93         },
  94         .num_resources  = ARRAY_SIZE(musb_resources),
  95         .resource       = musb_resources,
  96 };
  97 #endif
  98
  99 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 100 static struct resource bf52x_ra158z_resources[] = {
 101         {
 102                 .start = IRQ_PPI_ERROR,
 103                 .end = IRQ_PPI_ERROR,
 104                 .flags = IORESOURCE_IRQ,
 105         },
 106 };
 107
 108 static struct platform_device bf52x_ra158z_device = {
 109         .name           = "bfin-ra158z",
 110         .id             = -1,
 111         .num_resources  = ARRAY_SIZE(bf52x_ra158z_resources),
 112         .resource       = bf52x_ra158z_resources,
 113 };
 114 #endif
 115
 116 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 117 static struct mtd_partition ad7160eval_partitions[] = {
 118         {
 119                 .name       = "bootloader(nor)",
 120                 .size       = 0x40000,
 121                 .offset     = 0,
 122         }, {
 123                 .name       = "linux kernel(nor)",
 124                 .size       = 0x1C0000,
 125                 .offset     = MTDPART_OFS_APPEND,
 126         }, {
 127                 .name       = "file system(nor)",
 128                 .size       = MTDPART_SIZ_FULL,
 129                 .offset     = MTDPART_OFS_APPEND,
 130         }
 131 };
 132
 133 static struct physmap_flash_data ad7160eval_flash_data = {
 134         .width      = 2,
 135         .parts      = ad7160eval_partitions,
 136         .nr_parts   = ARRAY_SIZE(ad7160eval_partitions),
 137 };
 138
 139 static struct resource ad7160eval_flash_resource = {
 140         .start = 0x20000000,
 141         .end   = 0x203fffff,
 142         .flags = IORESOURCE_MEM,
 143 };
 144
 145 static struct platform_device ad7160eval_flash_device = {
 146         .name          = "physmap-flash",
 147         .id            = 0,
 148         .dev = {
 149                 .platform_data = &ad7160eval_flash_data,
 150         },
 151         .num_resources = 1,
 152         .resource      = &ad7160eval_flash_resource,
 153 };
 154 #endif
 155
 156 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 157 static struct mtd_partition partition_info[] = {
 158         {
 159                 .name = "linux kernel(nand)",
 160                 .offset = 0,
 161                 .size = 4 * 1024 * 1024,
 162         },
 163         {
 164                 .name = "file system(nand)",
 165                 .offset = MTDPART_OFS_APPEND,
 166                 .size = MTDPART_SIZ_FULL,
 167         },
 168 };
 169
 170 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 171         .data_width = NFC_NWIDTH_8,
 172         .partitions = partition_info,
 173         .nr_partitions = ARRAY_SIZE(partition_info),
 174         .rd_dly = 3,
 175         .wr_dly = 3,
 176 };
 177
 178 static struct resource bf5xx_nand_resources[] = {
 179         {
 180                 .start = NFC_CTL,
 181                 .end = NFC_DATA_RD + 2,
 182                 .flags = IORESOURCE_MEM,
 183         },
 184         {
 185                 .start = CH_NFC,
 186                 .end = CH_NFC,
 187                 .flags = IORESOURCE_IRQ,
 188         },
 189 };
 190
 191 static struct platform_device bf5xx_nand_device = {
 192         .name = "bf5xx-nand",
 193         .id = 0,
 194         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 195         .resource = bf5xx_nand_resources,
 196         .dev = {
 197                 .platform_data = &bf5xx_nand_platform,
 198         },
 199 };
 200 #endif
 201
 202 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 203 static struct platform_device rtc_device = {
 204         .name = "rtc-bfin",
 205         .id   = -1,
 206 };
 207 #endif
 208
 209 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 210 #include <linux/bfin_mac.h>
 211 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 212
 213 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 214         {
 215                 .addr = 1,
 216                 .irq = IRQ_MAC_PHYINT,
 217         },
 218 };
 219
 220 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 221         .phydev_number = 1,
 222         .phydev_data = bfin_phydev_data,
 223         .phy_mode = PHY_INTERFACE_MODE_RMII,
 224         .mac_peripherals = bfin_mac_peripherals,
 225 };
 226
 227 static struct platform_device bfin_mii_bus = {
 228         .name = "bfin_mii_bus",
 229         .dev = {
 230                 .platform_data = &bfin_mii_bus_data,
 231         }
 232 };
 233
 234 static struct platform_device bfin_mac_device = {
 235         .name = "bfin_mac",
 236         .dev = {
 237                 .platform_data = &bfin_mii_bus,
 238         }
 239 };
 240 #endif
 241
 242
 243 #if defined(CONFIG_MTD_M25P80) \
 244         || defined(CONFIG_MTD_M25P80_MODULE)
 245 static struct mtd_partition bfin_spi_flash_partitions[] = {
 246         {
 247                 .name = "bootloader(spi)",
 248                 .size = 0x00040000,
 249                 .offset = 0,
 250                 .mask_flags = MTD_CAP_ROM
 251         }, {
 252                 .name = "linux kernel(spi)",
 253                 .size = MTDPART_SIZ_FULL,
 254                 .offset = MTDPART_OFS_APPEND,
 255         }
 256 };
 257
 258 static struct flash_platform_data bfin_spi_flash_data = {
 259         .name = "m25p80",
 260         .parts = bfin_spi_flash_partitions,
 261         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 262         .type = "m25p16",
 263 };
 264
 265 /* SPI flash chip (m25p64) */
 266 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 267         .enable_dma = 0,         /* use dma transfer with this chip*/
 268 };
 269 #endif
 270
 271 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 272 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 273         .enable_dma = 0,
 274 };
 275 #endif
 276
 277 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 278 static struct platform_device bfin_i2s = {
 279         .name = "bfin-i2s",
 280         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 281         /* TODO: add platform data here */
 282 };
 283 #endif
 284
 285 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 286 static struct platform_device bfin_tdm = {
 287         .name = "bfin-tdm",
 288         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 289         /* TODO: add platform data here */
 290 };
 291 #endif
 292
 293 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 294 #if defined(CONFIG_MTD_M25P80) \
 295         || defined(CONFIG_MTD_M25P80_MODULE)
 296         {
 297                 /* the modalias must be the same as spi device driver name */
 298                 .modalias = "m25p80", /* Name of spi_driver for this device */
 299                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 300                 .bus_num = 0, /* Framework bus number */
 301                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 302                 .platform_data = &bfin_spi_flash_data,
 303                 .controller_data = &spi_flash_chip_info,
 304                 .mode = SPI_MODE_3,
 305         },
 306 #endif
 307 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
 308         || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 309         {
 310                 .modalias = "ad183x",
 311                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 312                 .bus_num = 0,
 313                 .chip_select = 4,
 314         },
 315 #endif
 316 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 317         {
 318                 .modalias = "mmc_spi",
 319                 .max_speed_hz = 30000000,     /* max spi clock (SCK) speed in HZ */
 320                 .bus_num = 0,
 321                 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
 322                 .controller_data = &mmc_spi_chip_info,
 323                 .mode = SPI_MODE_3,
 324         },
 325 #endif
 326 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 327         {
 328                 .modalias = "spidev",
 329                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 330                 .bus_num = 0,
 331                 .chip_select = 1,
 332         },
 333 #endif
 334 };
 335
 336 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 337 /* SPI controller data */
 338 static struct bfin5xx_spi_master bfin_spi0_info = {
 339         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
 340         .enable_dma = 1,  /* master has the ability to do dma transfer */
 341         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 342 };
 343
 344 /* SPI (0) */
 345 static struct resource bfin_spi0_resource[] = {
 346         [0] = {
 347                 .start = SPI0_REGBASE,
 348                 .end   = SPI0_REGBASE + 0xFF,
 349                 .flags = IORESOURCE_MEM,
 350                 },
 351         [1] = {
 352                 .start = CH_SPI,
 353                 .end   = CH_SPI,
 354                 .flags = IORESOURCE_DMA,
 355         },
 356         [2] = {
 357                 .start = IRQ_SPI,
 358                 .end   = IRQ_SPI,
 359                 .flags = IORESOURCE_IRQ,
 360         },
 361 };
 362
 363 static struct platform_device bfin_spi0_device = {
 364         .name = "bfin-spi",
 365         .id = 0, /* Bus number */
 366         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 367         .resource = bfin_spi0_resource,
 368         .dev = {
 369                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 370         },
 371 };
 372 #endif  /* spi master and devices */
 373
 374 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 375 #ifdef CONFIG_SERIAL_BFIN_UART0
 376 static struct resource bfin_uart0_resources[] = {
 377         {
 378                 .start = UART0_THR,
 379                 .end = UART0_GCTL+2,
 380                 .flags = IORESOURCE_MEM,
 381         },
 382         {
 383                 .start = IRQ_UART0_RX,
 384                 .end = IRQ_UART0_RX+1,
 385                 .flags = IORESOURCE_IRQ,
 386         },
 387         {
 388                 .start = IRQ_UART0_ERROR,
 389                 .end = IRQ_UART0_ERROR,
 390                 .flags = IORESOURCE_IRQ,
 391         },
 392         {
 393                 .start = CH_UART0_TX,
 394                 .end = CH_UART0_TX,
 395                 .flags = IORESOURCE_DMA,
 396         },
 397         {
 398                 .start = CH_UART0_RX,
 399                 .end = CH_UART0_RX,
 400                 .flags = IORESOURCE_DMA,
 401         },
 402 };
 403
 404 static unsigned short bfin_uart0_peripherals[] = {
 405         P_UART0_TX, P_UART0_RX, 0
 406 };
 407
 408 static struct platform_device bfin_uart0_device = {
 409         .name = "bfin-uart",
 410         .id = 0,
 411         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 412         .resource = bfin_uart0_resources,
 413         .dev = {
 414                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 415         },
 416 };
 417 #endif
 418 #ifdef CONFIG_SERIAL_BFIN_UART1
 419 static struct resource bfin_uart1_resources[] = {
 420         {
 421                 .start = UART1_THR,
 422                 .end = UART1_GCTL+2,
 423                 .flags = IORESOURCE_MEM,
 424         },
 425         {
 426                 .start = IRQ_UART1_RX,
 427                 .end = IRQ_UART1_RX+1,
 428                 .flags = IORESOURCE_IRQ,
 429         },
 430         {
 431                 .start = IRQ_UART1_ERROR,
 432                 .end = IRQ_UART1_ERROR,
 433                 .flags = IORESOURCE_IRQ,
 434         },
 435         {
 436                 .start = CH_UART1_TX,
 437                 .end = CH_UART1_TX,
 438                 .flags = IORESOURCE_DMA,
 439         },
 440         {
 441                 .start = CH_UART1_RX,
 442                 .end = CH_UART1_RX,
 443                 .flags = IORESOURCE_DMA,
 444         },
 445 #ifdef CONFIG_BFIN_UART1_CTSRTS
 446         {       /* CTS pin */
 447                 .start = GPIO_PF9,
 448                 .end = GPIO_PF9,
 449                 .flags = IORESOURCE_IO,
 450         },
 451         {       /* RTS pin */
 452                 .start = GPIO_PF10,
 453                 .end = GPIO_PF10,
 454                 .flags = IORESOURCE_IO,
 455         },
 456 #endif
 457 };
 458
 459 static unsigned short bfin_uart1_peripherals[] = {
 460         P_UART1_TX, P_UART1_RX, 0
 461 };
 462
 463 static struct platform_device bfin_uart1_device = {
 464         .name = "bfin-uart",
 465         .id = 1,
 466         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 467         .resource = bfin_uart1_resources,
 468         .dev = {
 469                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 470         },
 471 };
 472 #endif
 473 #endif
 474
 475 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 476 #ifdef CONFIG_BFIN_SIR0
 477 static struct resource bfin_sir0_resources[] = {
 478         {
 479                 .start = 0xFFC00400,
 480                 .end = 0xFFC004FF,
 481                 .flags = IORESOURCE_MEM,
 482         },
 483         {
 484                 .start = IRQ_UART0_RX,
 485                 .end = IRQ_UART0_RX+1,
 486                 .flags = IORESOURCE_IRQ,
 487         },
 488         {
 489                 .start = CH_UART0_RX,
 490                 .end = CH_UART0_RX+1,
 491                 .flags = IORESOURCE_DMA,
 492         },
 493 };
 494
 495 static struct platform_device bfin_sir0_device = {
 496         .name = "bfin_sir",
 497         .id = 0,
 498         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 499         .resource = bfin_sir0_resources,
 500 };
 501 #endif
 502 #ifdef CONFIG_BFIN_SIR1
 503 static struct resource bfin_sir1_resources[] = {
 504         {
 505                 .start = 0xFFC02000,
 506                 .end = 0xFFC020FF,
 507                 .flags = IORESOURCE_MEM,
 508         },
 509         {
 510                 .start = IRQ_UART1_RX,
 511                 .end = IRQ_UART1_RX+1,
 512                 .flags = IORESOURCE_IRQ,
 513         },
 514         {
 515                 .start = CH_UART1_RX,
 516                 .end = CH_UART1_RX+1,
 517                 .flags = IORESOURCE_DMA,
 518         },
 519 };
 520
 521 static struct platform_device bfin_sir1_device = {
 522         .name = "bfin_sir",
 523         .id = 1,
 524         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 525         .resource = bfin_sir1_resources,
 526 };
 527 #endif
 528 #endif
 529
 530 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 531 #include <linux/input/ad7160.h>
 532 static const struct ad7160_platform_data bfin_ad7160_ts_info = {
 533         .sensor_x_res = 854,
 534         .sensor_y_res = 480,
 535         .pressure = 100,
 536         .filter_coef = 3,
 537         .coord_pref = AD7160_ORIG_TOP_LEFT,
 538         .first_touch_window = 5,
 539         .move_window = 3,
 540         .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
 541                         AD7160_EMIT_ABS_MT_PRESSURE |
 542                         AD7160_TRACKING_ID_ASCENDING,
 543         .finger_act_ctrl = 0x64,
 544         .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
 545                                 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 546                                 AD7160_HAPTIC_SLOT_B(60) |
 547                                 AD7160_HAPTIC_SLOT_B_LVL_LOW,
 548
 549         .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
 550                                 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 551                                 AD7160_HAPTIC_SLOT_B(80) |
 552                                 AD7160_HAPTIC_SLOT_B_LVL_LOW |
 553                                 AD7160_HAPTIC_SLOT_C(120) |
 554                                 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
 555                                 AD7160_HAPTIC_SLOT_D(30) |
 556                                 AD7160_HAPTIC_SLOT_D_LVL_LOW,
 557 };
 558 #endif
 559
 560 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 561 static struct resource bfin_twi0_resource[] = {
 562         [0] = {
 563                 .start = TWI0_REGBASE,
 564                 .end   = TWI0_REGBASE,
 565                 .flags = IORESOURCE_MEM,
 566         },
 567         [1] = {
 568                 .start = IRQ_TWI,
 569                 .end   = IRQ_TWI,
 570                 .flags = IORESOURCE_IRQ,
 571         },
 572 };
 573
 574 static struct platform_device i2c_bfin_twi_device = {
 575         .name = "i2c-bfin-twi",
 576         .id = 0,
 577         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 578         .resource = bfin_twi0_resource,
 579 };
 580 #endif
 581
 582 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 583 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 584         {
 585                 I2C_BOARD_INFO("ad7160", 0x33),
 586                 .irq = IRQ_PH1,
 587                 .platform_data = (void *)&bfin_ad7160_ts_info,
 588         },
 589 #endif
 590 };
 591
 592 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 593 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 594 static struct resource bfin_sport0_uart_resources[] = {
 595         {
 596                 .start = SPORT0_TCR1,
 597                 .end = SPORT0_MRCS3+4,
 598                 .flags = IORESOURCE_MEM,
 599         },
 600         {
 601                 .start = IRQ_SPORT0_RX,
 602                 .end = IRQ_SPORT0_RX+1,
 603                 .flags = IORESOURCE_IRQ,
 604         },
 605         {
 606                 .start = IRQ_SPORT0_ERROR,
 607                 .end = IRQ_SPORT0_ERROR,
 608                 .flags = IORESOURCE_IRQ,
 609         },
 610 };
 611
 612 static unsigned short bfin_sport0_peripherals[] = {
 613         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 614         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 615 };
 616
 617 static struct platform_device bfin_sport0_uart_device = {
 618         .name = "bfin-sport-uart",
 619         .id = 0,
 620         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 621         .resource = bfin_sport0_uart_resources,
 622         .dev = {
 623                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 624         },
 625 };
 626 #endif
 627 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 628 static struct resource bfin_sport1_uart_resources[] = {
 629         {
 630                 .start = SPORT1_TCR1,
 631                 .end = SPORT1_MRCS3+4,
 632                 .flags = IORESOURCE_MEM,
 633         },
 634         {
 635                 .start = IRQ_SPORT1_RX,
 636                 .end = IRQ_SPORT1_RX+1,
 637                 .flags = IORESOURCE_IRQ,
 638         },
 639         {
 640                 .start = IRQ_SPORT1_ERROR,
 641                 .end = IRQ_SPORT1_ERROR,
 642                 .flags = IORESOURCE_IRQ,
 643         },
 644 };
 645
 646 static unsigned short bfin_sport1_peripherals[] = {
 647         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 648         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 649 };
 650
 651 static struct platform_device bfin_sport1_uart_device = {
 652         .name = "bfin-sport-uart",
 653         .id = 1,
 654         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 655         .resource = bfin_sport1_uart_resources,
 656         .dev = {
 657                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 658         },
 659 };
 660 #endif
 661 #endif
 662
 663 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 664 #include <asm/bfin_rotary.h>
 665
 666 static struct bfin_rotary_platform_data bfin_rotary_data = {
 667         /*.rotary_up_key     = KEY_UP,*/
 668         /*.rotary_down_key   = KEY_DOWN,*/
 669         .rotary_rel_code   = REL_WHEEL,
 670         .rotary_button_key = KEY_ENTER,
 671         .debounce          = 10,        /* 0..17 */
 672         .mode              = ROT_QUAD_ENC | ROT_DEBE,
 673 };
 674
 675 static struct resource bfin_rotary_resources[] = {
 676         {
 677                 .start = IRQ_CNT,
 678                 .end = IRQ_CNT,
 679                 .flags = IORESOURCE_IRQ,
 680         },
 681 };
 682
 683 static struct platform_device bfin_rotary_device = {
 684         .name           = "bfin-rotary",
 685         .id             = -1,
 686         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
 687         .resource       = bfin_rotary_resources,
 688         .dev            = {
 689                 .platform_data = &bfin_rotary_data,
 690         },
 691 };
 692 #endif
 693
 694 static const unsigned int cclk_vlev_datasheet[] = {
 695         VRPAIR(VLEV_100, 400000000),
 696         VRPAIR(VLEV_105, 426000000),
 697         VRPAIR(VLEV_110, 500000000),
 698         VRPAIR(VLEV_115, 533000000),
 699         VRPAIR(VLEV_120, 600000000),
 700 };
 701
 702 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 703         .tuple_tab = cclk_vlev_datasheet,
 704         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 705         .vr_settling_time = 25 /* us */,
 706 };
 707
 708 static struct platform_device bfin_dpmc = {
 709         .name = "bfin dpmc",
 710         .dev = {
 711                 .platform_data = &bfin_dmpc_vreg_data,
 712         },
 713 };
 714
 715 static struct platform_device *stamp_devices[] __initdata = {
 716
 717         &bfin_dpmc,
 718
 719 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 720         &bf5xx_nand_device,
 721 #endif
 722
 723 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 724         &rtc_device,
 725 #endif
 726
 727 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 728         &musb_device,
 729 #endif
 730
 731 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 732         &bfin_mii_bus,
 733         &bfin_mac_device,
 734 #endif
 735
 736 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 737         &bfin_spi0_device,
 738 #endif
 739
 740 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 741 #ifdef CONFIG_SERIAL_BFIN_UART0
 742         &bfin_uart0_device,
 743 #endif
 744 #ifdef CONFIG_SERIAL_BFIN_UART1
 745         &bfin_uart1_device,
 746 #endif
 747 #endif
 748
 749 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 750         &bf52x_ra158z_device,
 751 #endif
 752
 753 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 754 #ifdef CONFIG_BFIN_SIR0
 755         &bfin_sir0_device,
 756 #endif
 757 #ifdef CONFIG_BFIN_SIR1
 758         &bfin_sir1_device,
 759 #endif
 760 #endif
 761
 762 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 763         &i2c_bfin_twi_device,
 764 #endif
 765
 766 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 767 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 768         &bfin_sport0_uart_device,
 769 #endif
 770 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 771         &bfin_sport1_uart_device,
 772 #endif
 773 #endif
 774
 775 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 776         &bfin_rotary_device,
 777 #endif
 778
 779 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 780         &ad7160eval_flash_device,
 781 #endif
 782
 783 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 784         &bfin_i2s,
 785 #endif
 786
 787 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 788         &bfin_tdm,
 789 #endif
 790 };
 791
 792 static int __init ad7160eval_init(void)
 793 {
 794         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 795         i2c_register_board_info(0, bfin_i2c_board_info,
 796                                 ARRAY_SIZE(bfin_i2c_board_info));
 797         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 798         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 799         return 0;
 800 }
 801
 802 arch_initcall(ad7160eval_init);
 803
 804 static struct platform_device *ad7160eval_early_devices[] __initdata = {
 805 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 806 #ifdef CONFIG_SERIAL_BFIN_UART0
 807         &bfin_uart0_device,
 808 #endif
 809 #ifdef CONFIG_SERIAL_BFIN_UART1
 810         &bfin_uart1_device,
 811 #endif
 812 #endif
 813
 814 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 815 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 816         &bfin_sport0_uart_device,
 817 #endif
 818 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 819         &bfin_sport1_uart_device,
 820 #endif
 821 #endif
 822 };
 823
 824 void __init native_machine_early_platform_add_devices(void)
 825 {
 826         printk(KERN_INFO "register early platform devices\n");
 827         early_platform_add_devices(ad7160eval_early_devices,
 828                 ARRAY_SIZE(ad7160eval_early_devices));
 829 }
 830
 831 void native_machine_restart(char *cmd)
 832 {
 833         /* workaround reboot hang when booting from SPI */
 834         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 835                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 836 }
 837
 838 void bfin_get_ether_addr(char *addr)
 839 {
 840         /* the MAC is stored in OTP memory page 0xDF */
 841         u32 ret;
 842         u64 otp_mac;
 843         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 844
 845         ret = otp_read(0xDF, 0x00, &otp_mac);
 846         if (!(ret & 0x1)) {
 847                 char *otp_mac_p = (char *)&otp_mac;
 848                 for (ret = 0; ret < 6; ++ret)
 849                         addr[ret] = otp_mac_p[5 - ret];
 850         }
 851 }
 852 EXPORT_SYMBOL(bfin_get_ether_addr);