arch/blackfin/mach-bf518/boards/tcm-bf518.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/etherdevice.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17
  18 #include <linux/i2c.h>
  19 #include <linux/irq.h>
  20 #include <linux/interrupt.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/portmux.h>
  25 #include <asm/dpmc.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/spi/ad7877.h>
  28 #include <net/dsa.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "Bluetechnix TCM-BF518";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  40 static struct mtd_partition tcm_partitions[] = {
  41         {
  42                 .name       = "bootloader(nor)",
  43                 .size       = 0x40000,
  44                 .offset     = 0,
  45         },
  46         {
  47                 .name       = "linux(nor)",
  48                 .size       = 0x1C0000,
  49                 .offset     = MTDPART_OFS_APPEND,
  50         }
  51 };
  52
  53 static struct physmap_flash_data tcm_flash_data = {
  54         .width      = 2,
  55         .parts      = tcm_partitions,
  56         .nr_parts   = ARRAY_SIZE(tcm_partitions),
  57 };
  58
  59 static struct resource tcm_flash_resource = {
  60         .start = 0x20000000,
  61         .end   = 0x201fffff,
  62         .flags = IORESOURCE_MEM,
  63 };
  64
  65 static struct platform_device tcm_flash_device = {
  66         .name          = "physmap-flash",
  67         .id            = 0,
  68         .dev = {
  69                 .platform_data = &tcm_flash_data,
  70         },
  71         .num_resources = 1,
  72         .resource      = &tcm_flash_resource,
  73 };
  74 #endif
  75
  76 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  77 static struct platform_device rtc_device = {
  78         .name = "rtc-bfin",
  79         .id   = -1,
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  84 #include <linux/bfin_mac.h>
  85 static const unsigned short bfin_mac_peripherals[] = P_MII0;
  86
  87 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  88         {
  89                 .addr = 1,
  90                 .irq = IRQ_MAC_PHYINT,
  91         },
  92 };
  93
  94 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  95         .phydev_number = 1,
  96         .phydev_data = bfin_phydev_data,
  97         .phy_mode = PHY_INTERFACE_MODE_MII,
  98         .mac_peripherals = bfin_mac_peripherals,
  99 };
 100
 101 static struct platform_device bfin_mii_bus = {
 102         .name = "bfin_mii_bus",
 103         .dev = {
 104                 .platform_data = &bfin_mii_bus_data,
 105         }
 106 };
 107
 108 static struct platform_device bfin_mac_device = {
 109         .name = "bfin_mac",
 110         .dev = {
 111                 .platform_data = &bfin_mii_bus,
 112         }
 113 };
 114 #endif
 115
 116 #if defined(CONFIG_MTD_M25P80) \
 117         || defined(CONFIG_MTD_M25P80_MODULE)
 118 static struct mtd_partition bfin_spi_flash_partitions[] = {
 119         {
 120                 .name = "bootloader(spi)",
 121                 .size = 0x00040000,
 122                 .offset = 0,
 123                 .mask_flags = MTD_CAP_ROM
 124         }, {
 125                 .name = "linux kernel(spi)",
 126                 .size = MTDPART_SIZ_FULL,
 127                 .offset = MTDPART_OFS_APPEND,
 128         }
 129 };
 130
 131 static struct flash_platform_data bfin_spi_flash_data = {
 132         .name = "m25p80",
 133         .parts = bfin_spi_flash_partitions,
 134         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 135         .type = "m25p16",
 136 };
 137
 138 /* SPI flash chip (m25p64) */
 139 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 140         .enable_dma = 0,         /* use dma transfer with this chip*/
 141         .bits_per_word = 8,
 142 };
 143 #endif
 144
 145 #if defined(CONFIG_BFIN_SPI_ADC) \
 146         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 147 /* SPI ADC chip */
 148 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 149         .enable_dma = 1,         /* use dma transfer with this chip*/
 150         .bits_per_word = 16,
 151 };
 152 #endif
 153
 154 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 155 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 156         .enable_dma = 0,
 157         .bits_per_word = 8,
 158 };
 159 #endif
 160
 161 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 162 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 163         .enable_dma = 0,
 164         .bits_per_word = 16,
 165 };
 166
 167 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 168         .model                  = 7877,
 169         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 170         .x_plate_ohms           = 419,
 171         .y_plate_ohms           = 486,
 172         .pressure_max           = 1000,
 173         .pressure_min           = 0,
 174         .stopacq_polarity       = 1,
 175         .first_conversion_delay = 3,
 176         .acquisition_time       = 1,
 177         .averaging              = 1,
 178         .pen_down_acc_interval  = 1,
 179 };
 180 #endif
 181
 182 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 183          && defined(CONFIG_SND_SOC_WM8731_SPI)
 184 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 185         .enable_dma = 0,
 186         .bits_per_word = 16,
 187 };
 188 #endif
 189
 190 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 191 static struct bfin5xx_spi_chip spidev_chip_info = {
 192         .enable_dma = 0,
 193         .bits_per_word = 8,
 194 };
 195 #endif
 196
 197 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 198 #if defined(CONFIG_MTD_M25P80) \
 199         || defined(CONFIG_MTD_M25P80_MODULE)
 200         {
 201                 /* the modalias must be the same as spi device driver name */
 202                 .modalias = "m25p80", /* Name of spi_driver for this device */
 203                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 204                 .bus_num = 0, /* Framework bus number */
 205                 .chip_select = 2, /* SPI0_SSEL2 */
 206                 .platform_data = &bfin_spi_flash_data,
 207                 .controller_data = &spi_flash_chip_info,
 208                 .mode = SPI_MODE_3,
 209         },
 210 #endif
 211
 212 #if defined(CONFIG_BFIN_SPI_ADC) \
 213         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 214         {
 215                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 216                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 217                 .bus_num = 0, /* Framework bus number */
 218                 .chip_select = 1, /* Framework chip select. */
 219                 .platform_data = NULL, /* No spi_driver specific config */
 220                 .controller_data = &spi_adc_chip_info,
 221         },
 222 #endif
 223
 224 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 225         {
 226                 .modalias = "mmc_spi",
 227                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 228                 .bus_num = 0,
 229                 .chip_select = 5,
 230                 .controller_data = &mmc_spi_chip_info,
 231                 .mode = SPI_MODE_3,
 232         },
 233 #endif
 234 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 235         {
 236                 .modalias               = "ad7877",
 237                 .platform_data          = &bfin_ad7877_ts_info,
 238                 .irq                    = IRQ_PF8,
 239                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 240                 .bus_num        = 0,
 241                 .chip_select  = 2,
 242                 .controller_data = &spi_ad7877_chip_info,
 243         },
 244 #endif
 245 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 246          && defined(CONFIG_SND_SOC_WM8731_SPI)
 247         {
 248                 .modalias       = "wm8731",
 249                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 250                 .bus_num        = 0,
 251                 .chip_select    = 5,
 252                 .controller_data = &spi_wm8731_chip_info,
 253                 .mode = SPI_MODE_0,
 254         },
 255 #endif
 256 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 257         {
 258                 .modalias = "spidev",
 259                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 260                 .bus_num = 0,
 261                 .chip_select = 1,
 262                 .controller_data = &spidev_chip_info,
 263         },
 264 #endif
 265 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 266         {
 267                 .modalias = "bfin-lq035q1-spi",
 268                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 269                 .bus_num = 0,
 270                 .chip_select = 1,
 271                 .controller_data = &lq035q1_spi_chip_info,
 272                 .mode = SPI_CPHA | SPI_CPOL,
 273         },
 274 #endif
 275 };
 276
 277 /* SPI controller data */
 278 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 279 /* SPI (0) */
 280 static struct bfin5xx_spi_master bfin_spi0_info = {
 281         .num_chipselect = 6,
 282         .enable_dma = 1,  /* master has the ability to do dma transfer */
 283         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 284 };
 285
 286 static struct resource bfin_spi0_resource[] = {
 287         [0] = {
 288                 .start = SPI0_REGBASE,
 289                 .end   = SPI0_REGBASE + 0xFF,
 290                 .flags = IORESOURCE_MEM,
 291                 },
 292         [1] = {
 293                 .start = CH_SPI0,
 294                 .end   = CH_SPI0,
 295                 .flags = IORESOURCE_DMA,
 296         },
 297         [2] = {
 298                 .start = IRQ_SPI0,
 299                 .end   = IRQ_SPI0,
 300                 .flags = IORESOURCE_IRQ,
 301         },
 302 };
 303
 304 static struct platform_device bfin_spi0_device = {
 305         .name = "bfin-spi",
 306         .id = 0, /* Bus number */
 307         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 308         .resource = bfin_spi0_resource,
 309         .dev = {
 310                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 311         },
 312 };
 313
 314 /* SPI (1) */
 315 static struct bfin5xx_spi_master bfin_spi1_info = {
 316         .num_chipselect = 6,
 317         .enable_dma = 1,  /* master has the ability to do dma transfer */
 318         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 319 };
 320
 321 static struct resource bfin_spi1_resource[] = {
 322         [0] = {
 323                 .start = SPI1_REGBASE,
 324                 .end   = SPI1_REGBASE + 0xFF,
 325                 .flags = IORESOURCE_MEM,
 326                 },
 327         [1] = {
 328                 .start = CH_SPI1,
 329                 .end   = CH_SPI1,
 330                 .flags = IORESOURCE_DMA,
 331         },
 332         [2] = {
 333                 .start = IRQ_SPI1,
 334                 .end   = IRQ_SPI1,
 335                 .flags = IORESOURCE_IRQ,
 336         },
 337 };
 338
 339 static struct platform_device bfin_spi1_device = {
 340         .name = "bfin-spi",
 341         .id = 1, /* Bus number */
 342         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 343         .resource = bfin_spi1_resource,
 344         .dev = {
 345                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 346         },
 347 };
 348 #endif  /* spi master and devices */
 349
 350 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 351 #ifdef CONFIG_SERIAL_BFIN_UART0
 352 static struct resource bfin_uart0_resources[] = {
 353         {
 354                 .start = UART0_THR,
 355                 .end = UART0_GCTL+2,
 356                 .flags = IORESOURCE_MEM,
 357         },
 358         {
 359                 .start = IRQ_UART0_RX,
 360                 .end = IRQ_UART0_RX+1,
 361                 .flags = IORESOURCE_IRQ,
 362         },
 363         {
 364                 .start = IRQ_UART0_ERROR,
 365                 .end = IRQ_UART0_ERROR,
 366                 .flags = IORESOURCE_IRQ,
 367         },
 368         {
 369                 .start = CH_UART0_TX,
 370                 .end = CH_UART0_TX,
 371                 .flags = IORESOURCE_DMA,
 372         },
 373         {
 374                 .start = CH_UART0_RX,
 375                 .end = CH_UART0_RX,
 376                 .flags = IORESOURCE_DMA,
 377         },
 378 };
 379
 380 unsigned short bfin_uart0_peripherals[] = {
 381         P_UART0_TX, P_UART0_RX, 0
 382 };
 383
 384 static struct platform_device bfin_uart0_device = {
 385         .name = "bfin-uart",
 386         .id = 0,
 387         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 388         .resource = bfin_uart0_resources,
 389         .dev = {
 390                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 391         },
 392 };
 393 #endif
 394 #ifdef CONFIG_SERIAL_BFIN_UART1
 395 static struct resource bfin_uart1_resources[] = {
 396         {
 397                 .start = UART1_THR,
 398                 .end = UART1_GCTL+2,
 399                 .flags = IORESOURCE_MEM,
 400         },
 401         {
 402                 .start = IRQ_UART1_RX,
 403                 .end = IRQ_UART1_RX+1,
 404                 .flags = IORESOURCE_IRQ,
 405         },
 406         {
 407                 .start = IRQ_UART1_ERROR,
 408                 .end = IRQ_UART1_ERROR,
 409                 .flags = IORESOURCE_IRQ,
 410         },
 411         {
 412                 .start = CH_UART1_TX,
 413                 .end = CH_UART1_TX,
 414                 .flags = IORESOURCE_DMA,
 415         },
 416         {
 417                 .start = CH_UART1_RX,
 418                 .end = CH_UART1_RX,
 419                 .flags = IORESOURCE_DMA,
 420         },
 421 };
 422
 423 unsigned short bfin_uart1_peripherals[] = {
 424         P_UART1_TX, P_UART1_RX, 0
 425 };
 426
 427 static struct platform_device bfin_uart1_device = {
 428         .name = "bfin-uart",
 429         .id = 1,
 430         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 431         .resource = bfin_uart1_resources,
 432         .dev = {
 433                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 434         },
 435 };
 436 #endif
 437 #endif
 438
 439 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 440 #ifdef CONFIG_BFIN_SIR0
 441 static struct resource bfin_sir0_resources[] = {
 442         {
 443                 .start = 0xFFC00400,
 444                 .end = 0xFFC004FF,
 445                 .flags = IORESOURCE_MEM,
 446         },
 447         {
 448                 .start = IRQ_UART0_RX,
 449                 .end = IRQ_UART0_RX+1,
 450                 .flags = IORESOURCE_IRQ,
 451         },
 452         {
 453                 .start = CH_UART0_RX,
 454                 .end = CH_UART0_RX+1,
 455                 .flags = IORESOURCE_DMA,
 456         },
 457 };
 458
 459 static struct platform_device bfin_sir0_device = {
 460         .name = "bfin_sir",
 461         .id = 0,
 462         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 463         .resource = bfin_sir0_resources,
 464 };
 465 #endif
 466 #ifdef CONFIG_BFIN_SIR1
 467 static struct resource bfin_sir1_resources[] = {
 468         {
 469                 .start = 0xFFC02000,
 470                 .end = 0xFFC020FF,
 471                 .flags = IORESOURCE_MEM,
 472         },
 473         {
 474                 .start = IRQ_UART1_RX,
 475                 .end = IRQ_UART1_RX+1,
 476                 .flags = IORESOURCE_IRQ,
 477         },
 478         {
 479                 .start = CH_UART1_RX,
 480                 .end = CH_UART1_RX+1,
 481                 .flags = IORESOURCE_DMA,
 482         },
 483 };
 484
 485 static struct platform_device bfin_sir1_device = {
 486         .name = "bfin_sir",
 487         .id = 1,
 488         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 489         .resource = bfin_sir1_resources,
 490 };
 491 #endif
 492 #endif
 493
 494 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 495 static struct resource bfin_twi0_resource[] = {
 496         [0] = {
 497                 .start = TWI0_REGBASE,
 498                 .end   = TWI0_REGBASE,
 499                 .flags = IORESOURCE_MEM,
 500         },
 501         [1] = {
 502                 .start = IRQ_TWI,
 503                 .end   = IRQ_TWI,
 504                 .flags = IORESOURCE_IRQ,
 505         },
 506 };
 507
 508 static struct platform_device i2c_bfin_twi_device = {
 509         .name = "i2c-bfin-twi",
 510         .id = 0,
 511         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 512         .resource = bfin_twi0_resource,
 513 };
 514 #endif
 515
 516 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 517 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 518         {
 519                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 520         },
 521 #endif
 522 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 523         {
 524                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 525                 .irq = IRQ_PF8,
 526         },
 527 #endif
 528 };
 529
 530 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 531 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 532 static struct resource bfin_sport0_uart_resources[] = {
 533         {
 534                 .start = SPORT0_TCR1,
 535                 .end = SPORT0_MRCS3+4,
 536                 .flags = IORESOURCE_MEM,
 537         },
 538         {
 539                 .start = IRQ_SPORT0_RX,
 540                 .end = IRQ_SPORT0_RX+1,
 541                 .flags = IORESOURCE_IRQ,
 542         },
 543         {
 544                 .start = IRQ_SPORT0_ERROR,
 545                 .end = IRQ_SPORT0_ERROR,
 546                 .flags = IORESOURCE_IRQ,
 547         },
 548 };
 549
 550 unsigned short bfin_sport0_peripherals[] = {
 551         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 552         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 553 };
 554
 555 static struct platform_device bfin_sport0_uart_device = {
 556         .name = "bfin-sport-uart",
 557         .id = 0,
 558         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 559         .resource = bfin_sport0_uart_resources,
 560         .dev = {
 561                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 562         },
 563 };
 564 #endif
 565 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 566 static struct resource bfin_sport1_uart_resources[] = {
 567         {
 568                 .start = SPORT1_TCR1,
 569                 .end = SPORT1_MRCS3+4,
 570                 .flags = IORESOURCE_MEM,
 571         },
 572         {
 573                 .start = IRQ_SPORT1_RX,
 574                 .end = IRQ_SPORT1_RX+1,
 575                 .flags = IORESOURCE_IRQ,
 576         },
 577         {
 578                 .start = IRQ_SPORT1_ERROR,
 579                 .end = IRQ_SPORT1_ERROR,
 580                 .flags = IORESOURCE_IRQ,
 581         },
 582 };
 583
 584 unsigned short bfin_sport1_peripherals[] = {
 585         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 586         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 587 };
 588
 589 static struct platform_device bfin_sport1_uart_device = {
 590         .name = "bfin-sport-uart",
 591         .id = 1,
 592         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 593         .resource = bfin_sport1_uart_resources,
 594         .dev = {
 595                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 596         },
 597 };
 598 #endif
 599 #endif
 600
 601 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 602 #include <linux/input.h>
 603 #include <linux/gpio_keys.h>
 604
 605 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 606         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 607         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 608 };
 609
 610 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 611         .buttons        = bfin_gpio_keys_table,
 612         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 613 };
 614
 615 static struct platform_device bfin_device_gpiokeys = {
 616         .name      = "gpio-keys",
 617         .dev = {
 618                 .platform_data = &bfin_gpio_keys_data,
 619         },
 620 };
 621 #endif
 622
 623 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 624
 625 static struct bfin_sd_host bfin_sdh_data = {
 626         .dma_chan = CH_RSI,
 627         .irq_int0 = IRQ_RSI_INT0,
 628         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 629 };
 630
 631 static struct platform_device bf51x_sdh_device = {
 632         .name = "bfin-sdh",
 633         .id = 0,
 634         .dev = {
 635                 .platform_data = &bfin_sdh_data,
 636         },
 637 };
 638 #endif
 639
 640 static const unsigned int cclk_vlev_datasheet[] =
 641 {
 642         VRPAIR(VLEV_100, 400000000),
 643         VRPAIR(VLEV_105, 426000000),
 644         VRPAIR(VLEV_110, 500000000),
 645         VRPAIR(VLEV_115, 533000000),
 646         VRPAIR(VLEV_120, 600000000),
 647 };
 648
 649 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 650         .tuple_tab = cclk_vlev_datasheet,
 651         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 652         .vr_settling_time = 25 /* us */,
 653 };
 654
 655 static struct platform_device bfin_dpmc = {
 656         .name = "bfin dpmc",
 657         .dev = {
 658                 .platform_data = &bfin_dmpc_vreg_data,
 659         },
 660 };
 661
 662 static struct platform_device *tcm_devices[] __initdata = {
 663
 664         &bfin_dpmc,
 665
 666 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 667         &rtc_device,
 668 #endif
 669
 670 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 671         &bfin_mii_bus,
 672         &bfin_mac_device,
 673 #endif
 674
 675 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 676         &bfin_spi0_device,
 677         &bfin_spi1_device,
 678 #endif
 679
 680 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 681 #ifdef CONFIG_SERIAL_BFIN_UART0
 682         &bfin_uart0_device,
 683 #endif
 684 #ifdef CONFIG_SERIAL_BFIN_UART1
 685         &bfin_uart1_device,
 686 #endif
 687 #endif
 688
 689 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 690 #ifdef CONFIG_BFIN_SIR0
 691         &bfin_sir0_device,
 692 #endif
 693 #ifdef CONFIG_BFIN_SIR1
 694         &bfin_sir1_device,
 695 #endif
 696 #endif
 697
 698 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 699         &i2c_bfin_twi_device,
 700 #endif
 701
 702 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 703 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 704         &bfin_sport0_uart_device,
 705 #endif
 706 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 707         &bfin_sport1_uart_device,
 708 #endif
 709 #endif
 710
 711 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 712         &bfin_device_gpiokeys,
 713 #endif
 714
 715 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 716         &bf51x_sdh_device,
 717 #endif
 718
 719 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 720         &tcm_flash_device,
 721 #endif
 722 };
 723
 724 static int __init tcm_init(void)
 725 {
 726         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 727         i2c_register_board_info(0, bfin_i2c_board_info,
 728                                 ARRAY_SIZE(bfin_i2c_board_info));
 729         platform_add_devices(tcm_devices, ARRAY_SIZE(tcm_devices));
 730         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 731         return 0;
 732 }
 733
 734 arch_initcall(tcm_init);
 735
 736 static struct platform_device *tcm_early_devices[] __initdata = {
 737 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 738 #ifdef CONFIG_SERIAL_BFIN_UART0
 739         &bfin_uart0_device,
 740 #endif
 741 #ifdef CONFIG_SERIAL_BFIN_UART1
 742         &bfin_uart1_device,
 743 #endif
 744 #endif
 745
 746 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 747 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 748         &bfin_sport0_uart_device,
 749 #endif
 750 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 751         &bfin_sport1_uart_device,
 752 #endif
 753 #endif
 754 };
 755
 756 void __init native_machine_early_platform_add_devices(void)
 757 {
 758         printk(KERN_INFO "register early platform devices\n");
 759         early_platform_add_devices(tcm_early_devices,
 760                 ARRAY_SIZE(tcm_early_devices));
 761 }
 762
 763 void native_machine_restart(char *cmd)
 764 {
 765         /* workaround reboot hang when booting from SPI */
 766         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 767                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 768 }
 769
 770 void bfin_get_ether_addr(char *addr)
 771 {
 772         random_ether_addr(addr);
 773         printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
 774 }
 775 EXPORT_SYMBOL(bfin_get_ether_addr);