arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <asm/dma.h>
  21 #include <asm/bfin5xx_spi.h>
  22 #include <asm/reboot.h>
  23 #include <asm/portmux.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/bfin_sdh.h>
  26 #include <linux/spi/ad7877.h>
  27 #include <net/dsa.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  39 static struct mtd_partition ezbrd_partitions[] = {
  40         {
  41                 .name       = "bootloader(nor)",
  42                 .size       = 0x40000,
  43                 .offset     = 0,
  44         }, {
  45                 .name       = "linux kernel(nor)",
  46                 .size       = 0x1C0000,
  47                 .offset     = MTDPART_OFS_APPEND,
  48         }, {
  49                 .name       = "file system(nor)",
  50                 .size       = MTDPART_SIZ_FULL,
  51                 .offset     = MTDPART_OFS_APPEND,
  52         }
  53 };
  54
  55 static struct physmap_flash_data ezbrd_flash_data = {
  56         .width      = 2,
  57         .parts      = ezbrd_partitions,
  58         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  59 };
  60
  61 static struct resource ezbrd_flash_resource = {
  62         .start = 0x20000000,
  63 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  64         .end   = 0x202fffff,
  65 #else
  66         .end   = 0x203fffff,
  67 #endif
  68         .flags = IORESOURCE_MEM,
  69 };
  70
  71 static struct platform_device ezbrd_flash_device = {
  72         .name          = "physmap-flash",
  73         .id            = 0,
  74         .dev = {
  75                 .platform_data = &ezbrd_flash_data,
  76         },
  77         .num_resources = 1,
  78         .resource      = &ezbrd_flash_resource,
  79 };
  80 #endif
  81
  82 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  83 static struct platform_device rtc_device = {
  84         .name = "rtc-bfin",
  85         .id   = -1,
  86 };
  87 #endif
  88
  89 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  90 #include <linux/bfin_mac.h>
  91 static const unsigned short bfin_mac_peripherals[] = {
  92         P_MII0_ETxD0,
  93         P_MII0_ETxD1,
  94         P_MII0_ETxEN,
  95         P_MII0_ERxD0,
  96         P_MII0_ERxD1,
  97         P_MII0_TxCLK,
  98         P_MII0_PHYINT,
  99         P_MII0_CRS,
 100         P_MII0_MDC,
 101         P_MII0_MDIO,
 102         0
 103 };
 104
 105 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 106         {
 107 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 108                 .addr = 3,
 109 #else
 110                 .addr = 1,
 111 #endif
 112                 .irq = IRQ_MAC_PHYINT,
 113         },
 114 };
 115
 116 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 117         .phydev_number = 1,
 118         .phydev_data = bfin_phydev_data,
 119         .phy_mode = PHY_INTERFACE_MODE_MII,
 120         .mac_peripherals = bfin_mac_peripherals,
 121 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 122         .phy_mask = 0xfff7, /* Only probe the port phy connect to the on chip MAC */
 123 #endif
 124 };
 125
 126 static struct platform_device bfin_mii_bus = {
 127         .name = "bfin_mii_bus",
 128         .dev = {
 129                 .platform_data = &bfin_mii_bus_data,
 130         }
 131 };
 132
 133 static struct platform_device bfin_mac_device = {
 134         .name = "bfin_mac",
 135         .dev = {
 136                 .platform_data = &bfin_mii_bus,
 137         }
 138 };
 139
 140 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 141 static struct dsa_chip_data ksz8893m_switch_chip_data = {
 142         .mii_bus = &bfin_mii_bus.dev,
 143         .port_names = {
 144                 NULL,
 145                 "eth%d",
 146                 "eth%d",
 147                 "cpu",
 148         },
 149 };
 150 static struct dsa_platform_data ksz8893m_switch_data = {
 151         .nr_chips = 1,
 152         .netdev = &bfin_mac_device.dev,
 153         .chip = &ksz8893m_switch_chip_data,
 154 };
 155
 156 static struct platform_device ksz8893m_switch_device = {
 157         .name           = "dsa",
 158         .id             = 0,
 159         .num_resources  = 0,
 160         .dev.platform_data = &ksz8893m_switch_data,
 161 };
 162 #endif
 163 #endif
 164
 165 #if defined(CONFIG_MTD_M25P80) \
 166         || defined(CONFIG_MTD_M25P80_MODULE)
 167 static struct mtd_partition bfin_spi_flash_partitions[] = {
 168         {
 169                 .name = "bootloader(spi)",
 170                 .size = 0x00040000,
 171                 .offset = 0,
 172                 .mask_flags = MTD_CAP_ROM
 173         }, {
 174                 .name = "linux kernel(spi)",
 175                 .size = MTDPART_SIZ_FULL,
 176                 .offset = MTDPART_OFS_APPEND,
 177         }
 178 };
 179
 180 static struct flash_platform_data bfin_spi_flash_data = {
 181         .name = "m25p80",
 182         .parts = bfin_spi_flash_partitions,
 183         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 184         .type = "m25p16",
 185 };
 186
 187 /* SPI flash chip (m25p64) */
 188 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 189         .enable_dma = 0,         /* use dma transfer with this chip*/
 190 };
 191 #endif
 192
 193 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 194 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 195         .enable_dma = 0,
 196 };
 197 #endif
 198
 199 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 200 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 201         .model                  = 7877,
 202         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 203         .x_plate_ohms           = 419,
 204         .y_plate_ohms           = 486,
 205         .pressure_max           = 1000,
 206         .pressure_min           = 0,
 207         .stopacq_polarity       = 1,
 208         .first_conversion_delay = 3,
 209         .acquisition_time       = 1,
 210         .averaging              = 1,
 211         .pen_down_acc_interval  = 1,
 212 };
 213 #endif
 214
 215 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 216 #if defined(CONFIG_MTD_M25P80) \
 217         || defined(CONFIG_MTD_M25P80_MODULE)
 218         {
 219                 /* the modalias must be the same as spi device driver name */
 220                 .modalias = "m25p80", /* Name of spi_driver for this device */
 221                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 222                 .bus_num = 0, /* Framework bus number */
 223                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 224                 .platform_data = &bfin_spi_flash_data,
 225                 .controller_data = &spi_flash_chip_info,
 226                 .mode = SPI_MODE_3,
 227         },
 228 #endif
 229
 230 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 231 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 232         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 233         {
 234                 .modalias = "ksz8893m",
 235                 .max_speed_hz = 5000000,
 236                 .bus_num = 0,
 237                 .chip_select = 1,
 238                 .platform_data = NULL,
 239                 .mode = SPI_MODE_3,
 240         },
 241 #endif
 242 #endif
 243
 244 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 245         {
 246                 .modalias = "mmc_spi",
 247                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 248                 .bus_num = 0,
 249                 .chip_select = 5,
 250                 .controller_data = &mmc_spi_chip_info,
 251                 .mode = SPI_MODE_3,
 252         },
 253 #endif
 254 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 255         {
 256                 .modalias               = "ad7877",
 257                 .platform_data          = &bfin_ad7877_ts_info,
 258                 .irq                    = IRQ_PF8,
 259                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 260                 .bus_num        = 0,
 261                 .chip_select  = 2,
 262         },
 263 #endif
 264 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 265          && defined(CONFIG_SND_SOC_WM8731_SPI)
 266         {
 267                 .modalias       = "wm8731",
 268                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 269                 .bus_num        = 0,
 270                 .chip_select    = 5,
 271                 .mode = SPI_MODE_0,
 272         },
 273 #endif
 274 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 275         {
 276                 .modalias = "spidev",
 277                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 278                 .bus_num = 0,
 279                 .chip_select = 1,
 280         },
 281 #endif
 282 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 283         {
 284                 .modalias = "bfin-lq035q1-spi",
 285                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 286                 .bus_num = 0,
 287                 .chip_select = 1,
 288                 .mode = SPI_CPHA | SPI_CPOL,
 289         },
 290 #endif
 291 };
 292
 293 /* SPI controller data */
 294 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 295 /* SPI (0) */
 296 static struct bfin5xx_spi_master bfin_spi0_info = {
 297         .num_chipselect = 6,
 298         .enable_dma = 1,  /* master has the ability to do dma transfer */
 299         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 300 };
 301
 302 static struct resource bfin_spi0_resource[] = {
 303         [0] = {
 304                 .start = SPI0_REGBASE,
 305                 .end   = SPI0_REGBASE + 0xFF,
 306                 .flags = IORESOURCE_MEM,
 307                 },
 308         [1] = {
 309                 .start = CH_SPI0,
 310                 .end   = CH_SPI0,
 311                 .flags = IORESOURCE_DMA,
 312         },
 313         [2] = {
 314                 .start = IRQ_SPI0,
 315                 .end   = IRQ_SPI0,
 316                 .flags = IORESOURCE_IRQ,
 317         },
 318 };
 319
 320 static struct platform_device bfin_spi0_device = {
 321         .name = "bfin-spi",
 322         .id = 0, /* Bus number */
 323         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 324         .resource = bfin_spi0_resource,
 325         .dev = {
 326                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 327         },
 328 };
 329
 330 /* SPI (1) */
 331 static struct bfin5xx_spi_master bfin_spi1_info = {
 332         .num_chipselect = 6,
 333         .enable_dma = 1,  /* master has the ability to do dma transfer */
 334         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 335 };
 336
 337 static struct resource bfin_spi1_resource[] = {
 338         [0] = {
 339                 .start = SPI1_REGBASE,
 340                 .end   = SPI1_REGBASE + 0xFF,
 341                 .flags = IORESOURCE_MEM,
 342                 },
 343         [1] = {
 344                 .start = CH_SPI1,
 345                 .end   = CH_SPI1,
 346                 .flags = IORESOURCE_DMA,
 347         },
 348         [2] = {
 349                 .start = IRQ_SPI1,
 350                 .end   = IRQ_SPI1,
 351                 .flags = IORESOURCE_IRQ,
 352         },
 353 };
 354
 355 static struct platform_device bfin_spi1_device = {
 356         .name = "bfin-spi",
 357         .id = 1, /* Bus number */
 358         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 359         .resource = bfin_spi1_resource,
 360         .dev = {
 361                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 362         },
 363 };
 364 #endif  /* spi master and devices */
 365
 366 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 367 #ifdef CONFIG_SERIAL_BFIN_UART0
 368 static struct resource bfin_uart0_resources[] = {
 369         {
 370                 .start = UART0_THR,
 371                 .end = UART0_GCTL+2,
 372                 .flags = IORESOURCE_MEM,
 373         },
 374         {
 375                 .start = IRQ_UART0_RX,
 376                 .end = IRQ_UART0_RX+1,
 377                 .flags = IORESOURCE_IRQ,
 378         },
 379         {
 380                 .start = IRQ_UART0_ERROR,
 381                 .end = IRQ_UART0_ERROR,
 382                 .flags = IORESOURCE_IRQ,
 383         },
 384         {
 385                 .start = CH_UART0_TX,
 386                 .end = CH_UART0_TX,
 387                 .flags = IORESOURCE_DMA,
 388         },
 389         {
 390                 .start = CH_UART0_RX,
 391                 .end = CH_UART0_RX,
 392                 .flags = IORESOURCE_DMA,
 393         },
 394 };
 395
 396 static unsigned short bfin_uart0_peripherals[] = {
 397         P_UART0_TX, P_UART0_RX, 0
 398 };
 399
 400 static struct platform_device bfin_uart0_device = {
 401         .name = "bfin-uart",
 402         .id = 0,
 403         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 404         .resource = bfin_uart0_resources,
 405         .dev = {
 406                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 407         },
 408 };
 409 #endif
 410 #ifdef CONFIG_SERIAL_BFIN_UART1
 411 static struct resource bfin_uart1_resources[] = {
 412         {
 413                 .start = UART1_THR,
 414                 .end = UART1_GCTL+2,
 415                 .flags = IORESOURCE_MEM,
 416         },
 417         {
 418                 .start = IRQ_UART1_RX,
 419                 .end = IRQ_UART1_RX+1,
 420                 .flags = IORESOURCE_IRQ,
 421         },
 422         {
 423                 .start = IRQ_UART1_ERROR,
 424                 .end = IRQ_UART1_ERROR,
 425                 .flags = IORESOURCE_IRQ,
 426         },
 427         {
 428                 .start = CH_UART1_TX,
 429                 .end = CH_UART1_TX,
 430                 .flags = IORESOURCE_DMA,
 431         },
 432         {
 433                 .start = CH_UART1_RX,
 434                 .end = CH_UART1_RX,
 435                 .flags = IORESOURCE_DMA,
 436         },
 437 };
 438
 439 static unsigned short bfin_uart1_peripherals[] = {
 440         P_UART1_TX, P_UART1_RX, 0
 441 };
 442
 443 static struct platform_device bfin_uart1_device = {
 444         .name = "bfin-uart",
 445         .id = 1,
 446         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 447         .resource = bfin_uart1_resources,
 448         .dev = {
 449                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 450         },
 451 };
 452 #endif
 453 #endif
 454
 455 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 456 #ifdef CONFIG_BFIN_SIR0
 457 static struct resource bfin_sir0_resources[] = {
 458         {
 459                 .start = 0xFFC00400,
 460                 .end = 0xFFC004FF,
 461                 .flags = IORESOURCE_MEM,
 462         },
 463         {
 464                 .start = IRQ_UART0_RX,
 465                 .end = IRQ_UART0_RX+1,
 466                 .flags = IORESOURCE_IRQ,
 467         },
 468         {
 469                 .start = CH_UART0_RX,
 470                 .end = CH_UART0_RX+1,
 471                 .flags = IORESOURCE_DMA,
 472         },
 473 };
 474
 475 static struct platform_device bfin_sir0_device = {
 476         .name = "bfin_sir",
 477         .id = 0,
 478         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 479         .resource = bfin_sir0_resources,
 480 };
 481 #endif
 482 #ifdef CONFIG_BFIN_SIR1
 483 static struct resource bfin_sir1_resources[] = {
 484         {
 485                 .start = 0xFFC02000,
 486                 .end = 0xFFC020FF,
 487                 .flags = IORESOURCE_MEM,
 488         },
 489         {
 490                 .start = IRQ_UART1_RX,
 491                 .end = IRQ_UART1_RX+1,
 492                 .flags = IORESOURCE_IRQ,
 493         },
 494         {
 495                 .start = CH_UART1_RX,
 496                 .end = CH_UART1_RX+1,
 497                 .flags = IORESOURCE_DMA,
 498         },
 499 };
 500
 501 static struct platform_device bfin_sir1_device = {
 502         .name = "bfin_sir",
 503         .id = 1,
 504         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 505         .resource = bfin_sir1_resources,
 506 };
 507 #endif
 508 #endif
 509
 510 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 511 static struct platform_device bfin_i2s = {
 512         .name = "bfin-i2s",
 513         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 514         /* TODO: add platform data here */
 515 };
 516 #endif
 517
 518 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 519 static struct resource bfin_twi0_resource[] = {
 520         [0] = {
 521                 .start = TWI0_REGBASE,
 522                 .end   = TWI0_REGBASE,
 523                 .flags = IORESOURCE_MEM,
 524         },
 525         [1] = {
 526                 .start = IRQ_TWI,
 527                 .end   = IRQ_TWI,
 528                 .flags = IORESOURCE_IRQ,
 529         },
 530 };
 531
 532 static struct platform_device i2c_bfin_twi_device = {
 533         .name = "i2c-bfin-twi",
 534         .id = 0,
 535         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 536         .resource = bfin_twi0_resource,
 537 };
 538 #endif
 539
 540 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 541 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 542         {
 543                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 544         },
 545 #endif
 546 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 547         {
 548                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 549                 .irq = IRQ_PF8,
 550         },
 551 #endif
 552 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 553         {
 554                 I2C_BOARD_INFO("ssm2602", 0x1b),
 555         },
 556 #endif
 557 };
 558
 559 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 560 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 561 static struct resource bfin_sport0_uart_resources[] = {
 562         {
 563                 .start = SPORT0_TCR1,
 564                 .end = SPORT0_MRCS3+4,
 565                 .flags = IORESOURCE_MEM,
 566         },
 567         {
 568                 .start = IRQ_SPORT0_RX,
 569                 .end = IRQ_SPORT0_RX+1,
 570                 .flags = IORESOURCE_IRQ,
 571         },
 572         {
 573                 .start = IRQ_SPORT0_ERROR,
 574                 .end = IRQ_SPORT0_ERROR,
 575                 .flags = IORESOURCE_IRQ,
 576         },
 577 };
 578
 579 static unsigned short bfin_sport0_peripherals[] = {
 580         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 581         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 582 };
 583
 584 static struct platform_device bfin_sport0_uart_device = {
 585         .name = "bfin-sport-uart",
 586         .id = 0,
 587         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 588         .resource = bfin_sport0_uart_resources,
 589         .dev = {
 590                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 591         },
 592 };
 593 #endif
 594 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 595 static struct resource bfin_sport1_uart_resources[] = {
 596         {
 597                 .start = SPORT1_TCR1,
 598                 .end = SPORT1_MRCS3+4,
 599                 .flags = IORESOURCE_MEM,
 600         },
 601         {
 602                 .start = IRQ_SPORT1_RX,
 603                 .end = IRQ_SPORT1_RX+1,
 604                 .flags = IORESOURCE_IRQ,
 605         },
 606         {
 607                 .start = IRQ_SPORT1_ERROR,
 608                 .end = IRQ_SPORT1_ERROR,
 609                 .flags = IORESOURCE_IRQ,
 610         },
 611 };
 612
 613 static unsigned short bfin_sport1_peripherals[] = {
 614         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 615         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 616 };
 617
 618 static struct platform_device bfin_sport1_uart_device = {
 619         .name = "bfin-sport-uart",
 620         .id = 1,
 621         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 622         .resource = bfin_sport1_uart_resources,
 623         .dev = {
 624                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 625         },
 626 };
 627 #endif
 628 #endif
 629
 630 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 631 #include <linux/input.h>
 632 #include <linux/gpio_keys.h>
 633
 634 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 635         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 636         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 637 };
 638
 639 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 640         .buttons        = bfin_gpio_keys_table,
 641         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 642 };
 643
 644 static struct platform_device bfin_device_gpiokeys = {
 645         .name      = "gpio-keys",
 646         .dev = {
 647                 .platform_data = &bfin_gpio_keys_data,
 648         },
 649 };
 650 #endif
 651
 652 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 653
 654 static struct bfin_sd_host bfin_sdh_data = {
 655         .dma_chan = CH_RSI,
 656         .irq_int0 = IRQ_RSI_INT0,
 657         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 658 };
 659
 660 static struct platform_device bf51x_sdh_device = {
 661         .name = "bfin-sdh",
 662         .id = 0,
 663         .dev = {
 664                 .platform_data = &bfin_sdh_data,
 665         },
 666 };
 667 #endif
 668
 669 static const unsigned int cclk_vlev_datasheet[] =
 670 {
 671         VRPAIR(VLEV_100, 400000000),
 672         VRPAIR(VLEV_105, 426000000),
 673         VRPAIR(VLEV_110, 500000000),
 674         VRPAIR(VLEV_115, 533000000),
 675         VRPAIR(VLEV_120, 600000000),
 676 };
 677
 678 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 679         .tuple_tab = cclk_vlev_datasheet,
 680         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 681         .vr_settling_time = 25 /* us */,
 682 };
 683
 684 static struct platform_device bfin_dpmc = {
 685         .name = "bfin dpmc",
 686         .dev = {
 687                 .platform_data = &bfin_dmpc_vreg_data,
 688         },
 689 };
 690
 691 static struct platform_device *stamp_devices[] __initdata = {
 692
 693         &bfin_dpmc,
 694
 695 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 696         &rtc_device,
 697 #endif
 698
 699 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 700         &bfin_mii_bus,
 701         &bfin_mac_device,
 702 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 703         &ksz8893m_switch_device,
 704 #endif
 705 #endif
 706
 707 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 708         &bfin_spi0_device,
 709         &bfin_spi1_device,
 710 #endif
 711
 712 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 713 #ifdef CONFIG_SERIAL_BFIN_UART0
 714         &bfin_uart0_device,
 715 #endif
 716 #ifdef CONFIG_SERIAL_BFIN_UART1
 717         &bfin_uart1_device,
 718 #endif
 719 #endif
 720
 721 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 722 #ifdef CONFIG_BFIN_SIR0
 723         &bfin_sir0_device,
 724 #endif
 725 #ifdef CONFIG_BFIN_SIR1
 726         &bfin_sir1_device,
 727 #endif
 728 #endif
 729
 730 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 731         &i2c_bfin_twi_device,
 732 #endif
 733
 734 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 735         &bfin_i2s,
 736 #endif
 737
 738 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 739 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 740         &bfin_sport0_uart_device,
 741 #endif
 742 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 743         &bfin_sport1_uart_device,
 744 #endif
 745 #endif
 746
 747 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 748         &bfin_device_gpiokeys,
 749 #endif
 750
 751 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 752         &bf51x_sdh_device,
 753 #endif
 754
 755 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 756         &ezbrd_flash_device,
 757 #endif
 758 };
 759
 760 static int __init ezbrd_init(void)
 761 {
 762         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 763         i2c_register_board_info(0, bfin_i2c_board_info,
 764                                 ARRAY_SIZE(bfin_i2c_board_info));
 765         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 766         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 767         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 768         peripheral_request(P_AMS2, "ParaFlash");
 769 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 770         peripheral_request(P_AMS3, "ParaFlash");
 771 #endif
 772         return 0;
 773 }
 774
 775 arch_initcall(ezbrd_init);
 776
 777 static struct platform_device *ezbrd_early_devices[] __initdata = {
 778 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 779 #ifdef CONFIG_SERIAL_BFIN_UART0
 780         &bfin_uart0_device,
 781 #endif
 782 #ifdef CONFIG_SERIAL_BFIN_UART1
 783         &bfin_uart1_device,
 784 #endif
 785 #endif
 786
 787 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 788 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 789         &bfin_sport0_uart_device,
 790 #endif
 791 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 792         &bfin_sport1_uart_device,
 793 #endif
 794 #endif
 795 };
 796
 797 void __init native_machine_early_platform_add_devices(void)
 798 {
 799         printk(KERN_INFO "register early platform devices\n");
 800         early_platform_add_devices(ezbrd_early_devices,
 801                 ARRAY_SIZE(ezbrd_early_devices));
 802 }
 803
 804 void native_machine_restart(char *cmd)
 805 {
 806         /* workaround reboot hang when booting from SPI */
 807         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 808                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 809 }
 810
 811 void bfin_get_ether_addr(char *addr)
 812 {
 813         /* the MAC is stored in OTP memory page 0xDF */
 814         u32 ret;
 815         u64 otp_mac;
 816         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 817
 818         ret = otp_read(0xDF, 0x00, &otp_mac);
 819         if (!(ret & 0x1)) {
 820                 char *otp_mac_p = (char *)&otp_mac;
 821                 for (ret = 0; ret < 6; ++ret)
 822                         addr[ret] = otp_mac_p[5 - ret];
 823         }
 824 }
 825 EXPORT_SYMBOL(bfin_get_ether_addr);