arch/blackfin/kernel/setup.c

   1 /*
   2  * arch/blackfin/kernel/setup.c
   3  *
   4  * Copyright 2004-2006 Analog Devices Inc.
   5  *
   6  * Enter bugs at http://blackfin.uclinux.org/
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/delay.h>
  12 #include <linux/console.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/seq_file.h>
  15 #include <linux/cpu.h>
  16 #include <linux/mm.h>
  17 #include <linux/module.h>
  18 #include <linux/tty.h>
  19 #include <linux/pfn.h>
  20
  21 #include <linux/ext2_fs.h>
  22 #include <linux/cramfs_fs.h>
  23 #include <linux/romfs_fs.h>
  24
  25 #include <asm/cplb.h>
  26 #include <asm/cacheflush.h>
  27 #include <asm/blackfin.h>
  28 #include <asm/cplbinit.h>
  29 #include <asm/div64.h>
  30 #include <asm/cpu.h>
  31 #include <asm/fixed_code.h>
  32 #include <asm/early_printk.h>
  33
  34 u16 _bfin_swrst;
  35 EXPORT_SYMBOL(_bfin_swrst);
  36
  37 unsigned long memory_start, memory_end, physical_mem_end;
  38 unsigned long _rambase, _ramstart, _ramend;
  39 unsigned long reserved_mem_dcache_on;
  40 unsigned long reserved_mem_icache_on;
  41 EXPORT_SYMBOL(memory_start);
  42 EXPORT_SYMBOL(memory_end);
  43 EXPORT_SYMBOL(physical_mem_end);
  44 EXPORT_SYMBOL(_ramend);
  45 EXPORT_SYMBOL(reserved_mem_dcache_on);
  46
  47 #ifdef CONFIG_MTD_UCLINUX
  48 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  49 unsigned long _ebss;
  50 EXPORT_SYMBOL(memory_mtd_end);
  51 EXPORT_SYMBOL(memory_mtd_start);
  52 EXPORT_SYMBOL(mtd_size);
  53 #endif
  54
  55 char __initdata command_line[COMMAND_LINE_SIZE];
  56 void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  57         *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  58
  59 /* boot memmap, for parsing "memmap=" */
  60 #define BFIN_MEMMAP_MAX         128 /* number of entries in bfin_memmap */
  61 #define BFIN_MEMMAP_RAM         1
  62 #define BFIN_MEMMAP_RESERVED    2
  63 static struct bfin_memmap {
  64         int nr_map;
  65         struct bfin_memmap_entry {
  66                 unsigned long long addr; /* start of memory segment */
  67                 unsigned long long size;
  68                 unsigned long type;
  69         } map[BFIN_MEMMAP_MAX];
  70 } bfin_memmap __initdata;
  71
  72 /* for memmap sanitization */
  73 struct change_member {
  74         struct bfin_memmap_entry *pentry; /* pointer to original entry */
  75         unsigned long long addr; /* address for this change point */
  76 };
  77 static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  78 static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  79 static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  80 static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  81
  82 DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  83
  84 static int early_init_clkin_hz(char *buf);
  85
  86 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  87 void __init generate_cplb_tables(void)
  88 {
  89         unsigned int cpu;
  90
  91         generate_cplb_tables_all();
  92         /* Generate per-CPU I&D CPLB tables */
  93         for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  94                 generate_cplb_tables_cpu(cpu);
  95 }
  96 #endif
  97
  98 void __cpuinit bfin_setup_caches(unsigned int cpu)
  99 {
 100 #ifdef CONFIG_BFIN_ICACHE
 101         bfin_icache_init(icplb_tbl[cpu]);
 102 #endif
 103
 104 #ifdef CONFIG_BFIN_DCACHE
 105         bfin_dcache_init(dcplb_tbl[cpu]);
 106 #endif
 107
 108         /*
 109          * In cache coherence emulation mode, we need to have the
 110          * D-cache enabled before running any atomic operation which
 111          * might invove cache invalidation (i.e. spinlock, rwlock).
 112          * So printk's are deferred until then.
 113          */
 114 #ifdef CONFIG_BFIN_ICACHE
 115         printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
 116 #endif
 117 #ifdef CONFIG_BFIN_DCACHE
 118         printk(KERN_INFO "Data Cache Enabled for CPU%u"
 119 # if defined CONFIG_BFIN_WB
 120                 " (write-back)"
 121 # elif defined CONFIG_BFIN_WT
 122                 " (write-through)"
 123 # endif
 124                 "\n", cpu);
 125 #endif
 126 }
 127
 128 void __cpuinit bfin_setup_cpudata(unsigned int cpu)
 129 {
 130         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
 131
 132         cpudata->idle = current;
 133         cpudata->loops_per_jiffy = loops_per_jiffy;
 134         cpudata->imemctl = bfin_read_IMEM_CONTROL();
 135         cpudata->dmemctl = bfin_read_DMEM_CONTROL();
 136 }
 137
 138 void __init bfin_cache_init(void)
 139 {
 140 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
 141         generate_cplb_tables();
 142 #endif
 143         bfin_setup_caches(0);
 144 }
 145
 146 void __init bfin_relocate_l1_mem(void)
 147 {
 148         unsigned long l1_code_length;
 149         unsigned long l1_data_a_length;
 150         unsigned long l1_data_b_length;
 151         unsigned long l2_length;
 152
 153         blackfin_dma_early_init();
 154
 155         l1_code_length = _etext_l1 - _stext_l1;
 156         if (l1_code_length > L1_CODE_LENGTH)
 157                 panic("L1 Instruction SRAM Overflow\n");
 158         /* cannot complain as printk is not available as yet.
 159          * But we can continue booting and complain later!
 160          */
 161
 162         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 163         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 164
 165         l1_data_a_length = _sbss_l1 - _sdata_l1;
 166         if (l1_data_a_length > L1_DATA_A_LENGTH)
 167                 panic("L1 Data SRAM Bank A Overflow\n");
 168
 169         /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
 170         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 171
 172         l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
 173         if (l1_data_b_length > L1_DATA_B_LENGTH)
 174                 panic("L1 Data SRAM Bank B Overflow\n");
 175
 176         /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
 177         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 178                         l1_data_a_length, l1_data_b_length);
 179
 180         if (L2_LENGTH != 0) {
 181                 l2_length = _sbss_l2 - _stext_l2;
 182                 if (l2_length > L2_LENGTH)
 183                         panic("L2 SRAM Overflow\n");
 184
 185                 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
 186                 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
 187         }
 188 }
 189
 190 /* add_memory_region to memmap */
 191 static void __init add_memory_region(unsigned long long start,
 192                               unsigned long long size, int type)
 193 {
 194         int i;
 195
 196         i = bfin_memmap.nr_map;
 197
 198         if (i == BFIN_MEMMAP_MAX) {
 199                 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
 200                 return;
 201         }
 202
 203         bfin_memmap.map[i].addr = start;
 204         bfin_memmap.map[i].size = size;
 205         bfin_memmap.map[i].type = type;
 206         bfin_memmap.nr_map++;
 207 }
 208
 209 /*
 210  * Sanitize the boot memmap, removing overlaps.
 211  */
 212 static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
 213 {
 214         struct change_member *change_tmp;
 215         unsigned long current_type, last_type;
 216         unsigned long long last_addr;
 217         int chgidx, still_changing;
 218         int overlap_entries;
 219         int new_entry;
 220         int old_nr, new_nr, chg_nr;
 221         int i;
 222
 223         /*
 224                 Visually we're performing the following (1,2,3,4 = memory types)
 225
 226                 Sample memory map (w/overlaps):
 227                    ____22__________________
 228                    ______________________4_
 229                    ____1111________________
 230                    _44_____________________
 231                    11111111________________
 232                    ____________________33__
 233                    ___________44___________
 234                    __________33333_________
 235                    ______________22________
 236                    ___________________2222_
 237                    _________111111111______
 238                    _____________________11_
 239                    _________________4______
 240
 241                 Sanitized equivalent (no overlap):
 242                    1_______________________
 243                    _44_____________________
 244                    ___1____________________
 245                    ____22__________________
 246                    ______11________________
 247                    _________1______________
 248                    __________3_____________
 249                    ___________44___________
 250                    _____________33_________
 251                    _______________2________
 252                    ________________1_______
 253                    _________________4______
 254                    ___________________2____
 255                    ____________________33__
 256                    ______________________4_
 257         */
 258         /* if there's only one memory region, don't bother */
 259         if (*pnr_map < 2)
 260                 return -1;
 261
 262         old_nr = *pnr_map;
 263
 264         /* bail out if we find any unreasonable addresses in memmap */
 265         for (i = 0; i < old_nr; i++)
 266                 if (map[i].addr + map[i].size < map[i].addr)
 267                         return -1;
 268
 269         /* create pointers for initial change-point information (for sorting) */
 270         for (i = 0; i < 2*old_nr; i++)
 271                 change_point[i] = &change_point_list[i];
 272
 273         /* record all known change-points (starting and ending addresses),
 274            omitting those that are for empty memory regions */
 275         chgidx = 0;
 276         for (i = 0; i < old_nr; i++) {
 277                 if (map[i].size != 0) {
 278                         change_point[chgidx]->addr = map[i].addr;
 279                         change_point[chgidx++]->pentry = &map[i];
 280                         change_point[chgidx]->addr = map[i].addr + map[i].size;
 281                         change_point[chgidx++]->pentry = &map[i];
 282                 }
 283         }
 284         chg_nr = chgidx;        /* true number of change-points */
 285
 286         /* sort change-point list by memory addresses (low -> high) */
 287         still_changing = 1;
 288         while (still_changing) {
 289                 still_changing = 0;
 290                 for (i = 1; i < chg_nr; i++) {
 291                         /* if <current_addr> > <last_addr>, swap */
 292                         /* or, if current=<start_addr> & last=<end_addr>, swap */
 293                         if ((change_point[i]->addr < change_point[i-1]->addr) ||
 294                                 ((change_point[i]->addr == change_point[i-1]->addr) &&
 295                                  (change_point[i]->addr == change_point[i]->pentry->addr) &&
 296                                  (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
 297                            ) {
 298                                 change_tmp = change_point[i];
 299                                 change_point[i] = change_point[i-1];
 300                                 change_point[i-1] = change_tmp;
 301                                 still_changing = 1;
 302                         }
 303                 }
 304         }
 305
 306         /* create a new memmap, removing overlaps */
 307         overlap_entries = 0;    /* number of entries in the overlap table */
 308         new_entry = 0;          /* index for creating new memmap entries */
 309         last_type = 0;          /* start with undefined memory type */
 310         last_addr = 0;          /* start with 0 as last starting address */
 311         /* loop through change-points, determining affect on the new memmap */
 312         for (chgidx = 0; chgidx < chg_nr; chgidx++) {
 313                 /* keep track of all overlapping memmap entries */
 314                 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
 315                         /* add map entry to overlap list (> 1 entry implies an overlap) */
 316                         overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
 317                 } else {
 318                         /* remove entry from list (order independent, so swap with last) */
 319                         for (i = 0; i < overlap_entries; i++) {
 320                                 if (overlap_list[i] == change_point[chgidx]->pentry)
 321                                         overlap_list[i] = overlap_list[overlap_entries-1];
 322                         }
 323                         overlap_entries--;
 324                 }
 325                 /* if there are overlapping entries, decide which "type" to use */
 326                 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
 327                 current_type = 0;
 328                 for (i = 0; i < overlap_entries; i++)
 329                         if (overlap_list[i]->type > current_type)
 330                                 current_type = overlap_list[i]->type;
 331                 /* continue building up new memmap based on this information */
 332                 if (current_type != last_type) {
 333                         if (last_type != 0) {
 334                                 new_map[new_entry].size =
 335                                         change_point[chgidx]->addr - last_addr;
 336                                 /* move forward only if the new size was non-zero */
 337                                 if (new_map[new_entry].size != 0)
 338                                         if (++new_entry >= BFIN_MEMMAP_MAX)
 339                                                 break;  /* no more space left for new entries */
 340                         }
 341                         if (current_type != 0) {
 342                                 new_map[new_entry].addr = change_point[chgidx]->addr;
 343                                 new_map[new_entry].type = current_type;
 344                                 last_addr = change_point[chgidx]->addr;
 345                         }
 346                         last_type = current_type;
 347                 }
 348         }
 349         new_nr = new_entry;     /* retain count for new entries */
 350
 351         /* copy new mapping into original location */
 352         memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
 353         *pnr_map = new_nr;
 354
 355         return 0;
 356 }
 357
 358 static void __init print_memory_map(char *who)
 359 {
 360         int i;
 361
 362         for (i = 0; i < bfin_memmap.nr_map; i++) {
 363                 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
 364                         bfin_memmap.map[i].addr,
 365                         bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
 366                 switch (bfin_memmap.map[i].type) {
 367                 case BFIN_MEMMAP_RAM:
 368                                 printk("(usable)\n");
 369                                 break;
 370                 case BFIN_MEMMAP_RESERVED:
 371                                 printk("(reserved)\n");
 372                                 break;
 373                 default:        printk("type %lu\n", bfin_memmap.map[i].type);
 374                                 break;
 375                 }
 376         }
 377 }
 378
 379 static __init int parse_memmap(char *arg)
 380 {
 381         unsigned long long start_at, mem_size;
 382
 383         if (!arg)
 384                 return -EINVAL;
 385
 386         mem_size = memparse(arg, &arg);
 387         if (*arg == '@') {
 388                 start_at = memparse(arg+1, &arg);
 389                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
 390         } else if (*arg == '$') {
 391                 start_at = memparse(arg+1, &arg);
 392                 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
 393         }
 394
 395         return 0;
 396 }
 397
 398 /*
 399  * Initial parsing of the command line.  Currently, we support:
 400  *  - Controlling the linux memory size: mem=xxx[KMG]
 401  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 402  *       $ -> reserved memory is dcacheable
 403  *       # -> reserved memory is icacheable
 404  *  - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
 405  *       @ from <start> to <start>+<mem>, type RAM
 406  *       $ from <start> to <start>+<mem>, type RESERVED
 407  */
 408 static __init void parse_cmdline_early(char *cmdline_p)
 409 {
 410         char c = ' ', *to = cmdline_p;
 411         unsigned int memsize;
 412         for (;;) {
 413                 if (c == ' ') {
 414                         if (!memcmp(to, "mem=", 4)) {
 415                                 to += 4;
 416                                 memsize = memparse(to, &to);
 417                                 if (memsize)
 418                                         _ramend = memsize;
 419
 420                         } else if (!memcmp(to, "max_mem=", 8)) {
 421                                 to += 8;
 422                                 memsize = memparse(to, &to);
 423                                 if (memsize) {
 424                                         physical_mem_end = memsize;
 425                                         if (*to != ' ') {
 426                                                 if (*to == '$'
 427                                                     || *(to + 1) == '$')
 428                                                         reserved_mem_dcache_on = 1;
 429                                                 if (*to == '#'
 430                                                     || *(to + 1) == '#')
 431                                                         reserved_mem_icache_on = 1;
 432                                         }
 433                                 }
 434                         } else if (!memcmp(to, "clkin_hz=", 9)) {
 435                                 to += 9;
 436                                 early_init_clkin_hz(to);
 437                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 438                                 to += 12;
 439                                 setup_early_printk(to);
 440                         } else if (!memcmp(to, "memmap=", 7)) {
 441                                 to += 7;
 442                                 parse_memmap(to);
 443                         }
 444                 }
 445                 c = *(to++);
 446                 if (!c)
 447                         break;
 448         }
 449 }
 450
 451 /*
 452  * Setup memory defaults from user config.
 453  * The physical memory layout looks like:
 454  *
 455  *  [_rambase, _ramstart]:              kernel image
 456  *  [memory_start, memory_end]:         dynamic memory managed by kernel
 457  *  [memory_end, _ramend]:              reserved memory
 458  *      [memory_mtd_start(memory_end),
 459  *              memory_mtd_start + mtd_size]:   rootfs (if any)
 460  *      [_ramend - DMA_UNCACHED_REGION,
 461  *              _ramend]:                       uncached DMA region
 462  *  [_ramend, physical_mem_end]:        memory not managed by kernel
 463  */
 464 static __init void memory_setup(void)
 465 {
 466 #ifdef CONFIG_MTD_UCLINUX
 467         unsigned long mtd_phys = 0;
 468 #endif
 469
 470         _rambase = (unsigned long)_stext;
 471         _ramstart = (unsigned long)_end;
 472
 473         if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
 474                 console_init();
 475                 panic("DMA region exceeds memory limit: %lu.\n",
 476                         _ramend - _ramstart);
 477         }
 478         memory_end = _ramend - DMA_UNCACHED_REGION;
 479
 480 #ifdef CONFIG_MPU
 481         /* Round up to multiple of 4MB */
 482         memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
 483 #else
 484         memory_start = PAGE_ALIGN(_ramstart);
 485 #endif
 486
 487 #if defined(CONFIG_MTD_UCLINUX)
 488         /* generic memory mapped MTD driver */
 489         memory_mtd_end = memory_end;
 490
 491         mtd_phys = _ramstart;
 492         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 493
 494 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 495         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 496                 mtd_size =
 497                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 498 # endif
 499
 500 # if defined(CONFIG_CRAMFS)
 501         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 502                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 503 # endif
 504
 505 # if defined(CONFIG_ROMFS_FS)
 506         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 507             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 508                 mtd_size =
 509                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 510 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 511         /* Due to a Hardware Anomaly we need to limit the size of usable
 512          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 513          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 514          */
 515 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 516         if (memory_end >= 56 * 1024 * 1024)
 517                 memory_end = 56 * 1024 * 1024;
 518 #   else
 519         if (memory_end >= 60 * 1024 * 1024)
 520                 memory_end = 60 * 1024 * 1024;
 521 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 522 #  endif                                /* ANOMALY_05000263 */
 523 # endif                         /* CONFIG_ROMFS_FS */
 524
 525         memory_end -= mtd_size;
 526
 527         if (mtd_size == 0) {
 528                 console_init();
 529                 panic("Don't boot kernel without rootfs attached.\n");
 530         }
 531
 532         /* Relocate MTD image to the top of memory after the uncached memory area */
 533         dma_memcpy((char *)memory_end, _end, mtd_size);
 534
 535         memory_mtd_start = memory_end;
 536         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 537 #endif                          /* CONFIG_MTD_UCLINUX */
 538
 539 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 540         /* Due to a Hardware Anomaly we need to limit the size of usable
 541          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 542          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 543          */
 544 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 545         if (memory_end >= 56 * 1024 * 1024)
 546                 memory_end = 56 * 1024 * 1024;
 547 #else
 548         if (memory_end >= 60 * 1024 * 1024)
 549                 memory_end = 60 * 1024 * 1024;
 550 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 551         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 552 #endif                          /* ANOMALY_05000263 */
 553
 554 #ifdef CONFIG_MPU
 555         page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
 556         page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
 557 #endif
 558
 559 #if !defined(CONFIG_MTD_UCLINUX)
 560         /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 561         memory_end -= SIZE_4K;
 562 #endif
 563
 564         init_mm.start_code = (unsigned long)_stext;
 565         init_mm.end_code = (unsigned long)_etext;
 566         init_mm.end_data = (unsigned long)_edata;
 567         init_mm.brk = (unsigned long)0;
 568
 569         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 570         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 571
 572         printk(KERN_INFO "Memory map:\n"
 573                 KERN_INFO "  fixedcode = 0x%p-0x%p\n"
 574                 KERN_INFO "  text      = 0x%p-0x%p\n"
 575                 KERN_INFO "  rodata    = 0x%p-0x%p\n"
 576                 KERN_INFO "  bss       = 0x%p-0x%p\n"
 577                 KERN_INFO "  data      = 0x%p-0x%p\n"
 578                 KERN_INFO "    stack   = 0x%p-0x%p\n"
 579                 KERN_INFO "  init      = 0x%p-0x%p\n"
 580                 KERN_INFO "  available = 0x%p-0x%p\n"
 581 #ifdef CONFIG_MTD_UCLINUX
 582                 KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 583 #endif
 584 #if DMA_UNCACHED_REGION > 0
 585                 KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 586 #endif
 587                 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
 588                 _stext, _etext,
 589                 __start_rodata, __end_rodata,
 590                 __bss_start, __bss_stop,
 591                 _sdata, _edata,
 592                 (void *)&init_thread_union,
 593                 (void *)((int)(&init_thread_union) + 0x2000),
 594                 __init_begin, __init_end,
 595                 (void *)_ramstart, (void *)memory_end
 596 #ifdef CONFIG_MTD_UCLINUX
 597                 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 598 #endif
 599 #if DMA_UNCACHED_REGION > 0
 600                 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 601 #endif
 602                 );
 603 }
 604
 605 /*
 606  * Find the lowest, highest page frame number we have available
 607  */
 608 void __init find_min_max_pfn(void)
 609 {
 610         int i;
 611
 612         max_pfn = 0;
 613         min_low_pfn = memory_end;
 614
 615         for (i = 0; i < bfin_memmap.nr_map; i++) {
 616                 unsigned long start, end;
 617                 /* RAM? */
 618                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 619                         continue;
 620                 start = PFN_UP(bfin_memmap.map[i].addr);
 621                 end = PFN_DOWN(bfin_memmap.map[i].addr +
 622                                 bfin_memmap.map[i].size);
 623                 if (start >= end)
 624                         continue;
 625                 if (end > max_pfn)
 626                         max_pfn = end;
 627                 if (start < min_low_pfn)
 628                         min_low_pfn = start;
 629         }
 630 }
 631
 632 static __init void setup_bootmem_allocator(void)
 633 {
 634         int bootmap_size;
 635         int i;
 636         unsigned long start_pfn, end_pfn;
 637         unsigned long curr_pfn, last_pfn, size;
 638
 639         /* mark memory between memory_start and memory_end usable */
 640         add_memory_region(memory_start,
 641                 memory_end - memory_start, BFIN_MEMMAP_RAM);
 642         /* sanity check for overlap */
 643         sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
 644         print_memory_map("boot memmap");
 645
 646         /* intialize globals in linux/bootmem.h */
 647         find_min_max_pfn();
 648         /* pfn of the last usable page frame */
 649         if (max_pfn > memory_end >> PAGE_SHIFT)
 650                 max_pfn = memory_end >> PAGE_SHIFT;
 651         /* pfn of last page frame directly mapped by kernel */
 652         max_low_pfn = max_pfn;
 653         /* pfn of the first usable page frame after kernel image*/
 654         if (min_low_pfn < memory_start >> PAGE_SHIFT)
 655                 min_low_pfn = memory_start >> PAGE_SHIFT;
 656
 657         start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
 658         end_pfn = memory_end >> PAGE_SHIFT;
 659
 660         /*
 661          * give all the memory to the bootmap allocator, tell it to put the
 662          * boot mem_map at the start of memory.
 663          */
 664         bootmap_size = init_bootmem_node(NODE_DATA(0),
 665                         memory_start >> PAGE_SHIFT,     /* map goes here */
 666                         start_pfn, end_pfn);
 667
 668         /* register the memmap regions with the bootmem allocator */
 669         for (i = 0; i < bfin_memmap.nr_map; i++) {
 670                 /*
 671                  * Reserve usable memory
 672                  */
 673                 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
 674                         continue;
 675                 /*
 676                  * We are rounding up the start address of usable memory:
 677                  */
 678                 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
 679                 if (curr_pfn >= end_pfn)
 680                         continue;
 681                 /*
 682                  * ... and at the end of the usable range downwards:
 683                  */
 684                 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
 685                                          bfin_memmap.map[i].size);
 686
 687                 if (last_pfn > end_pfn)
 688                         last_pfn = end_pfn;
 689
 690                 /*
 691                  * .. finally, did all the rounding and playing
 692                  * around just make the area go away?
 693                  */
 694                 if (last_pfn <= curr_pfn)
 695                         continue;
 696
 697                 size = last_pfn - curr_pfn;
 698                 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
 699         }
 700
 701         /* reserve memory before memory_start, including bootmap */
 702         reserve_bootmem(PAGE_OFFSET,
 703                 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
 704                 BOOTMEM_DEFAULT);
 705 }
 706
 707 #define EBSZ_TO_MEG(ebsz) \
 708 ({ \
 709         int meg = 0; \
 710         switch (ebsz & 0xf) { \
 711                 case 0x1: meg =  16; break; \
 712                 case 0x3: meg =  32; break; \
 713                 case 0x5: meg =  64; break; \
 714                 case 0x7: meg = 128; break; \
 715                 case 0x9: meg = 256; break; \
 716                 case 0xb: meg = 512; break; \
 717         } \
 718         meg; \
 719 })
 720 static inline int __init get_mem_size(void)
 721 {
 722 #if defined(EBIU_SDBCTL)
 723 # if defined(BF561_FAMILY)
 724         int ret = 0;
 725         u32 sdbctl = bfin_read_EBIU_SDBCTL();
 726         ret += EBSZ_TO_MEG(sdbctl >>  0);
 727         ret += EBSZ_TO_MEG(sdbctl >>  8);
 728         ret += EBSZ_TO_MEG(sdbctl >> 16);
 729         ret += EBSZ_TO_MEG(sdbctl >> 24);
 730         return ret;
 731 # else
 732         return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
 733 # endif
 734 #elif defined(EBIU_DDRCTL1)
 735         u32 ddrctl = bfin_read_EBIU_DDRCTL1();
 736         int ret = 0;
 737         switch (ddrctl & 0xc0000) {
 738                 case DEVSZ_64:  ret = 64 / 8;
 739                 case DEVSZ_128: ret = 128 / 8;
 740                 case DEVSZ_256: ret = 256 / 8;
 741                 case DEVSZ_512: ret = 512 / 8;
 742         }
 743         switch (ddrctl & 0x30000) {
 744                 case DEVWD_4:  ret *= 2;
 745                 case DEVWD_8:  ret *= 2;
 746                 case DEVWD_16: break;
 747         }
 748         if ((ddrctl & 0xc000) == 0x4000)
 749                 ret *= 2;
 750         return ret;
 751 #endif
 752         BUG();
 753 }
 754
 755 void __init setup_arch(char **cmdline_p)
 756 {
 757         unsigned long sclk, cclk;
 758
 759 #ifdef CONFIG_DUMMY_CONSOLE
 760         conswitchp = &dummy_con;
 761 #endif
 762
 763 #if defined(CONFIG_CMDLINE_BOOL)
 764         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 765         command_line[sizeof(command_line) - 1] = 0;
 766 #endif
 767
 768         /* Keep a copy of command line */
 769         *cmdline_p = &command_line[0];
 770         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 771         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 772
 773         /* setup memory defaults from the user config */
 774         physical_mem_end = 0;
 775         _ramend = get_mem_size() * 1024 * 1024;
 776
 777         memset(&bfin_memmap, 0, sizeof(bfin_memmap));
 778
 779         parse_cmdline_early(&command_line[0]);
 780
 781         if (physical_mem_end == 0)
 782                 physical_mem_end = _ramend;
 783
 784         memory_setup();
 785
 786         /* Initialize Async memory banks */
 787         bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
 788         bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
 789         bfin_write_EBIU_AMGCTL(AMGCTLVAL);
 790 #ifdef CONFIG_EBIU_MBSCTLVAL
 791         bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
 792         bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
 793         bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
 794 #endif
 795
 796         cclk = get_cclk();
 797         sclk = get_sclk();
 798
 799 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 800         if (ANOMALY_05000273 && cclk == sclk)
 801                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 802 #endif
 803
 804 #ifdef BF561_FAMILY
 805         if (ANOMALY_05000266) {
 806                 bfin_read_IMDMA_D0_IRQ_STATUS();
 807                 bfin_read_IMDMA_D1_IRQ_STATUS();
 808         }
 809 #endif
 810         printk(KERN_INFO "Hardware Trace ");
 811         if (bfin_read_TBUFCTL() & 0x1)
 812                 printk("Active ");
 813         else
 814                 printk("Off ");
 815         if (bfin_read_TBUFCTL() & 0x2)
 816                 printk("and Enabled\n");
 817         else
 818         printk("and Disabled\n");
 819
 820 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 821         /* we need to initialize the Flashrom device here since we might
 822          * do things with flash early on in the boot
 823          */
 824         flash_probe();
 825 #endif
 826
 827         printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
 828
 829         /* Newer parts mirror SWRST bits in SYSCR */
 830 #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
 831     defined(CONFIG_BF538) || defined(CONFIG_BF539)
 832         _bfin_swrst = bfin_read_SWRST();
 833 #else
 834         _bfin_swrst = bfin_read_SYSCR();
 835 #endif
 836
 837 #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
 838         bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
 839 #endif
 840 #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
 841         bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
 842 #endif
 843
 844 #ifdef CONFIG_SMP
 845         if (_bfin_swrst & SWRST_DBL_FAULT_A) {
 846 #else
 847         if (_bfin_swrst & RESET_DOUBLE) {
 848 #endif
 849                 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
 850 #ifdef CONFIG_DEBUG_DOUBLEFAULT
 851                 /* We assume the crashing kernel, and the current symbol table match */
 852                 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
 853                         (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
 854                 printk(KERN_NOTICE "   DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
 855                 printk(KERN_NOTICE "   ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
 856 #endif
 857                 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
 858                         init_retx);
 859         } else if (_bfin_swrst & RESET_WDOG)
 860                 printk(KERN_INFO "Recovering from Watchdog event\n");
 861         else if (_bfin_swrst & RESET_SOFTWARE)
 862                 printk(KERN_NOTICE "Reset caused by Software reset\n");
 863
 864         printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
 865         if (bfin_compiled_revid() == 0xffff)
 866                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 867         else if (bfin_compiled_revid() == -1)
 868                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 869         else
 870                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 871
 872         if (unlikely(CPUID != bfin_cpuid()))
 873                 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
 874                         CPU, bfin_cpuid(), bfin_revid());
 875         else {
 876                 if (bfin_revid() != bfin_compiled_revid()) {
 877                         if (bfin_compiled_revid() == -1)
 878                                 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 879                                        bfin_revid());
 880                         else if (bfin_compiled_revid() != 0xffff) {
 881                                 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 882                                        bfin_compiled_revid(), bfin_revid());
 883                                 if (bfin_compiled_revid() > bfin_revid())
 884                                         panic("Error: you are missing anomaly workarounds for this rev\n");
 885                         }
 886                 }
 887                 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
 888                         printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 889                                CPU, bfin_revid());
 890         }
 891
 892         /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
 893         if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
 894                 panic("You can't run on this processor due to 05000448\n");
 895
 896         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 897
 898         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 899                cclk / 1000000, sclk / 1000000);
 900
 901         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 902                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 903
 904         setup_bootmem_allocator();
 905
 906         paging_init();
 907
 908         /* Copy atomic sequences to their fixed location, and sanity check that
 909            these locations are the ones that we advertise to userspace.  */
 910         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 911                FIXED_CODE_END - FIXED_CODE_START);
 912         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 913                != SIGRETURN_STUB - FIXED_CODE_START);
 914         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 915                != ATOMIC_XCHG32 - FIXED_CODE_START);
 916         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 917                != ATOMIC_CAS32 - FIXED_CODE_START);
 918         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 919                != ATOMIC_ADD32 - FIXED_CODE_START);
 920         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 921                != ATOMIC_SUB32 - FIXED_CODE_START);
 922         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 923                != ATOMIC_IOR32 - FIXED_CODE_START);
 924         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 925                != ATOMIC_AND32 - FIXED_CODE_START);
 926         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 927                != ATOMIC_XOR32 - FIXED_CODE_START);
 928         BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
 929                 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
 930
 931 #ifdef CONFIG_SMP
 932         platform_init_cpus();
 933 #endif
 934         init_exception_vectors();
 935         bfin_cache_init();      /* Initialize caches for the boot CPU */
 936 }
 937
 938 static int __init topology_init(void)
 939 {
 940         unsigned int cpu;
 941         /* Record CPU-private information for the boot processor. */
 942         bfin_setup_cpudata(0);
 943
 944         for_each_possible_cpu(cpu) {
 945                 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
 946         }
 947
 948         return 0;
 949 }
 950
 951 subsys_initcall(topology_init);
 952
 953 /* Get the input clock frequency */
 954 static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
 955 static u_long get_clkin_hz(void)
 956 {
 957         return cached_clkin_hz;
 958 }
 959 static int __init early_init_clkin_hz(char *buf)
 960 {
 961         cached_clkin_hz = simple_strtoul(buf, NULL, 0);
 962 #ifdef BFIN_KERNEL_CLOCK
 963         if (cached_clkin_hz != CONFIG_CLKIN_HZ)
 964                 panic("cannot change clkin_hz when reprogramming clocks");
 965 #endif
 966         return 1;
 967 }
 968 early_param("clkin_hz=", early_init_clkin_hz);
 969
 970 /* Get the voltage input multiplier */
 971 static u_long get_vco(void)
 972 {
 973         static u_long cached_vco;
 974         u_long msel, pll_ctl;
 975
 976         /* The assumption here is that VCO never changes at runtime.
 977          * If, someday, we support that, then we'll have to change this.
 978          */
 979         if (cached_vco)
 980                 return cached_vco;
 981
 982         pll_ctl = bfin_read_PLL_CTL();
 983         msel = (pll_ctl >> 9) & 0x3F;
 984         if (0 == msel)
 985                 msel = 64;
 986
 987         cached_vco = get_clkin_hz();
 988         cached_vco >>= (1 & pll_ctl);   /* DF bit */
 989         cached_vco *= msel;
 990         return cached_vco;
 991 }
 992
 993 /* Get the Core clock */
 994 u_long get_cclk(void)
 995 {
 996         static u_long cached_cclk_pll_div, cached_cclk;
 997         u_long csel, ssel;
 998
 999         if (bfin_read_PLL_STAT() & 0x1)
1000                 return get_clkin_hz();
1001
1002         ssel = bfin_read_PLL_DIV();
1003         if (ssel == cached_cclk_pll_div)
1004                 return cached_cclk;
1005         else
1006                 cached_cclk_pll_div = ssel;
1007
1008         csel = ((ssel >> 4) & 0x03);
1009         ssel &= 0xf;
1010         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
1011                 cached_cclk = get_vco() / ssel;
1012         else
1013                 cached_cclk = get_vco() >> csel;
1014         return cached_cclk;
1015 }
1016 EXPORT_SYMBOL(get_cclk);
1017
1018 /* Get the System clock */
1019 u_long get_sclk(void)
1020 {
1021         static u_long cached_sclk;
1022         u_long ssel;
1023
1024         /* The assumption here is that SCLK never changes at runtime.
1025          * If, someday, we support that, then we'll have to change this.
1026          */
1027         if (cached_sclk)
1028                 return cached_sclk;
1029
1030         if (bfin_read_PLL_STAT() & 0x1)
1031                 return get_clkin_hz();
1032
1033         ssel = bfin_read_PLL_DIV() & 0xf;
1034         if (0 == ssel) {
1035                 printk(KERN_WARNING "Invalid System Clock\n");
1036                 ssel = 1;
1037         }
1038
1039         cached_sclk = get_vco() / ssel;
1040         return cached_sclk;
1041 }
1042 EXPORT_SYMBOL(get_sclk);
1043
1044 unsigned long sclk_to_usecs(unsigned long sclk)
1045 {
1046         u64 tmp = USEC_PER_SEC * (u64)sclk;
1047         do_div(tmp, get_sclk());
1048         return tmp;
1049 }
1050 EXPORT_SYMBOL(sclk_to_usecs);
1051
1052 unsigned long usecs_to_sclk(unsigned long usecs)
1053 {
1054         u64 tmp = get_sclk() * (u64)usecs;
1055         do_div(tmp, USEC_PER_SEC);
1056         return tmp;
1057 }
1058 EXPORT_SYMBOL(usecs_to_sclk);
1059
1060 /*
1061  *      Get CPU information for use by the procfs.
1062  */
1063 static int show_cpuinfo(struct seq_file *m, void *v)
1064 {
1065         char *cpu, *mmu, *fpu, *vendor, *cache;
1066         uint32_t revid;
1067         int cpu_num = *(unsigned int *)v;
1068         u_long sclk, cclk;
1069         u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
1070         struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
1071
1072         cpu = CPU;
1073         mmu = "none";
1074         fpu = "none";
1075         revid = bfin_revid();
1076
1077         sclk = get_sclk();
1078         cclk = get_cclk();
1079
1080         switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
1081         case 0xca:
1082                 vendor = "Analog Devices";
1083                 break;
1084         default:
1085                 vendor = "unknown";
1086                 break;
1087         }
1088
1089         seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
1090
1091         if (CPUID == bfin_cpuid())
1092                 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1093         else
1094                 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1095                         CPUID, bfin_cpuid());
1096
1097         seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1098                 "stepping\t: %d\n",
1099                 cpu, cclk/1000000, sclk/1000000,
1100 #ifdef CONFIG_MPU
1101                 "mpu on",
1102 #else
1103                 "mpu off",
1104 #endif
1105                 revid);
1106
1107         seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
1108                 cclk/1000000, cclk%1000000,
1109                 sclk/1000000, sclk%1000000);
1110         seq_printf(m, "bogomips\t: %lu.%02lu\n"
1111                 "Calibration\t: %lu loops\n",
1112                 (cpudata->loops_per_jiffy * HZ) / 500000,
1113                 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1114                 (cpudata->loops_per_jiffy * HZ));
1115
1116         /* Check Cache configutation */
1117         switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
1118         case ACACHE_BSRAM:
1119                 cache = "dbank-A/B\t: cache/sram";
1120                 dcache_size = 16;
1121                 dsup_banks = 1;
1122                 break;
1123         case ACACHE_BCACHE:
1124                 cache = "dbank-A/B\t: cache/cache";
1125                 dcache_size = 32;
1126                 dsup_banks = 2;
1127                 break;
1128         case ASRAM_BSRAM:
1129                 cache = "dbank-A/B\t: sram/sram";
1130                 dcache_size = 0;
1131                 dsup_banks = 0;
1132                 break;
1133         default:
1134                 cache = "unknown";
1135                 dcache_size = 0;
1136                 dsup_banks = 0;
1137                 break;
1138         }
1139
1140         /* Is it turned on? */
1141         if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
1142                 dcache_size = 0;
1143
1144         if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
1145                 icache_size = 0;
1146
1147         seq_printf(m, "cache size\t: %d KB(L1 icache) "
1148                 "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
1149                 icache_size, dcache_size,
1150 #if defined CONFIG_BFIN_WB
1151                 "-wb"
1152 #elif defined CONFIG_BFIN_WT
1153                 "-wt"
1154 #endif
1155                 "", 0);
1156
1157         seq_printf(m, "%s\n", cache);
1158
1159         if (icache_size)
1160                 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1161                            BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1162         else
1163                 seq_printf(m, "icache setup\t: off\n");
1164
1165         seq_printf(m,
1166                    "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
1167                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1168                    BFIN_DLINES);
1169 #ifdef __ARCH_SYNC_CORE_DCACHE
1170         seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
1171 #endif
1172 #ifdef CONFIG_BFIN_ICACHE_LOCK
1173         switch ((cpudata->imemctl >> 3) & WAYALL_L) {
1174         case WAY0_L:
1175                 seq_printf(m, "Way0 Locked-Down\n");
1176                 break;
1177         case WAY1_L:
1178                 seq_printf(m, "Way1 Locked-Down\n");
1179                 break;
1180         case WAY01_L:
1181                 seq_printf(m, "Way0,Way1 Locked-Down\n");
1182                 break;
1183         case WAY2_L:
1184                 seq_printf(m, "Way2 Locked-Down\n");
1185                 break;
1186         case WAY02_L:
1187                 seq_printf(m, "Way0,Way2 Locked-Down\n");
1188                 break;
1189         case WAY12_L:
1190                 seq_printf(m, "Way1,Way2 Locked-Down\n");
1191                 break;
1192         case WAY012_L:
1193                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1194                 break;
1195         case WAY3_L:
1196                 seq_printf(m, "Way3 Locked-Down\n");
1197                 break;
1198         case WAY03_L:
1199                 seq_printf(m, "Way0,Way3 Locked-Down\n");
1200                 break;
1201         case WAY13_L:
1202                 seq_printf(m, "Way1,Way3 Locked-Down\n");
1203                 break;
1204         case WAY013_L:
1205                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1206                 break;
1207         case WAY32_L:
1208                 seq_printf(m, "Way3,Way2 Locked-Down\n");
1209                 break;
1210         case WAY320_L:
1211                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1212                 break;
1213         case WAY321_L:
1214                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1215                 break;
1216         case WAYALL_L:
1217                 seq_printf(m, "All Ways are locked\n");
1218                 break;
1219         default:
1220                 seq_printf(m, "No Ways are locked\n");
1221         }
1222 #endif
1223
1224         if (cpu_num != num_possible_cpus() - 1)
1225                 return 0;
1226
1227         if (L2_LENGTH)
1228                 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
1229         seq_printf(m, "board name\t: %s\n", bfin_board_name);
1230         seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1231                  physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1232         seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1233                 ((int)memory_end - (int)_stext) >> 10,
1234                 _stext,
1235                 (void *)memory_end);
1236         seq_printf(m, "\n");
1237
1238         return 0;
1239 }
1240
1241 static void *c_start(struct seq_file *m, loff_t *pos)
1242 {
1243         if (*pos == 0)
1244                 *pos = first_cpu(cpu_online_map);
1245         if (*pos >= num_online_cpus())
1246                 return NULL;
1247
1248         return pos;
1249 }
1250
1251 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1252 {
1253         *pos = next_cpu(*pos, cpu_online_map);
1254
1255         return c_start(m, pos);
1256 }
1257
1258 static void c_stop(struct seq_file *m, void *v)
1259 {
1260 }
1261
1262 const struct seq_operations cpuinfo_op = {
1263         .start = c_start,
1264         .next = c_next,
1265         .stop = c_stop,
1266         .show = show_cpuinfo,
1267 };
1268
1269 void __init cmdline_init(const char *r0)
1270 {
1271         if (r0)
1272                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
1273 }