arch/arm/plat-s3c24xx/gpiolib.c

   1 /* linux/arch/arm/plat-s3c24xx/gpiolib.c
   2  *
   3  * Copyright (c) 2008-2010 Simtec Electronics
   4  *      http://armlinux.simtec.co.uk/
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *
   7  * S3C24XX GPIOlib support
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License.
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/ioport.h>
  20 #include <linux/io.h>
  21 #include <linux/gpio.h>
  22
  23 #include <plat/gpio-core.h>
  24 #include <plat/gpio-cfg.h>
  25 #include <plat/gpio-cfg-helpers.h>
  26 #include <mach/hardware.h>
  27 #include <asm/irq.h>
  28 #include <plat/pm.h>
  29
  30 #include <mach/regs-gpio.h>
  31
  32 static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
  33 {
  34         return -EINVAL;
  35 }
  36
  37 static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
  38                                         unsigned offset, int value)
  39 {
  40         struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
  41         void __iomem *base = ourchip->base;
  42         unsigned long flags;
  43         unsigned long dat;
  44         unsigned long con;
  45
  46         local_irq_save(flags);
  47
  48         con = __raw_readl(base + 0x00);
  49         dat = __raw_readl(base + 0x04);
  50
  51         dat &= ~(1 << offset);
  52         if (value)
  53                 dat |= 1 << offset;
  54
  55         __raw_writel(dat, base + 0x04);
  56
  57         con &= ~(1 << offset);
  58
  59         __raw_writel(con, base + 0x00);
  60         __raw_writel(dat, base + 0x04);
  61
  62         local_irq_restore(flags);
  63         return 0;
  64 }
  65
  66 static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
  67 {
  68         if (offset < 4)
  69                 return IRQ_EINT0 + offset;
  70
  71         if (offset < 8)
  72                 return IRQ_EINT4 + offset - 4;
  73
  74         return -EINVAL;
  75 }
  76
  77 static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
  78         .set_config     = s3c_gpio_setcfg_s3c24xx_a,
  79         .get_config     = s3c_gpio_getcfg_s3c24xx_a,
  80 };
  81
  82 struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
  83         .set_config     = s3c_gpio_setcfg_s3c24xx,
  84         .get_config     = s3c_gpio_getcfg_s3c24xx,
  85         .set_pull       = s3c_gpio_setpull_1up,
  86         .get_pull       = s3c_gpio_getpull_1up,
  87 };
  88
  89 struct s3c_gpio_chip s3c24xx_gpios[] = {
  90         [0] = {
  91                 .base   = S3C2410_GPACON,
  92                 .pm     = __gpio_pm(&s3c_gpio_pm_1bit),
  93                 .config = &s3c24xx_gpiocfg_banka,
  94                 .chip   = {
  95                         .base                   = S3C2410_GPA(0),
  96                         .owner                  = THIS_MODULE,
  97                         .label                  = "GPIOA",
  98                         .ngpio                  = 24,
  99                         .direction_input        = s3c24xx_gpiolib_banka_input,
 100                         .direction_output       = s3c24xx_gpiolib_banka_output,
 101                 },
 102         },
 103         [1] = {
 104                 .base   = S3C2410_GPBCON,
 105                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 106                 .chip   = {
 107                         .base                   = S3C2410_GPB(0),
 108                         .owner                  = THIS_MODULE,
 109                         .label                  = "GPIOB",
 110                         .ngpio                  = 16,
 111                 },
 112         },
 113         [2] = {
 114                 .base   = S3C2410_GPCCON,
 115                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 116                 .chip   = {
 117                         .base                   = S3C2410_GPC(0),
 118                         .owner                  = THIS_MODULE,
 119                         .label                  = "GPIOC",
 120                         .ngpio                  = 16,
 121                 },
 122         },
 123         [3] = {
 124                 .base   = S3C2410_GPDCON,
 125                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 126                 .chip   = {
 127                         .base                   = S3C2410_GPD(0),
 128                         .owner                  = THIS_MODULE,
 129                         .label                  = "GPIOD",
 130                         .ngpio                  = 16,
 131                 },
 132         },
 133         [4] = {
 134                 .base   = S3C2410_GPECON,
 135                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 136                 .chip   = {
 137                         .base                   = S3C2410_GPE(0),
 138                         .label                  = "GPIOE",
 139                         .owner                  = THIS_MODULE,
 140                         .ngpio                  = 16,
 141                 },
 142         },
 143         [5] = {
 144                 .base   = S3C2410_GPFCON,
 145                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 146                 .chip   = {
 147                         .base                   = S3C2410_GPF(0),
 148                         .owner                  = THIS_MODULE,
 149                         .label                  = "GPIOF",
 150                         .ngpio                  = 8,
 151                         .to_irq                 = s3c24xx_gpiolib_bankf_toirq,
 152                 },
 153         },
 154         [6] = {
 155                 .base   = S3C2410_GPGCON,
 156                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 157                 .irq_base = IRQ_EINT8,
 158                 .chip   = {
 159                         .base                   = S3C2410_GPG(0),
 160                         .owner                  = THIS_MODULE,
 161                         .label                  = "GPIOG",
 162                         .ngpio                  = 16,
 163                         .to_irq                 = samsung_gpiolib_to_irq,
 164                 },
 165         }, {
 166                 .base   = S3C2410_GPHCON,
 167                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 168                 .chip   = {
 169                         .base                   = S3C2410_GPH(0),
 170                         .owner                  = THIS_MODULE,
 171                         .label                  = "GPIOH",
 172                         .ngpio                  = 11,
 173                 },
 174         },
 175                 /* GPIOS for the S3C2443 and later devices. */
 176         {
 177                 .base   = S3C2440_GPJCON,
 178                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 179                 .chip   = {
 180                         .base                   = S3C2410_GPJ(0),
 181                         .owner                  = THIS_MODULE,
 182                         .label                  = "GPIOJ",
 183                         .ngpio                  = 16,
 184                 },
 185         }, {
 186                 .base   = S3C2443_GPKCON,
 187                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 188                 .chip   = {
 189                         .base                   = S3C2410_GPK(0),
 190                         .owner                  = THIS_MODULE,
 191                         .label                  = "GPIOK",
 192                         .ngpio                  = 16,
 193                 },
 194         }, {
 195                 .base   = S3C2443_GPLCON,
 196                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 197                 .chip   = {
 198                         .base                   = S3C2410_GPL(0),
 199                         .owner                  = THIS_MODULE,
 200                         .label                  = "GPIOL",
 201                         .ngpio                  = 15,
 202                 },
 203         }, {
 204                 .base   = S3C2443_GPMCON,
 205                 .pm     = __gpio_pm(&s3c_gpio_pm_2bit),
 206                 .chip   = {
 207                         .base                   = S3C2410_GPM(0),
 208                         .owner                  = THIS_MODULE,
 209                         .label                  = "GPIOM",
 210                         .ngpio                  = 2,
 211                 },
 212         },
 213 };
 214
 215
 216 static __init int s3c24xx_gpiolib_init(void)
 217 {
 218         struct s3c_gpio_chip *chip = s3c24xx_gpios;
 219         int gpn;
 220
 221         for (gpn = 0; gpn < ARRAY_SIZE(s3c24xx_gpios); gpn++, chip++) {
 222                 if (!chip->config)
 223                         chip->config = &s3c24xx_gpiocfg_default;
 224
 225                 s3c_gpiolib_add(chip);
 226         }
 227
 228         return 0;
 229 }
 230
 231 core_initcall(s3c24xx_gpiolib_init);