arch/arm/plat-omap/usb.c

   1  /*
   2  * arch/arm/plat-omap/usb.c -- platform level USB initialization
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #undef  DEBUG
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/usb/otg.h>
  30 #include <linux/io.h>
  31
  32 #include <asm/irq.h>
  33 #include <asm/system.h>
  34 #include <mach/hardware.h>
  35
  36 #include <mach/control.h>
  37 #include <mach/mux.h>
  38 #include <mach/usb.h>
  39 #include <mach/board.h>
  40
  41 #ifdef CONFIG_ARCH_OMAP1
  42
  43 #define INT_USB_IRQ_GEN         IH2_BASE + 20
  44 #define INT_USB_IRQ_NISO        IH2_BASE + 30
  45 #define INT_USB_IRQ_ISO         IH2_BASE + 29
  46 #define INT_USB_IRQ_HGEN        INT_USB_HHC_1
  47 #define INT_USB_IRQ_OTG         IH2_BASE + 8
  48
  49 #else
  50
  51 #define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
  52 #define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
  53 #define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
  54 #define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
  55 #define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
  56
  57 #endif
  58
  59
  60 /* These routines should handle the standard chip-specific modes
  61  * for usb0/1/2 ports, covering basic mux and transceiver setup.
  62  *
  63  * Some board-*.c files will need to set up additional mux options,
  64  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  65  */
  66
  67 /* TESTED ON:
  68  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  69  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  70  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
  71  *  - 1510 Innovator UDC with bundled usb0 cable
  72  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
  73  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  74  *  - 1710 custom development board using alternate pin group
  75  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  76  */
  77
  78 /*-------------------------------------------------------------------------*/
  79
  80 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
  81
  82 static void omap2_usb_devconf_clear(u8 port, u32 mask)
  83 {
  84         u32 r;
  85
  86         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  87         r &= ~USBTXWRMODEI(port, mask);
  88         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  89 }
  90
  91 static void omap2_usb_devconf_set(u8 port, u32 mask)
  92 {
  93         u32 r;
  94
  95         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  96         r |= USBTXWRMODEI(port, mask);
  97         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  98 }
  99
 100 static void omap2_usb2_disable_5pinbitll(void)
 101 {
 102         u32 r;
 103
 104         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 105         r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
 106         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 107 }
 108
 109 static void omap2_usb2_enable_5pinunitll(void)
 110 {
 111         u32 r;
 112
 113         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 114         r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
 115         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 116 }
 117
 118 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 119 {
 120         u32     syscon1 = 0;
 121
 122         if (cpu_is_omap24xx())
 123                 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
 124
 125         if (nwires == 0) {
 126                 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
 127                         u32 l;
 128
 129                         /* pulldown D+/D- */
 130                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 131                         l &= ~(3 << 1);
 132                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 133                 }
 134                 return 0;
 135         }
 136
 137         if (is_device) {
 138                 if (cpu_is_omap24xx())
 139                         omap_cfg_reg(J20_24XX_USB0_PUEN);
 140                 else
 141                         omap_cfg_reg(W4_USB_PUEN);
 142         }
 143
 144         /* internal transceiver (unavailable on 17xx, 24xx) */
 145         if (!cpu_class_is_omap2() && nwires == 2) {
 146                 u32 l;
 147
 148                 // omap_cfg_reg(P9_USB_DP);
 149                 // omap_cfg_reg(R8_USB_DM);
 150
 151                 if (cpu_is_omap15xx()) {
 152                         /* This works on 1510-Innovator */
 153                         return 0;
 154                 }
 155
 156                 /* NOTES:
 157                  *  - peripheral should configure VBUS detection!
 158                  *  - only peripherals may use the internal D+/D- pulldowns
 159                  *  - OTG support on this port not yet written
 160                  */
 161
 162                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 163                 l &= ~(7 << 4);
 164                 if (!is_device)
 165                         l |= (3 << 1);
 166                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 167
 168                 return 3 << 16;
 169         }
 170
 171         /* alternate pin config, external transceiver */
 172         if (cpu_is_omap15xx()) {
 173                 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
 174                 return 0;
 175         }
 176
 177         if (cpu_is_omap24xx()) {
 178                 omap_cfg_reg(K18_24XX_USB0_DAT);
 179                 omap_cfg_reg(K19_24XX_USB0_TXEN);
 180                 omap_cfg_reg(J14_24XX_USB0_SE0);
 181                 if (nwires != 3)
 182                         omap_cfg_reg(J18_24XX_USB0_RCV);
 183         } else {
 184                 omap_cfg_reg(V6_USB0_TXD);
 185                 omap_cfg_reg(W9_USB0_TXEN);
 186                 omap_cfg_reg(W5_USB0_SE0);
 187                 if (nwires != 3)
 188                         omap_cfg_reg(Y5_USB0_RCV);
 189         }
 190
 191         /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
 192          * may be able to use I2C requests to set those bits along
 193          * with VBUS switching and overcurrent detection.
 194          */
 195
 196         if (cpu_class_is_omap1() && nwires != 6) {
 197                 u32 l;
 198
 199                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 200                 l &= ~CONF_USB2_UNI_R;
 201                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 202         }
 203
 204         switch (nwires) {
 205         case 3:
 206                 syscon1 = 2;
 207                 if (cpu_is_omap24xx())
 208                         omap2_usb_devconf_set(0, USB_BIDIR);
 209                 break;
 210         case 4:
 211                 syscon1 = 1;
 212                 if (cpu_is_omap24xx())
 213                         omap2_usb_devconf_set(0, USB_BIDIR);
 214                 break;
 215         case 6:
 216                 syscon1 = 3;
 217                 if (cpu_is_omap24xx()) {
 218                         omap_cfg_reg(J19_24XX_USB0_VP);
 219                         omap_cfg_reg(K20_24XX_USB0_VM);
 220                         omap2_usb_devconf_set(0, USB_UNIDIR);
 221                 } else {
 222                         u32 l;
 223
 224                         omap_cfg_reg(AA9_USB0_VP);
 225                         omap_cfg_reg(R9_USB0_VM);
 226                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 227                         l |= CONF_USB2_UNI_R;
 228                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 229                 }
 230                 break;
 231         default:
 232                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 233                         0, nwires);
 234         }
 235         return syscon1 << 16;
 236 }
 237
 238 static u32 __init omap_usb1_init(unsigned nwires)
 239 {
 240         u32     syscon1 = 0;
 241
 242         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 243                 u32 l;
 244
 245                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 246                 l &= ~CONF_USB1_UNI_R;
 247                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 248         }
 249         if (cpu_is_omap24xx())
 250                 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
 251
 252         if (nwires == 0)
 253                 return 0;
 254
 255         /* external transceiver */
 256         if (cpu_class_is_omap1()) {
 257                 omap_cfg_reg(USB1_TXD);
 258                 omap_cfg_reg(USB1_TXEN);
 259                 if (nwires != 3)
 260                         omap_cfg_reg(USB1_RCV);
 261         }
 262
 263         if (cpu_is_omap15xx()) {
 264                 omap_cfg_reg(USB1_SEO);
 265                 omap_cfg_reg(USB1_SPEED);
 266                 // SUSP
 267         } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
 268                 omap_cfg_reg(W13_1610_USB1_SE0);
 269                 omap_cfg_reg(R13_1610_USB1_SPEED);
 270                 // SUSP
 271         } else if (cpu_is_omap1710()) {
 272                 omap_cfg_reg(R13_1710_USB1_SE0);
 273                 // SUSP
 274         } else if (cpu_is_omap24xx()) {
 275                 /* NOTE:  board-specific code must set up pin muxing for usb1,
 276                  * since each signal could come out on either of two balls.
 277                  */
 278         } else {
 279                 pr_debug("usb%d cpu unrecognized\n", 1);
 280                 return 0;
 281         }
 282
 283         switch (nwires) {
 284         case 2:
 285                 if (!cpu_is_omap24xx())
 286                         goto bad;
 287                 /* NOTE: board-specific code must override this setting if
 288                  * this TLL link is not using DP/DM
 289                  */
 290                 syscon1 = 1;
 291                 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
 292                 break;
 293         case 3:
 294                 syscon1 = 2;
 295                 if (cpu_is_omap24xx())
 296                         omap2_usb_devconf_set(1, USB_BIDIR);
 297                 break;
 298         case 4:
 299                 syscon1 = 1;
 300                 if (cpu_is_omap24xx())
 301                         omap2_usb_devconf_set(1, USB_BIDIR);
 302                 break;
 303         case 6:
 304                 if (cpu_is_omap24xx())
 305                         goto bad;
 306                 syscon1 = 3;
 307                 omap_cfg_reg(USB1_VP);
 308                 omap_cfg_reg(USB1_VM);
 309                 if (!cpu_is_omap15xx()) {
 310                         u32 l;
 311
 312                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 313                         l |= CONF_USB1_UNI_R;
 314                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 315                 }
 316                 break;
 317         default:
 318 bad:
 319                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 320                         1, nwires);
 321         }
 322         return syscon1 << 20;
 323 }
 324
 325 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 326 {
 327         u32     syscon1 = 0;
 328
 329         if (cpu_is_omap24xx()) {
 330                 omap2_usb2_disable_5pinbitll();
 331                 alt_pingroup = 0;
 332         }
 333
 334         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 335         if (alt_pingroup || nwires == 0)
 336                 return 0;
 337
 338         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 339                 u32 l;
 340
 341                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 342                 l &= ~CONF_USB2_UNI_R;
 343                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 344         }
 345
 346         /* external transceiver */
 347         if (cpu_is_omap15xx()) {
 348                 omap_cfg_reg(USB2_TXD);
 349                 omap_cfg_reg(USB2_TXEN);
 350                 omap_cfg_reg(USB2_SEO);
 351                 if (nwires != 3)
 352                         omap_cfg_reg(USB2_RCV);
 353                 /* there is no USB2_SPEED */
 354         } else if (cpu_is_omap16xx()) {
 355                 omap_cfg_reg(V6_USB2_TXD);
 356                 omap_cfg_reg(W9_USB2_TXEN);
 357                 omap_cfg_reg(W5_USB2_SE0);
 358                 if (nwires != 3)
 359                         omap_cfg_reg(Y5_USB2_RCV);
 360                 // FIXME omap_cfg_reg(USB2_SPEED);
 361         } else if (cpu_is_omap24xx()) {
 362                 omap_cfg_reg(Y11_24XX_USB2_DAT);
 363                 omap_cfg_reg(AA10_24XX_USB2_SE0);
 364                 if (nwires > 2)
 365                         omap_cfg_reg(AA12_24XX_USB2_TXEN);
 366                 if (nwires > 3)
 367                         omap_cfg_reg(AA6_24XX_USB2_RCV);
 368         } else {
 369                 pr_debug("usb%d cpu unrecognized\n", 1);
 370                 return 0;
 371         }
 372         // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
 373
 374         switch (nwires) {
 375         case 2:
 376                 if (!cpu_is_omap24xx())
 377                         goto bad;
 378                 /* NOTE: board-specific code must override this setting if
 379                  * this TLL link is not using DP/DM
 380                  */
 381                 syscon1 = 1;
 382                 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
 383                 break;
 384         case 3:
 385                 syscon1 = 2;
 386                 if (cpu_is_omap24xx())
 387                         omap2_usb_devconf_set(2, USB_BIDIR);
 388                 break;
 389         case 4:
 390                 syscon1 = 1;
 391                 if (cpu_is_omap24xx())
 392                         omap2_usb_devconf_set(2, USB_BIDIR);
 393                 break;
 394         case 5:
 395                 if (!cpu_is_omap24xx())
 396                         goto bad;
 397                 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
 398                 /* NOTE: board-specific code must override this setting if
 399                  * this TLL link is not using DP/DM.  Something must also
 400                  * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
 401                  */
 402                 syscon1 = 3;
 403                 omap2_usb2_enable_5pinunitll();
 404                 break;
 405         case 6:
 406                 if (cpu_is_omap24xx())
 407                         goto bad;
 408                 syscon1 = 3;
 409                 if (cpu_is_omap15xx()) {
 410                         omap_cfg_reg(USB2_VP);
 411                         omap_cfg_reg(USB2_VM);
 412                 } else {
 413                         u32 l;
 414
 415                         omap_cfg_reg(AA9_USB2_VP);
 416                         omap_cfg_reg(R9_USB2_VM);
 417                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 418                         l |= CONF_USB2_UNI_R;
 419                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 420                 }
 421                 break;
 422         default:
 423 bad:
 424                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 425                         2, nwires);
 426         }
 427         return syscon1 << 24;
 428 }
 429
 430 #endif
 431
 432 /*-------------------------------------------------------------------------*/
 433
 434 #ifdef  CONFIG_USB_GADGET_OMAP
 435
 436 static struct resource udc_resources[] = {
 437         /* order is significant! */
 438         {               /* registers */
 439                 .start          = UDC_BASE,
 440                 .end            = UDC_BASE + 0xff,
 441                 .flags          = IORESOURCE_MEM,
 442         }, {            /* general IRQ */
 443                 .start          = INT_USB_IRQ_GEN,
 444                 .flags          = IORESOURCE_IRQ,
 445         }, {            /* PIO IRQ */
 446                 .start          = INT_USB_IRQ_NISO,
 447                 .flags          = IORESOURCE_IRQ,
 448         }, {            /* SOF IRQ */
 449                 .start          = INT_USB_IRQ_ISO,
 450                 .flags          = IORESOURCE_IRQ,
 451         },
 452 };
 453
 454 static u64 udc_dmamask = ~(u32)0;
 455
 456 static struct platform_device udc_device = {
 457         .name           = "omap_udc",
 458         .id             = -1,
 459         .dev = {
 460                 .dma_mask               = &udc_dmamask,
 461                 .coherent_dma_mask      = 0xffffffff,
 462         },
 463         .num_resources  = ARRAY_SIZE(udc_resources),
 464         .resource       = udc_resources,
 465 };
 466
 467 #endif
 468
 469 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 470
 471 /* The dmamask must be set for OHCI to work */
 472 static u64 ohci_dmamask = ~(u32)0;
 473
 474 static struct resource ohci_resources[] = {
 475         {
 476                 .start  = OMAP_OHCI_BASE,
 477                 .end    = OMAP_OHCI_BASE + 0xff,
 478                 .flags  = IORESOURCE_MEM,
 479         },
 480         {
 481                 .start  = INT_USB_IRQ_HGEN,
 482                 .flags  = IORESOURCE_IRQ,
 483         },
 484 };
 485
 486 static struct platform_device ohci_device = {
 487         .name                   = "ohci",
 488         .id                     = -1,
 489         .dev = {
 490                 .dma_mask               = &ohci_dmamask,
 491                 .coherent_dma_mask      = 0xffffffff,
 492         },
 493         .num_resources  = ARRAY_SIZE(ohci_resources),
 494         .resource               = ohci_resources,
 495 };
 496
 497 #endif
 498
 499 #if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
 500
 501 static struct resource otg_resources[] = {
 502         /* order is significant! */
 503         {
 504                 .start          = OTG_BASE,
 505                 .end            = OTG_BASE + 0xff,
 506                 .flags          = IORESOURCE_MEM,
 507         }, {
 508                 .start          = INT_USB_IRQ_OTG,
 509                 .flags          = IORESOURCE_IRQ,
 510         },
 511 };
 512
 513 static struct platform_device otg_device = {
 514         .name           = "omap_otg",
 515         .id             = -1,
 516         .num_resources  = ARRAY_SIZE(otg_resources),
 517         .resource       = otg_resources,
 518 };
 519
 520 #endif
 521
 522 /*-------------------------------------------------------------------------*/
 523
 524 // FIXME correct answer depends on hmc_mode,
 525 // as does (on omap1) any nonzero value for config->otg port number
 526 #ifdef  CONFIG_USB_GADGET_OMAP
 527 #define is_usb0_device(config)  1
 528 #else
 529 #define is_usb0_device(config)  0
 530 #endif
 531
 532 /*-------------------------------------------------------------------------*/
 533
 534 #ifdef  CONFIG_ARCH_OMAP_OTG
 535
 536 void __init
 537 omap_otg_init(struct omap_usb_config *config)
 538 {
 539         u32             syscon;
 540         int             status;
 541         int             alt_pingroup = 0;
 542
 543         /* NOTE:  no bus or clock setup (yet?) */
 544
 545         syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
 546         if (!(syscon & OTG_RESET_DONE))
 547                 pr_debug("USB resets not complete?\n");
 548
 549         //omap_writew(0, OTG_IRQ_EN);
 550
 551         /* pin muxing and transceiver pinouts */
 552         if (config->pins[0] > 2)        /* alt pingroup 2 */
 553                 alt_pingroup = 1;
 554         syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
 555         syscon |= omap_usb1_init(config->pins[1]);
 556         syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
 557         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 558         omap_writel(syscon, OTG_SYSCON_1);
 559
 560         syscon = config->hmc_mode;
 561         syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
 562 #ifdef  CONFIG_USB_OTG
 563         if (config->otg)
 564                 syscon |= OTG_EN;
 565 #endif
 566         if (cpu_class_is_omap1())
 567                 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
 568                          omap_readl(USB_TRANSCEIVER_CTRL));
 569         pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
 570         omap_writel(syscon, OTG_SYSCON_2);
 571
 572         printk("USB: hmc %d", config->hmc_mode);
 573         if (!alt_pingroup)
 574                 printk(", usb2 alt %d wires", config->pins[2]);
 575         else if (config->pins[0])
 576                 printk(", usb0 %d wires%s", config->pins[0],
 577                         is_usb0_device(config) ? " (dev)" : "");
 578         if (config->pins[1])
 579                 printk(", usb1 %d wires", config->pins[1]);
 580         if (!alt_pingroup && config->pins[2])
 581                 printk(", usb2 %d wires", config->pins[2]);
 582         if (config->otg)
 583                 printk(", Mini-AB on usb%d", config->otg - 1);
 584         printk("\n");
 585
 586         if (cpu_class_is_omap1()) {
 587                 u16 w;
 588
 589                 /* leave USB clocks/controllers off until needed */
 590                 w = omap_readw(ULPD_SOFT_REQ);
 591                 w &= ~SOFT_USB_CLK_REQ;
 592                 omap_writew(w, ULPD_SOFT_REQ);
 593
 594                 w = omap_readw(ULPD_CLOCK_CTRL);
 595                 w &= ~USB_MCLK_EN;
 596                 w |= DIS_USB_PVCI_CLK;
 597                 omap_writew(w, ULPD_CLOCK_CTRL);
 598         }
 599         syscon = omap_readl(OTG_SYSCON_1);
 600         syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
 601
 602 #ifdef  CONFIG_USB_GADGET_OMAP
 603         if (config->otg || config->register_dev) {
 604                 syscon &= ~DEV_IDLE_EN;
 605                 udc_device.dev.platform_data = config;
 606                 /* FIXME patch IRQ numbers for omap730 */
 607                 status = platform_device_register(&udc_device);
 608                 if (status)
 609                         pr_debug("can't register UDC device, %d\n", status);
 610         }
 611 #endif
 612
 613 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 614         if (config->otg || config->register_host) {
 615                 syscon &= ~HST_IDLE_EN;
 616                 ohci_device.dev.platform_data = config;
 617                 if (cpu_is_omap730())
 618                         ohci_resources[1].start = INT_730_USB_HHC_1;
 619                 status = platform_device_register(&ohci_device);
 620                 if (status)
 621                         pr_debug("can't register OHCI device, %d\n", status);
 622         }
 623 #endif
 624
 625 #ifdef  CONFIG_USB_OTG
 626         if (config->otg) {
 627                 syscon &= ~OTG_IDLE_EN;
 628                 otg_device.dev.platform_data = config;
 629                 if (cpu_is_omap730())
 630                         otg_resources[1].start = INT_730_USB_OTG;
 631                 status = platform_device_register(&otg_device);
 632                 if (status)
 633                         pr_debug("can't register OTG device, %d\n", status);
 634         }
 635 #endif
 636         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 637         omap_writel(syscon, OTG_SYSCON_1);
 638
 639         status = 0;
 640 }
 641
 642 #else
 643 static inline void omap_otg_init(struct omap_usb_config *config) {}
 644 #endif
 645
 646 /*-------------------------------------------------------------------------*/
 647
 648 #ifdef  CONFIG_ARCH_OMAP15XX
 649
 650 /* ULPD_DPLL_CTRL */
 651 #define DPLL_IOB                (1 << 13)
 652 #define DPLL_PLL_ENABLE         (1 << 4)
 653 #define DPLL_LOCK               (1 << 0)
 654
 655 /* ULPD_APLL_CTRL */
 656 #define APLL_NDPLL_SWITCH       (1 << 0)
 657
 658
 659 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 660 {
 661         unsigned int val;
 662         u16 w;
 663
 664         omap_usb0_init(config->pins[0], is_usb0_device(config));
 665         omap_usb1_init(config->pins[1]);
 666         omap_usb2_init(config->pins[2], 0);
 667
 668         val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
 669         val |= (config->hmc_mode << 1);
 670         omap_writel(val, MOD_CONF_CTRL_0);
 671
 672         printk("USB: hmc %d", config->hmc_mode);
 673         if (config->pins[0])
 674                 printk(", usb0 %d wires%s", config->pins[0],
 675                         is_usb0_device(config) ? " (dev)" : "");
 676         if (config->pins[1])
 677                 printk(", usb1 %d wires", config->pins[1]);
 678         if (config->pins[2])
 679                 printk(", usb2 %d wires", config->pins[2]);
 680         printk("\n");
 681
 682         /* use DPLL for 48 MHz function clock */
 683         pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
 684                         omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
 685
 686         w = omap_readw(ULPD_APLL_CTRL);
 687         w &= ~APLL_NDPLL_SWITCH;
 688         omap_writew(w, ULPD_APLL_CTRL);
 689
 690         w = omap_readw(ULPD_DPLL_CTRL);
 691         w |= DPLL_IOB | DPLL_PLL_ENABLE;
 692         omap_writew(w, ULPD_DPLL_CTRL);
 693
 694         w = omap_readw(ULPD_SOFT_REQ);
 695         w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
 696         omap_writew(w, ULPD_SOFT_REQ);
 697
 698         while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
 699                 cpu_relax();
 700
 701 #ifdef  CONFIG_USB_GADGET_OMAP
 702         if (config->register_dev) {
 703                 int status;
 704
 705                 udc_device.dev.platform_data = config;
 706                 status = platform_device_register(&udc_device);
 707                 if (status)
 708                         pr_debug("can't register UDC device, %d\n", status);
 709                 /* udc driver gates 48MHz by D+ pullup */
 710         }
 711 #endif
 712
 713 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 714         if (config->register_host) {
 715                 int status;
 716
 717                 ohci_device.dev.platform_data = config;
 718                 status = platform_device_register(&ohci_device);
 719                 if (status)
 720                         pr_debug("can't register OHCI device, %d\n", status);
 721                 /* hcd explicitly gates 48MHz */
 722         }
 723 #endif
 724 }
 725
 726 #else
 727 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
 728 #endif
 729
 730 /*-------------------------------------------------------------------------*/
 731
 732 void __init omap_usb_init(struct omap_usb_config *pdata)
 733 {
 734         if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
 735                 omap_otg_init(pdata);
 736         else if (cpu_is_omap15xx())
 737                 omap_1510_usb_init(pdata);
 738         else
 739                 printk(KERN_ERR "USB: No init for your chip yet\n");
 740 }
 741