Pull acpi_bus_register_driver into release branch
[pandora-kernel.git] / arch / arm / plat-omap / sram.c
1 /*
2  * linux/arch/arm/plat-omap/sram.c
3  *
4  * OMAP SRAM detection and management
5  *
6  * Copyright (C) 2005 Nokia Corporation
7  * Written by Tony Lindgren <tony@atomide.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/config.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18
19 #include <asm/tlb.h>
20 #include <asm/io.h>
21 #include <asm/cacheflush.h>
22
23 #include <asm/mach/map.h>
24
25 #include <asm/arch/sram.h>
26 #include <asm/arch/board.h>
27
28 #define OMAP1_SRAM_PA           0x20000000
29 #define OMAP1_SRAM_VA           0xd0000000
30 #define OMAP2_SRAM_PA           0x40200000
31 #define OMAP2_SRAM_PUB_PA       0x4020f800
32 #define OMAP2_SRAM_VA           0xd0000000
33 #define OMAP2_SRAM_PUB_VA       0xd0000800
34
35 #if defined(CONFIG_ARCH_OMAP24XX)
36 #define SRAM_BOOTLOADER_SZ      0x00
37 #else
38 #define SRAM_BOOTLOADER_SZ      0x80
39 #endif
40
41 #define VA_REQINFOPERM0         IO_ADDRESS(0x68005048)
42 #define VA_READPERM0            IO_ADDRESS(0x68005050)
43 #define VA_WRITEPERM0           IO_ADDRESS(0x68005058)
44 #define VA_CONTROL_STAT         IO_ADDRESS(0x480002F8)
45 #define GP_DEVICE               0x300
46 #define TYPE_MASK               0x700
47
48 #define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
49
50 static unsigned long omap_sram_base;
51 static unsigned long omap_sram_size;
52 static unsigned long omap_sram_ceil;
53
54 unsigned long omap_fb_sram_start;
55 unsigned long omap_fb_sram_size;
56
57 /* Depending on the target RAMFS firewall setup, the public usable amount of
58  * SRAM varies.  The default accessable size for all device types is 2k. A GP
59  * device allows ARM11 but not other initators for full size. This
60  * functionality seems ok until some nice security API happens.
61  */
62 static int is_sram_locked(void)
63 {
64         int type = 0;
65
66         if (cpu_is_omap242x())
67                 type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
68
69         if (type == GP_DEVICE) {
70                 /* RAMFW: R/W access to all initators for all qualifier sets */
71                 if (cpu_is_omap242x()) {
72                         __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
73                         __raw_writel(0xCFDE, VA_READPERM0);  /* all i-read */
74                         __raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
75                 }
76                 return 0;
77         } else
78                 return 1; /* assume locked with no PPA or security driver */
79 }
80
81 void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail,
82                       unsigned long *start, unsigned long *size)
83 {
84         const struct omap_fbmem_config *fbmem_conf;
85
86         fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config);
87         if (fbmem_conf != NULL) {
88                 *start = fbmem_conf->fb_sram_start;
89                 *size = fbmem_conf->fb_sram_size;
90         } else {
91                 *size = 0;
92                 *start = 0;
93         }
94
95         if (*size && (
96             *start < start_avail ||
97             *start + *size > start_avail + size_avail)) {
98                 printk(KERN_ERR "invalid FB SRAM configuration\n");
99                 *start = start_avail;
100                 *size = size_avail;
101         }
102
103         if (*size)
104                 pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size);
105 }
106
107 /*
108  * The amount of SRAM depends on the core type.
109  * Note that we cannot try to test for SRAM here because writes
110  * to secure SRAM will hang the system. Also the SRAM is not
111  * yet mapped at this point.
112  */
113 void __init omap_detect_sram(void)
114 {
115         unsigned long sram_start;
116
117         if (cpu_is_omap24xx()) {
118                 if (is_sram_locked()) {
119                         omap_sram_base = OMAP2_SRAM_PUB_VA;
120                         sram_start = OMAP2_SRAM_PUB_PA;
121                         omap_sram_size = 0x800; /* 2K */
122                 } else {
123                         omap_sram_base = OMAP2_SRAM_VA;
124                         sram_start = OMAP2_SRAM_PA;
125                         if (cpu_is_omap242x())
126                                 omap_sram_size = 0xa0000; /* 640K */
127                         else if (cpu_is_omap243x())
128                                 omap_sram_size = 0x10000; /* 64K */
129                 }
130         } else {
131                 omap_sram_base = OMAP1_SRAM_VA;
132                 sram_start = OMAP1_SRAM_PA;
133
134                 if (cpu_is_omap730())
135                         omap_sram_size = 0x32000;       /* 200K */
136                 else if (cpu_is_omap15xx())
137                         omap_sram_size = 0x30000;       /* 192K */
138                 else if (cpu_is_omap1610() || cpu_is_omap1621() ||
139                      cpu_is_omap1710())
140                         omap_sram_size = 0x4000;        /* 16K */
141                 else if (cpu_is_omap1611())
142                         omap_sram_size = 0x3e800;       /* 250K */
143                 else {
144                         printk(KERN_ERR "Could not detect SRAM size\n");
145                         omap_sram_size = 0x4000;
146                 }
147         }
148         get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ,
149                          omap_sram_size - SRAM_BOOTLOADER_SZ,
150                          &omap_fb_sram_start, &omap_fb_sram_size);
151         if (omap_fb_sram_size)
152                 omap_sram_size -= sram_start + omap_sram_size -
153                                   omap_fb_sram_start;
154         omap_sram_ceil = omap_sram_base + omap_sram_size;
155 }
156
157 static struct map_desc omap_sram_io_desc[] __initdata = {
158         {       /* .length gets filled in at runtime */
159                 .virtual        = OMAP1_SRAM_VA,
160                 .pfn            = __phys_to_pfn(OMAP1_SRAM_PA),
161                 .type           = MT_DEVICE
162         }
163 };
164
165 /*
166  * In order to use last 2kB of SRAM on 1611b, we must round the size
167  * up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
168  * clock init needs SRAM early.
169  */
170 void __init omap_map_sram(void)
171 {
172         unsigned long base;
173
174         if (omap_sram_size == 0)
175                 return;
176
177         if (cpu_is_omap24xx()) {
178                 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
179
180                 if (is_sram_locked())
181                         base = OMAP2_SRAM_PUB_PA;
182                 else
183                         base = OMAP2_SRAM_PA;
184                 base = ROUND_DOWN(base, PAGE_SIZE);
185                 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
186         }
187
188         omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
189         omap_sram_io_desc[0].length *= PAGE_SIZE;
190         iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
191
192         printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
193         __pfn_to_phys(omap_sram_io_desc[0].pfn),
194         omap_sram_io_desc[0].virtual,
195                omap_sram_io_desc[0].length);
196
197         /*
198          * Normally devicemaps_init() would flush caches and tlb after
199          * mdesc->map_io(), but since we're called from map_io(), we
200          * must do it here.
201          */
202         local_flush_tlb_all();
203         flush_cache_all();
204
205         /*
206          * Looks like we need to preserve some bootloader code at the
207          * beginning of SRAM for jumping to flash for reboot to work...
208          */
209         memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
210                omap_sram_size - SRAM_BOOTLOADER_SZ);
211 }
212
213 void * omap_sram_push(void * start, unsigned long size)
214 {
215         if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
216                 printk(KERN_ERR "Not enough space in SRAM\n");
217                 return NULL;
218         }
219
220         omap_sram_ceil -= size;
221         omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
222         memcpy((void *)omap_sram_ceil, start, size);
223
224         return (void *)omap_sram_ceil;
225 }
226
227 static void omap_sram_error(void)
228 {
229         panic("Uninitialized SRAM function\n");
230 }
231
232 #ifdef CONFIG_ARCH_OMAP1
233
234 static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
235
236 void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
237 {
238         if (!_omap_sram_reprogram_clock)
239                 omap_sram_error();
240
241         return _omap_sram_reprogram_clock(dpllctl, ckctl);
242 }
243
244 int __init omap1_sram_init(void)
245 {
246         _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
247                                                     sram_reprogram_clock_sz);
248
249         return 0;
250 }
251
252 #else
253 #define omap1_sram_init()       do {} while (0)
254 #endif
255
256 #ifdef CONFIG_ARCH_OMAP2
257
258 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
259                               u32 base_cs, u32 force_unlock);
260
261 void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
262                    u32 base_cs, u32 force_unlock)
263 {
264         if (!_omap2_sram_ddr_init)
265                 omap_sram_error();
266
267         return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
268                                     base_cs, force_unlock);
269 }
270
271 static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
272                                           u32 mem_type);
273
274 void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
275 {
276         if (!_omap2_sram_reprogram_sdrc)
277                 omap_sram_error();
278
279         return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
280 }
281
282 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
283
284 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
285 {
286         if (!_omap2_set_prcm)
287                 omap_sram_error();
288
289         return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
290 }
291
292 int __init omap2_sram_init(void)
293 {
294         _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
295
296         _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
297                                                     sram_reprogram_sdrc_sz);
298         _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
299
300         return 0;
301 }
302 #else
303 #define omap2_sram_init()       do {} while (0)
304 #endif
305
306 int __init omap_sram_init(void)
307 {
308         omap_detect_sram();
309         omap_map_sram();
310
311         if (!cpu_is_omap24xx())
312                 omap1_sram_init();
313         else
314                 omap2_sram_init();
315
316         return 0;
317 }