arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26 #include <linux/slab.h>
  27
  28 #include <plat/dma.h>
  29 #include <plat/mcbsp.h>
  30 #include <plat/omap_device.h>
  31 #include <linux/pm_runtime.h>
  32
  33 /* XXX These "sideways" includes are a sign that something is wrong */
  34 #include "../mach-omap2/cm2xxx_3xxx.h"
  35 #include "../mach-omap2/cm-regbits-34xx.h"
  36
  37 struct omap_mcbsp **mcbsp_ptr;
  38 int omap_mcbsp_count, omap_mcbsp_cache_size;
  39
  40 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  41 {
  42         if (cpu_class_is_omap1()) {
  43                 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)] = (u16)val;
  44                 __raw_writew((u16)val, mcbsp->io_base + reg);
  45         } else if (cpu_is_omap2420()) {
  46                 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)] = (u16)val;
  47                 __raw_writew((u16)val, mcbsp->io_base + reg);
  48         } else {
  49                 ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)] = val;
  50                 __raw_writel(val, mcbsp->io_base + reg);
  51         }
  52 }
  53
  54 static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
  55 {
  56         if (cpu_class_is_omap1()) {
  57                 return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
  58                                 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u16)];
  59         } else if (cpu_is_omap2420()) {
  60                 return !from_cache ? __raw_readw(mcbsp->io_base + reg) :
  61                                 ((u16 *)mcbsp->reg_cache)[reg / sizeof(u32)];
  62         } else {
  63                 return !from_cache ? __raw_readl(mcbsp->io_base + reg) :
  64                                 ((u32 *)mcbsp->reg_cache)[reg / sizeof(u32)];
  65         }
  66 }
  67
  68 #ifdef CONFIG_ARCH_OMAP3
  69 static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  70 {
  71         __raw_writel(val, mcbsp->st_data->io_base_st + reg);
  72 }
  73
  74 static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
  75 {
  76         return __raw_readl(mcbsp->st_data->io_base_st + reg);
  77 }
  78 #endif
  79
  80 #define MCBSP_READ(mcbsp, reg) \
  81                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
  82 #define MCBSP_WRITE(mcbsp, reg, val) \
  83                 omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val)
  84 #define MCBSP_READ_CACHE(mcbsp, reg) \
  85                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
  86
  87 #define MCBSP_ST_READ(mcbsp, reg) \
  88                         omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
  89 #define MCBSP_ST_WRITE(mcbsp, reg, val) \
  90                         omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
  91
  92 static void omap_mcbsp_dump_reg(u8 id)
  93 {
  94         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  95
  96         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  97         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  98                         MCBSP_READ(mcbsp, DRR2));
  99         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
 100                         MCBSP_READ(mcbsp, DRR1));
 101         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
 102                         MCBSP_READ(mcbsp, DXR2));
 103         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
 104                         MCBSP_READ(mcbsp, DXR1));
 105         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
 106                         MCBSP_READ(mcbsp, SPCR2));
 107         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
 108                         MCBSP_READ(mcbsp, SPCR1));
 109         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
 110                         MCBSP_READ(mcbsp, RCR2));
 111         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
 112                         MCBSP_READ(mcbsp, RCR1));
 113         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
 114                         MCBSP_READ(mcbsp, XCR2));
 115         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
 116                         MCBSP_READ(mcbsp, XCR1));
 117         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
 118                         MCBSP_READ(mcbsp, SRGR2));
 119         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
 120                         MCBSP_READ(mcbsp, SRGR1));
 121         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
 122                         MCBSP_READ(mcbsp, PCR0));
 123         dev_dbg(mcbsp->dev, "***********************\n");
 124 }
 125
 126 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 127 {
 128         struct omap_mcbsp *mcbsp_tx = dev_id;
 129         u16 irqst_spcr2;
 130
 131         irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
 132         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
 133
 134         if (irqst_spcr2 & XSYNC_ERR) {
 135                 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
 136                         irqst_spcr2);
 137                 /* Writing zero to XSYNC_ERR clears the IRQ */
 138                 MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
 139         } else {
 140                 complete(&mcbsp_tx->tx_irq_completion);
 141         }
 142
 143         return IRQ_HANDLED;
 144 }
 145
 146 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 147 {
 148         struct omap_mcbsp *mcbsp_rx = dev_id;
 149         u16 irqst_spcr1;
 150
 151         irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1);
 152         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
 153
 154         if (irqst_spcr1 & RSYNC_ERR) {
 155                 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
 156                         irqst_spcr1);
 157                 /* Writing zero to RSYNC_ERR clears the IRQ */
 158                 MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
 159         } else {
 160                 complete(&mcbsp_rx->rx_irq_completion);
 161         }
 162
 163         return IRQ_HANDLED;
 164 }
 165
 166 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 167 {
 168         struct omap_mcbsp *mcbsp_dma_tx = data;
 169
 170         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 171                 MCBSP_READ(mcbsp_dma_tx, SPCR2));
 172
 173         /* We can free the channels */
 174         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 175         mcbsp_dma_tx->dma_tx_lch = -1;
 176
 177         complete(&mcbsp_dma_tx->tx_dma_completion);
 178 }
 179
 180 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 181 {
 182         struct omap_mcbsp *mcbsp_dma_rx = data;
 183
 184         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 185                 MCBSP_READ(mcbsp_dma_rx, SPCR2));
 186
 187         /* We can free the channels */
 188         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 189         mcbsp_dma_rx->dma_rx_lch = -1;
 190
 191         complete(&mcbsp_dma_rx->rx_dma_completion);
 192 }
 193
 194 /*
 195  * omap_mcbsp_config simply write a config to the
 196  * appropriate McBSP.
 197  * You either call this function or set the McBSP registers
 198  * by yourself before calling omap_mcbsp_start().
 199  */
 200 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 201 {
 202         struct omap_mcbsp *mcbsp;
 203
 204         if (!omap_mcbsp_check_valid_id(id)) {
 205                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 206                 return;
 207         }
 208         mcbsp = id_to_mcbsp_ptr(id);
 209
 210         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 211                         mcbsp->id, mcbsp->phys_base);
 212
 213         /* We write the given config */
 214         MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);
 215         MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);
 216         MCBSP_WRITE(mcbsp, RCR2, config->rcr2);
 217         MCBSP_WRITE(mcbsp, RCR1, config->rcr1);
 218         MCBSP_WRITE(mcbsp, XCR2, config->xcr2);
 219         MCBSP_WRITE(mcbsp, XCR1, config->xcr1);
 220         MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);
 221         MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);
 222         MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
 223         MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
 224         MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
 225         if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 226                 MCBSP_WRITE(mcbsp, XCCR, config->xccr);
 227                 MCBSP_WRITE(mcbsp, RCCR, config->rccr);
 228         }
 229 }
 230 EXPORT_SYMBOL(omap_mcbsp_config);
 231
 232 /**
 233  * omap_mcbsp_dma_params - returns the dma channel number
 234  * @id - mcbsp id
 235  * @stream - indicates the direction of data flow (rx or tx)
 236  *
 237  * Returns the dma channel number for the rx channel or tx channel
 238  * based on the value of @stream for the requested mcbsp given by @id
 239  */
 240 int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream)
 241 {
 242         struct omap_mcbsp *mcbsp;
 243
 244         if (!omap_mcbsp_check_valid_id(id)) {
 245                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 246                 return -ENODEV;
 247         }
 248         mcbsp = id_to_mcbsp_ptr(id);
 249
 250         if (stream)
 251                 return mcbsp->dma_rx_sync;
 252         else
 253                 return mcbsp->dma_tx_sync;
 254 }
 255 EXPORT_SYMBOL(omap_mcbsp_dma_ch_params);
 256
 257 /**
 258  * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
 259  * @id - mcbsp id
 260  * @stream - indicates the direction of data flow (rx or tx)
 261  *
 262  * Returns the address of mcbsp data transmit register or data receive register
 263  * to be used by DMA for transferring/receiving data based on the value of
 264  * @stream for the requested mcbsp given by @id
 265  */
 266 int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
 267 {
 268         struct omap_mcbsp *mcbsp;
 269         int data_reg;
 270
 271         if (!omap_mcbsp_check_valid_id(id)) {
 272                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 273                 return -ENODEV;
 274         }
 275         mcbsp = id_to_mcbsp_ptr(id);
 276
 277         data_reg = mcbsp->phys_dma_base;
 278
 279         if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) {
 280                 if (stream)
 281                         data_reg += OMAP_MCBSP_REG_DRR1;
 282                 else
 283                         data_reg += OMAP_MCBSP_REG_DXR1;
 284         } else {
 285                 if (stream)
 286                         data_reg += OMAP_MCBSP_REG_DRR;
 287                 else
 288                         data_reg += OMAP_MCBSP_REG_DXR;
 289         }
 290
 291         return data_reg;
 292 }
 293 EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
 294
 295 #ifdef CONFIG_ARCH_OMAP3
 296 static struct omap_device *find_omap_device_by_dev(struct device *dev)
 297 {
 298         struct platform_device *pdev = container_of(dev,
 299                                         struct platform_device, dev);
 300         return container_of(pdev, struct omap_device, pdev);
 301 }
 302
 303 static void omap_st_on(struct omap_mcbsp *mcbsp)
 304 {
 305         unsigned int w;
 306         struct omap_device *od;
 307
 308         od = find_omap_device_by_dev(mcbsp->dev);
 309
 310         /*
 311          * Sidetone uses McBSP ICLK - which must not idle when sidetones
 312          * are enabled or sidetones start sounding ugly.
 313          */
 314         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 315         w &= ~(1 << (mcbsp->id - 2));
 316         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 317
 318         /* Enable McBSP Sidetone */
 319         w = MCBSP_READ(mcbsp, SSELCR);
 320         MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
 321
 322         /* Enable Sidetone from Sidetone Core */
 323         w = MCBSP_ST_READ(mcbsp, SSELCR);
 324         MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
 325 }
 326
 327 static void omap_st_off(struct omap_mcbsp *mcbsp)
 328 {
 329         unsigned int w;
 330         struct omap_device *od;
 331
 332         od = find_omap_device_by_dev(mcbsp->dev);
 333
 334         w = MCBSP_ST_READ(mcbsp, SSELCR);
 335         MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
 336
 337         w = MCBSP_READ(mcbsp, SSELCR);
 338         MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
 339
 340         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 341         w |= 1 << (mcbsp->id - 2);
 342         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 343 }
 344
 345 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
 346 {
 347         u16 val, i;
 348         struct omap_device *od;
 349
 350         od = find_omap_device_by_dev(mcbsp->dev);
 351
 352         val = MCBSP_ST_READ(mcbsp, SSELCR);
 353
 354         if (val & ST_COEFFWREN)
 355                 MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 356
 357         MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
 358
 359         for (i = 0; i < 128; i++)
 360                 MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
 361
 362         i = 0;
 363
 364         val = MCBSP_ST_READ(mcbsp, SSELCR);
 365         while (!(val & ST_COEFFWRDONE) && (++i < 1000))
 366                 val = MCBSP_ST_READ(mcbsp, SSELCR);
 367
 368         MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 369
 370         if (i == 1000)
 371                 dev_err(mcbsp->dev, "McBSP FIR load error!\n");
 372 }
 373
 374 static void omap_st_chgain(struct omap_mcbsp *mcbsp)
 375 {
 376         u16 w;
 377         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 378         struct omap_device *od;
 379
 380         od = find_omap_device_by_dev(mcbsp->dev);
 381
 382         w = MCBSP_ST_READ(mcbsp, SSELCR);
 383
 384         MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \
 385                       ST_CH1GAIN(st_data->ch1gain));
 386 }
 387
 388 int omap_st_set_chgain(unsigned int id, int channel, s16 chgain)
 389 {
 390         struct omap_mcbsp *mcbsp;
 391         struct omap_mcbsp_st_data *st_data;
 392         int ret = 0;
 393
 394         if (!omap_mcbsp_check_valid_id(id)) {
 395                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 396                 return -ENODEV;
 397         }
 398
 399         mcbsp = id_to_mcbsp_ptr(id);
 400         st_data = mcbsp->st_data;
 401
 402         if (!st_data)
 403                 return -ENOENT;
 404
 405         spin_lock_irq(&mcbsp->lock);
 406         if (channel == 0)
 407                 st_data->ch0gain = chgain;
 408         else if (channel == 1)
 409                 st_data->ch1gain = chgain;
 410         else
 411                 ret = -EINVAL;
 412
 413         if (st_data->enabled)
 414                 omap_st_chgain(mcbsp);
 415         spin_unlock_irq(&mcbsp->lock);
 416
 417         return ret;
 418 }
 419 EXPORT_SYMBOL(omap_st_set_chgain);
 420
 421 int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain)
 422 {
 423         struct omap_mcbsp *mcbsp;
 424         struct omap_mcbsp_st_data *st_data;
 425         int ret = 0;
 426
 427         if (!omap_mcbsp_check_valid_id(id)) {
 428                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 429                 return -ENODEV;
 430         }
 431
 432         mcbsp = id_to_mcbsp_ptr(id);
 433         st_data = mcbsp->st_data;
 434
 435         if (!st_data)
 436                 return -ENOENT;
 437
 438         spin_lock_irq(&mcbsp->lock);
 439         if (channel == 0)
 440                 *chgain = st_data->ch0gain;
 441         else if (channel == 1)
 442                 *chgain = st_data->ch1gain;
 443         else
 444                 ret = -EINVAL;
 445         spin_unlock_irq(&mcbsp->lock);
 446
 447         return ret;
 448 }
 449 EXPORT_SYMBOL(omap_st_get_chgain);
 450
 451 static int omap_st_start(struct omap_mcbsp *mcbsp)
 452 {
 453         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 454
 455         if (st_data && st_data->enabled && !st_data->running) {
 456                 omap_st_fir_write(mcbsp, st_data->taps);
 457                 omap_st_chgain(mcbsp);
 458
 459                 if (!mcbsp->free) {
 460                         omap_st_on(mcbsp);
 461                         st_data->running = 1;
 462                 }
 463         }
 464
 465         return 0;
 466 }
 467
 468 int omap_st_enable(unsigned int id)
 469 {
 470         struct omap_mcbsp *mcbsp;
 471         struct omap_mcbsp_st_data *st_data;
 472
 473         if (!omap_mcbsp_check_valid_id(id)) {
 474                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 475                 return -ENODEV;
 476         }
 477
 478         mcbsp = id_to_mcbsp_ptr(id);
 479         st_data = mcbsp->st_data;
 480
 481         if (!st_data)
 482                 return -ENODEV;
 483
 484         spin_lock_irq(&mcbsp->lock);
 485         st_data->enabled = 1;
 486         omap_st_start(mcbsp);
 487         spin_unlock_irq(&mcbsp->lock);
 488
 489         return 0;
 490 }
 491 EXPORT_SYMBOL(omap_st_enable);
 492
 493 static int omap_st_stop(struct omap_mcbsp *mcbsp)
 494 {
 495         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 496
 497         if (st_data && st_data->running) {
 498                 if (!mcbsp->free) {
 499                         omap_st_off(mcbsp);
 500                         st_data->running = 0;
 501                 }
 502         }
 503
 504         return 0;
 505 }
 506
 507 int omap_st_disable(unsigned int id)
 508 {
 509         struct omap_mcbsp *mcbsp;
 510         struct omap_mcbsp_st_data *st_data;
 511         int ret = 0;
 512
 513         if (!omap_mcbsp_check_valid_id(id)) {
 514                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 515                 return -ENODEV;
 516         }
 517
 518         mcbsp = id_to_mcbsp_ptr(id);
 519         st_data = mcbsp->st_data;
 520
 521         if (!st_data)
 522                 return -ENODEV;
 523
 524         spin_lock_irq(&mcbsp->lock);
 525         omap_st_stop(mcbsp);
 526         st_data->enabled = 0;
 527         spin_unlock_irq(&mcbsp->lock);
 528
 529         return ret;
 530 }
 531 EXPORT_SYMBOL(omap_st_disable);
 532
 533 int omap_st_is_enabled(unsigned int id)
 534 {
 535         struct omap_mcbsp *mcbsp;
 536         struct omap_mcbsp_st_data *st_data;
 537
 538         if (!omap_mcbsp_check_valid_id(id)) {
 539                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 540                 return -ENODEV;
 541         }
 542
 543         mcbsp = id_to_mcbsp_ptr(id);
 544         st_data = mcbsp->st_data;
 545
 546         if (!st_data)
 547                 return -ENODEV;
 548
 549
 550         return st_data->enabled;
 551 }
 552 EXPORT_SYMBOL(omap_st_is_enabled);
 553
 554 /*
 555  * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
 556  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 557  * for the THRSH2 register.
 558  */
 559 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
 560 {
 561         struct omap_mcbsp *mcbsp;
 562
 563         if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
 564                 return;
 565
 566         if (!omap_mcbsp_check_valid_id(id)) {
 567                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 568                 return;
 569         }
 570         mcbsp = id_to_mcbsp_ptr(id);
 571
 572         if (threshold && threshold <= mcbsp->max_tx_thres)
 573                 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
 574 }
 575 EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
 576
 577 /*
 578  * omap_mcbsp_set_rx_threshold configures the receive threshold in words.
 579  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 580  * for the THRSH1 register.
 581  */
 582 void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
 583 {
 584         struct omap_mcbsp *mcbsp;
 585
 586         if (!cpu_is_omap34xx() && !cpu_is_omap44xx())
 587                 return;
 588
 589         if (!omap_mcbsp_check_valid_id(id)) {
 590                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 591                 return;
 592         }
 593         mcbsp = id_to_mcbsp_ptr(id);
 594
 595         if (threshold && threshold <= mcbsp->max_rx_thres)
 596                 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
 597 }
 598 EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
 599
 600 /*
 601  * omap_mcbsp_get_max_tx_thres just return the current configured
 602  * maximum threshold for transmission
 603  */
 604 u16 omap_mcbsp_get_max_tx_threshold(unsigned int id)
 605 {
 606         struct omap_mcbsp *mcbsp;
 607
 608         if (!omap_mcbsp_check_valid_id(id)) {
 609                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 610                 return -ENODEV;
 611         }
 612         mcbsp = id_to_mcbsp_ptr(id);
 613
 614         return mcbsp->max_tx_thres;
 615 }
 616 EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold);
 617
 618 /*
 619  * omap_mcbsp_get_max_rx_thres just return the current configured
 620  * maximum threshold for reception
 621  */
 622 u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
 623 {
 624         struct omap_mcbsp *mcbsp;
 625
 626         if (!omap_mcbsp_check_valid_id(id)) {
 627                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 628                 return -ENODEV;
 629         }
 630         mcbsp = id_to_mcbsp_ptr(id);
 631
 632         return mcbsp->max_rx_thres;
 633 }
 634 EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
 635
 636 u16 omap_mcbsp_get_fifo_size(unsigned int id)
 637 {
 638         struct omap_mcbsp *mcbsp;
 639
 640         if (!omap_mcbsp_check_valid_id(id)) {
 641                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 642                 return -ENODEV;
 643         }
 644         mcbsp = id_to_mcbsp_ptr(id);
 645
 646         return mcbsp->pdata->buffer_size;
 647 }
 648 EXPORT_SYMBOL(omap_mcbsp_get_fifo_size);
 649
 650 /*
 651  * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
 652  */
 653 u16 omap_mcbsp_get_tx_delay(unsigned int id)
 654 {
 655         struct omap_mcbsp *mcbsp;
 656         u16 buffstat;
 657
 658         if (!omap_mcbsp_check_valid_id(id)) {
 659                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 660                 return -ENODEV;
 661         }
 662         mcbsp = id_to_mcbsp_ptr(id);
 663
 664         /* Returns the number of free locations in the buffer */
 665         buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
 666
 667         /* Number of slots are different in McBSP ports */
 668         return mcbsp->pdata->buffer_size - buffstat;
 669 }
 670 EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);
 671
 672 /*
 673  * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO
 674  * to reach the threshold value (when the DMA will be triggered to read it)
 675  */
 676 u16 omap_mcbsp_get_rx_delay(unsigned int id)
 677 {
 678         struct omap_mcbsp *mcbsp;
 679         u16 buffstat, threshold;
 680
 681         if (!omap_mcbsp_check_valid_id(id)) {
 682                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 683                 return -ENODEV;
 684         }
 685         mcbsp = id_to_mcbsp_ptr(id);
 686
 687         /* Returns the number of used locations in the buffer */
 688         buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
 689         /* RX threshold */
 690         threshold = MCBSP_READ(mcbsp, THRSH1);
 691
 692         /* Return the number of location till we reach the threshold limit */
 693         if (threshold <= buffstat)
 694                 return 0;
 695         else
 696                 return threshold - buffstat;
 697 }
 698 EXPORT_SYMBOL(omap_mcbsp_get_rx_delay);
 699
 700 /*
 701  * omap_mcbsp_get_dma_op_mode just return the current configured
 702  * operating mode for the mcbsp channel
 703  */
 704 int omap_mcbsp_get_dma_op_mode(unsigned int id)
 705 {
 706         struct omap_mcbsp *mcbsp;
 707         int dma_op_mode;
 708
 709         if (!omap_mcbsp_check_valid_id(id)) {
 710                 printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1);
 711                 return -ENODEV;
 712         }
 713         mcbsp = id_to_mcbsp_ptr(id);
 714
 715         dma_op_mode = mcbsp->dma_op_mode;
 716
 717         return dma_op_mode;
 718 }
 719 EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 720
 721 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
 722 {
 723         struct omap_device *od;
 724
 725         od = find_omap_device_by_dev(mcbsp->dev);
 726         /*
 727          * Enable wakup behavior, smart idle and all wakeups
 728          * REVISIT: some wakeups may be unnecessary
 729          */
 730         if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 731                 MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
 732         }
 733 }
 734
 735 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
 736 {
 737         struct omap_device *od;
 738
 739         od = find_omap_device_by_dev(mcbsp->dev);
 740
 741         /*
 742          * Disable wakup behavior, smart idle and all wakeups
 743          */
 744         if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 745                 /*
 746                  * HW bug workaround - If no_idle mode is taken, we need to
 747                  * go to smart_idle before going to always_idle, or the
 748                  * device will not hit retention anymore.
 749                  */
 750
 751                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 752         }
 753 }
 754 #else
 755 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
 756 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
 757 static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
 758 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
 759 #endif
 760
 761 /*
 762  * We can choose between IRQ based or polled IO.
 763  * This needs to be called before omap_mcbsp_request().
 764  */
 765 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 766 {
 767         struct omap_mcbsp *mcbsp;
 768
 769         if (!omap_mcbsp_check_valid_id(id)) {
 770                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 771                 return -ENODEV;
 772         }
 773         mcbsp = id_to_mcbsp_ptr(id);
 774
 775         spin_lock(&mcbsp->lock);
 776
 777         if (!mcbsp->free) {
 778                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 779                         mcbsp->id);
 780                 spin_unlock(&mcbsp->lock);
 781                 return -EINVAL;
 782         }
 783
 784         mcbsp->io_type = io_type;
 785
 786         spin_unlock(&mcbsp->lock);
 787
 788         return 0;
 789 }
 790 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 791
 792 int omap_mcbsp_request(unsigned int id)
 793 {
 794         struct omap_mcbsp *mcbsp;
 795         void *reg_cache;
 796         int err;
 797
 798         if (!omap_mcbsp_check_valid_id(id)) {
 799                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 800                 return -ENODEV;
 801         }
 802         mcbsp = id_to_mcbsp_ptr(id);
 803
 804         reg_cache = kzalloc(omap_mcbsp_cache_size, GFP_KERNEL);
 805         if (!reg_cache) {
 806                 return -ENOMEM;
 807         }
 808
 809         spin_lock(&mcbsp->lock);
 810         if (!mcbsp->free) {
 811                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 812                         mcbsp->id);
 813                 err = -EBUSY;
 814                 goto err_kfree;
 815         }
 816
 817         mcbsp->free = false;
 818         mcbsp->reg_cache = reg_cache;
 819         spin_unlock(&mcbsp->lock);
 820
 821         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 822                 mcbsp->pdata->ops->request(id);
 823
 824         pm_runtime_get_sync(mcbsp->dev);
 825
 826         /* Do procedure specific to omap34xx arch, if applicable */
 827         omap34xx_mcbsp_request(mcbsp);
 828
 829         /*
 830          * Make sure that transmitter, receiver and sample-rate generator are
 831          * not running before activating IRQs.
 832          */
 833         MCBSP_WRITE(mcbsp, SPCR1, 0);
 834         MCBSP_WRITE(mcbsp, SPCR2, 0);
 835
 836         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 837                 /* We need to get IRQs here */
 838                 init_completion(&mcbsp->tx_irq_completion);
 839                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 840                                         0, "McBSP", (void *)mcbsp);
 841                 if (err != 0) {
 842                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 843                                         "for McBSP%d\n", mcbsp->tx_irq,
 844                                         mcbsp->id);
 845                         goto err_clk_disable;
 846                 }
 847
 848                 if (mcbsp->rx_irq) {
 849                         init_completion(&mcbsp->rx_irq_completion);
 850                         err = request_irq(mcbsp->rx_irq,
 851                                         omap_mcbsp_rx_irq_handler,
 852                                         0, "McBSP", (void *)mcbsp);
 853                         if (err != 0) {
 854                                 dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 855                                                 "for McBSP%d\n", mcbsp->rx_irq,
 856                                                 mcbsp->id);
 857                                 goto err_free_irq;
 858                         }
 859                 }
 860         }
 861
 862         return 0;
 863 err_free_irq:
 864         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 865 err_clk_disable:
 866         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 867                 mcbsp->pdata->ops->free(id);
 868
 869         /* Do procedure specific to omap34xx arch, if applicable */
 870         omap34xx_mcbsp_free(mcbsp);
 871
 872         pm_runtime_put_sync(mcbsp->dev);
 873
 874         spin_lock(&mcbsp->lock);
 875         mcbsp->free = true;
 876         mcbsp->reg_cache = NULL;
 877 err_kfree:
 878         spin_unlock(&mcbsp->lock);
 879         kfree(reg_cache);
 880
 881         return err;
 882 }
 883 EXPORT_SYMBOL(omap_mcbsp_request);
 884
 885 void omap_mcbsp_free(unsigned int id)
 886 {
 887         struct omap_mcbsp *mcbsp;
 888         void *reg_cache;
 889
 890         if (!omap_mcbsp_check_valid_id(id)) {
 891                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 892                 return;
 893         }
 894         mcbsp = id_to_mcbsp_ptr(id);
 895
 896         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 897                 mcbsp->pdata->ops->free(id);
 898
 899         /* Do procedure specific to omap34xx arch, if applicable */
 900         omap34xx_mcbsp_free(mcbsp);
 901
 902         pm_runtime_put_sync(mcbsp->dev);
 903
 904         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 905                 /* Free IRQs */
 906                 if (mcbsp->rx_irq)
 907                         free_irq(mcbsp->rx_irq, (void *)mcbsp);
 908                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 909         }
 910
 911         reg_cache = mcbsp->reg_cache;
 912
 913         spin_lock(&mcbsp->lock);
 914         if (mcbsp->free)
 915                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);
 916         else
 917                 mcbsp->free = true;
 918         mcbsp->reg_cache = NULL;
 919         spin_unlock(&mcbsp->lock);
 920
 921         if (reg_cache)
 922                 kfree(reg_cache);
 923 }
 924 EXPORT_SYMBOL(omap_mcbsp_free);
 925
 926 /*
 927  * Here we start the McBSP, by enabling transmitter, receiver or both.
 928  * If no transmitter or receiver is active prior calling, then sample-rate
 929  * generator and frame sync are started.
 930  */
 931 void omap_mcbsp_start(unsigned int id, int tx, int rx)
 932 {
 933         struct omap_mcbsp *mcbsp;
 934         int enable_srg = 0;
 935         u16 w;
 936
 937         if (!omap_mcbsp_check_valid_id(id)) {
 938                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 939                 return;
 940         }
 941         mcbsp = id_to_mcbsp_ptr(id);
 942
 943         if (cpu_is_omap34xx())
 944                 omap_st_start(mcbsp);
 945
 946         mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7;
 947         mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7;
 948
 949         /* Only enable SRG, if McBSP is master */
 950         w = MCBSP_READ_CACHE(mcbsp, PCR0);
 951         if (w & (FSXM | FSRM | CLKXM | CLKRM))
 952                 enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
 953                                 MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
 954
 955         if (enable_srg) {
 956                 /* Start the sample generator */
 957                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 958                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6));
 959         }
 960
 961         /* Enable transmitter and receiver */
 962         tx &= 1;
 963         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 964         MCBSP_WRITE(mcbsp, SPCR2, w | tx);
 965
 966         rx &= 1;
 967         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
 968         MCBSP_WRITE(mcbsp, SPCR1, w | rx);
 969
 970         /*
 971          * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
 972          * REVISIT: 100us may give enough time for two CLKSRG, however
 973          * due to some unknown PM related, clock gating etc. reason it
 974          * is now at 500us.
 975          */
 976         udelay(500);
 977
 978         if (enable_srg) {
 979                 /* Start frame sync */
 980                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 981                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
 982         }
 983
 984         if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 985                 /* Release the transmitter and receiver */
 986                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
 987                 w &= ~(tx ? XDISABLE : 0);
 988                 MCBSP_WRITE(mcbsp, XCCR, w);
 989                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
 990                 w &= ~(rx ? RDISABLE : 0);
 991                 MCBSP_WRITE(mcbsp, RCCR, w);
 992         }
 993
 994         /* Dump McBSP Regs */
 995         omap_mcbsp_dump_reg(id);
 996 }
 997 EXPORT_SYMBOL(omap_mcbsp_start);
 998
 999 void omap_mcbsp_stop(unsigned int id, int tx, int rx)
1000 {
1001         struct omap_mcbsp *mcbsp;
1002         int idle;
1003         u16 w;
1004
1005         if (!omap_mcbsp_check_valid_id(id)) {
1006                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1007                 return;
1008         }
1009
1010         mcbsp = id_to_mcbsp_ptr(id);
1011
1012         /* Reset transmitter */
1013         tx &= 1;
1014         if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
1015                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
1016                 w |= (tx ? XDISABLE : 0);
1017                 MCBSP_WRITE(mcbsp, XCCR, w);
1018         }
1019         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
1020         MCBSP_WRITE(mcbsp, SPCR2, w & ~tx);
1021
1022         /* Reset receiver */
1023         rx &= 1;
1024         if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
1025                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
1026                 w |= (rx ? RDISABLE : 0);
1027                 MCBSP_WRITE(mcbsp, RCCR, w);
1028         }
1029         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
1030         MCBSP_WRITE(mcbsp, SPCR1, w & ~rx);
1031
1032         idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
1033                         MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
1034
1035         if (idle) {
1036                 /* Reset the sample rate generator */
1037                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
1038                 MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
1039         }
1040
1041         if (cpu_is_omap34xx())
1042                 omap_st_stop(mcbsp);
1043 }
1044 EXPORT_SYMBOL(omap_mcbsp_stop);
1045
1046 /* polled mcbsp i/o operations */
1047 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
1048 {
1049         struct omap_mcbsp *mcbsp;
1050
1051         if (!omap_mcbsp_check_valid_id(id)) {
1052                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1053                 return -ENODEV;
1054         }
1055
1056         mcbsp = id_to_mcbsp_ptr(id);
1057
1058         MCBSP_WRITE(mcbsp, DXR1, buf);
1059         /* if frame sync error - clear the error */
1060         if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) {
1061                 /* clear error */
1062                 MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2));
1063                 /* resend */
1064                 return -1;
1065         } else {
1066                 /* wait for transmit confirmation */
1067                 int attemps = 0;
1068                 while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) {
1069                         if (attemps++ > 1000) {
1070                                 MCBSP_WRITE(mcbsp, SPCR2,
1071                                                 MCBSP_READ_CACHE(mcbsp, SPCR2) &
1072                                                 (~XRST));
1073                                 udelay(10);
1074                                 MCBSP_WRITE(mcbsp, SPCR2,
1075                                                 MCBSP_READ_CACHE(mcbsp, SPCR2) |
1076                                                 (XRST));
1077                                 udelay(10);
1078                                 dev_err(mcbsp->dev, "Could not write to"
1079                                         " McBSP%d Register\n", mcbsp->id);
1080                                 return -2;
1081                         }
1082                 }
1083         }
1084
1085         return 0;
1086 }
1087 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
1088
1089 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
1090 {
1091         struct omap_mcbsp *mcbsp;
1092
1093         if (!omap_mcbsp_check_valid_id(id)) {
1094                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1095                 return -ENODEV;
1096         }
1097         mcbsp = id_to_mcbsp_ptr(id);
1098
1099         /* if frame sync error - clear the error */
1100         if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) {
1101                 /* clear error */
1102                 MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1));
1103                 /* resend */
1104                 return -1;
1105         } else {
1106                 /* wait for recieve confirmation */
1107                 int attemps = 0;
1108                 while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) {
1109                         if (attemps++ > 1000) {
1110                                 MCBSP_WRITE(mcbsp, SPCR1,
1111                                                 MCBSP_READ_CACHE(mcbsp, SPCR1) &
1112                                                 (~RRST));
1113                                 udelay(10);
1114                                 MCBSP_WRITE(mcbsp, SPCR1,
1115                                                 MCBSP_READ_CACHE(mcbsp, SPCR1) |
1116                                                 (RRST));
1117                                 udelay(10);
1118                                 dev_err(mcbsp->dev, "Could not read from"
1119                                         " McBSP%d Register\n", mcbsp->id);
1120                                 return -2;
1121                         }
1122                 }
1123         }
1124         *buf = MCBSP_READ(mcbsp, DRR1);
1125
1126         return 0;
1127 }
1128 EXPORT_SYMBOL(omap_mcbsp_pollread);
1129
1130 /*
1131  * IRQ based word transmission.
1132  */
1133 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
1134 {
1135         struct omap_mcbsp *mcbsp;
1136         omap_mcbsp_word_length word_length;
1137
1138         if (!omap_mcbsp_check_valid_id(id)) {
1139                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1140                 return;
1141         }
1142
1143         mcbsp = id_to_mcbsp_ptr(id);
1144         word_length = mcbsp->tx_word_length;
1145
1146         wait_for_completion(&mcbsp->tx_irq_completion);
1147
1148         if (word_length > OMAP_MCBSP_WORD_16)
1149                 MCBSP_WRITE(mcbsp, DXR2, word >> 16);
1150         MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
1151 }
1152 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
1153
1154 u32 omap_mcbsp_recv_word(unsigned int id)
1155 {
1156         struct omap_mcbsp *mcbsp;
1157         u16 word_lsb, word_msb = 0;
1158         omap_mcbsp_word_length word_length;
1159
1160         if (!omap_mcbsp_check_valid_id(id)) {
1161                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1162                 return -ENODEV;
1163         }
1164         mcbsp = id_to_mcbsp_ptr(id);
1165
1166         word_length = mcbsp->rx_word_length;
1167
1168         wait_for_completion(&mcbsp->rx_irq_completion);
1169
1170         if (word_length > OMAP_MCBSP_WORD_16)
1171                 word_msb = MCBSP_READ(mcbsp, DRR2);
1172         word_lsb = MCBSP_READ(mcbsp, DRR1);
1173
1174         return (word_lsb | (word_msb << 16));
1175 }
1176 EXPORT_SYMBOL(omap_mcbsp_recv_word);
1177
1178 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
1179 {
1180         struct omap_mcbsp *mcbsp;
1181         omap_mcbsp_word_length tx_word_length;
1182         omap_mcbsp_word_length rx_word_length;
1183         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
1184
1185         if (!omap_mcbsp_check_valid_id(id)) {
1186                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1187                 return -ENODEV;
1188         }
1189         mcbsp = id_to_mcbsp_ptr(id);
1190         tx_word_length = mcbsp->tx_word_length;
1191         rx_word_length = mcbsp->rx_word_length;
1192
1193         if (tx_word_length != rx_word_length)
1194                 return -EINVAL;
1195
1196         /* First we wait for the transmitter to be ready */
1197         spcr2 = MCBSP_READ(mcbsp, SPCR2);
1198         while (!(spcr2 & XRDY)) {
1199                 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1200                 if (attempts++ > 1000) {
1201                         /* We must reset the transmitter */
1202                         MCBSP_WRITE(mcbsp, SPCR2,
1203                                     MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
1204                         udelay(10);
1205                         MCBSP_WRITE(mcbsp, SPCR2,
1206                                     MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
1207                         udelay(10);
1208                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
1209                                 "ready\n", mcbsp->id);
1210                         return -EAGAIN;
1211                 }
1212         }
1213
1214         /* Now we can push the data */
1215         if (tx_word_length > OMAP_MCBSP_WORD_16)
1216                 MCBSP_WRITE(mcbsp, DXR2, word >> 16);
1217         MCBSP_WRITE(mcbsp, DXR1, word & 0xffff);
1218
1219         /* We wait for the receiver to be ready */
1220         spcr1 = MCBSP_READ(mcbsp, SPCR1);
1221         while (!(spcr1 & RRDY)) {
1222                 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1223                 if (attempts++ > 1000) {
1224                         /* We must reset the receiver */
1225                         MCBSP_WRITE(mcbsp, SPCR1,
1226                                     MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
1227                         udelay(10);
1228                         MCBSP_WRITE(mcbsp, SPCR1,
1229                                     MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
1230                         udelay(10);
1231                         dev_err(mcbsp->dev, "McBSP%d receiver not "
1232                                 "ready\n", mcbsp->id);
1233                         return -EAGAIN;
1234                 }
1235         }
1236
1237         /* Receiver is ready, let's read the dummy data */
1238         if (rx_word_length > OMAP_MCBSP_WORD_16)
1239                 word_msb = MCBSP_READ(mcbsp, DRR2);
1240         word_lsb = MCBSP_READ(mcbsp, DRR1);
1241
1242         return 0;
1243 }
1244 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
1245
1246 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
1247 {
1248         struct omap_mcbsp *mcbsp;
1249         u32 clock_word = 0;
1250         omap_mcbsp_word_length tx_word_length;
1251         omap_mcbsp_word_length rx_word_length;
1252         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
1253
1254         if (!omap_mcbsp_check_valid_id(id)) {
1255                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1256                 return -ENODEV;
1257         }
1258
1259         mcbsp = id_to_mcbsp_ptr(id);
1260
1261         tx_word_length = mcbsp->tx_word_length;
1262         rx_word_length = mcbsp->rx_word_length;
1263
1264         if (tx_word_length != rx_word_length)
1265                 return -EINVAL;
1266
1267         /* First we wait for the transmitter to be ready */
1268         spcr2 = MCBSP_READ(mcbsp, SPCR2);
1269         while (!(spcr2 & XRDY)) {
1270                 spcr2 = MCBSP_READ(mcbsp, SPCR2);
1271                 if (attempts++ > 1000) {
1272                         /* We must reset the transmitter */
1273                         MCBSP_WRITE(mcbsp, SPCR2,
1274                                     MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST));
1275                         udelay(10);
1276                         MCBSP_WRITE(mcbsp, SPCR2,
1277                                     MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST);
1278                         udelay(10);
1279                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
1280                                 "ready\n", mcbsp->id);
1281                         return -EAGAIN;
1282                 }
1283         }
1284
1285         /* We first need to enable the bus clock */
1286         if (tx_word_length > OMAP_MCBSP_WORD_16)
1287                 MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16);
1288         MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff);
1289
1290         /* We wait for the receiver to be ready */
1291         spcr1 = MCBSP_READ(mcbsp, SPCR1);
1292         while (!(spcr1 & RRDY)) {
1293                 spcr1 = MCBSP_READ(mcbsp, SPCR1);
1294                 if (attempts++ > 1000) {
1295                         /* We must reset the receiver */
1296                         MCBSP_WRITE(mcbsp, SPCR1,
1297                                     MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST));
1298                         udelay(10);
1299                         MCBSP_WRITE(mcbsp, SPCR1,
1300                                     MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST);
1301                         udelay(10);
1302                         dev_err(mcbsp->dev, "McBSP%d receiver not "
1303                                 "ready\n", mcbsp->id);
1304                         return -EAGAIN;
1305                 }
1306         }
1307
1308         /* Receiver is ready, there is something for us */
1309         if (rx_word_length > OMAP_MCBSP_WORD_16)
1310                 word_msb = MCBSP_READ(mcbsp, DRR2);
1311         word_lsb = MCBSP_READ(mcbsp, DRR1);
1312
1313         word[0] = (word_lsb | (word_msb << 16));
1314
1315         return 0;
1316 }
1317 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
1318
1319 /*
1320  * Simple DMA based buffer rx/tx routines.
1321  * Nothing fancy, just a single buffer tx/rx through DMA.
1322  * The DMA resources are released once the transfer is done.
1323  * For anything fancier, you should use your own customized DMA
1324  * routines and callbacks.
1325  */
1326 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
1327                                 unsigned int length)
1328 {
1329         struct omap_mcbsp *mcbsp;
1330         int dma_tx_ch;
1331         int src_port = 0;
1332         int dest_port = 0;
1333         int sync_dev = 0;
1334
1335         if (!omap_mcbsp_check_valid_id(id)) {
1336                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1337                 return -ENODEV;
1338         }
1339         mcbsp = id_to_mcbsp_ptr(id);
1340
1341         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
1342                                 omap_mcbsp_tx_dma_callback,
1343                                 mcbsp,
1344                                 &dma_tx_ch)) {
1345                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
1346                                 "McBSP%d TX. Trying IRQ based TX\n",
1347                                 mcbsp->id);
1348                 return -EAGAIN;
1349         }
1350         mcbsp->dma_tx_lch = dma_tx_ch;
1351
1352         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
1353                 dma_tx_ch);
1354
1355         init_completion(&mcbsp->tx_dma_completion);
1356
1357         if (cpu_class_is_omap1()) {
1358                 src_port = OMAP_DMA_PORT_TIPB;
1359                 dest_port = OMAP_DMA_PORT_EMIFF;
1360         }
1361         if (cpu_class_is_omap2())
1362                 sync_dev = mcbsp->dma_tx_sync;
1363
1364         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
1365                                      OMAP_DMA_DATA_TYPE_S16,
1366                                      length >> 1, 1,
1367                                      OMAP_DMA_SYNC_ELEMENT,
1368          sync_dev, 0);
1369
1370         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
1371                                  src_port,
1372                                  OMAP_DMA_AMODE_CONSTANT,
1373                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
1374                                  0, 0);
1375
1376         omap_set_dma_src_params(mcbsp->dma_tx_lch,
1377                                 dest_port,
1378                                 OMAP_DMA_AMODE_POST_INC,
1379                                 buffer,
1380                                 0, 0);
1381
1382         omap_start_dma(mcbsp->dma_tx_lch);
1383         wait_for_completion(&mcbsp->tx_dma_completion);
1384
1385         return 0;
1386 }
1387 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
1388
1389 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
1390                                 unsigned int length)
1391 {
1392         struct omap_mcbsp *mcbsp;
1393         int dma_rx_ch;
1394         int src_port = 0;
1395         int dest_port = 0;
1396         int sync_dev = 0;
1397
1398         if (!omap_mcbsp_check_valid_id(id)) {
1399                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1400                 return -ENODEV;
1401         }
1402         mcbsp = id_to_mcbsp_ptr(id);
1403
1404         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
1405                                 omap_mcbsp_rx_dma_callback,
1406                                 mcbsp,
1407                                 &dma_rx_ch)) {
1408                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
1409                                 "McBSP%d RX. Trying IRQ based RX\n",
1410                                 mcbsp->id);
1411                 return -EAGAIN;
1412         }
1413         mcbsp->dma_rx_lch = dma_rx_ch;
1414
1415         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
1416                 dma_rx_ch);
1417
1418         init_completion(&mcbsp->rx_dma_completion);
1419
1420         if (cpu_class_is_omap1()) {
1421                 src_port = OMAP_DMA_PORT_TIPB;
1422                 dest_port = OMAP_DMA_PORT_EMIFF;
1423         }
1424         if (cpu_class_is_omap2())
1425                 sync_dev = mcbsp->dma_rx_sync;
1426
1427         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
1428                                         OMAP_DMA_DATA_TYPE_S16,
1429                                         length >> 1, 1,
1430                                         OMAP_DMA_SYNC_ELEMENT,
1431                                         sync_dev, 0);
1432
1433         omap_set_dma_src_params(mcbsp->dma_rx_lch,
1434                                 src_port,
1435                                 OMAP_DMA_AMODE_CONSTANT,
1436                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
1437                                 0, 0);
1438
1439         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
1440                                         dest_port,
1441                                         OMAP_DMA_AMODE_POST_INC,
1442                                         buffer,
1443                                         0, 0);
1444
1445         omap_start_dma(mcbsp->dma_rx_lch);
1446         wait_for_completion(&mcbsp->rx_dma_completion);
1447
1448         return 0;
1449 }
1450 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
1451
1452 /*
1453  * SPI wrapper.
1454  * Since SPI setup is much simpler than the generic McBSP one,
1455  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
1456  * Once this is done, you can call omap_mcbsp_start().
1457  */
1458 void omap_mcbsp_set_spi_mode(unsigned int id,
1459                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
1460 {
1461         struct omap_mcbsp *mcbsp;
1462         struct omap_mcbsp_reg_cfg mcbsp_cfg;
1463
1464         if (!omap_mcbsp_check_valid_id(id)) {
1465                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
1466                 return;
1467         }
1468         mcbsp = id_to_mcbsp_ptr(id);
1469
1470         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
1471
1472         /* SPI has only one frame */
1473         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
1474         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
1475
1476         /* Clock stop mode */
1477         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
1478                 mcbsp_cfg.spcr1 |= (1 << 12);
1479         else
1480                 mcbsp_cfg.spcr1 |= (3 << 11);
1481
1482         /* Set clock parities */
1483         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
1484                 mcbsp_cfg.pcr0 |= CLKRP;
1485         else
1486                 mcbsp_cfg.pcr0 &= ~CLKRP;
1487
1488         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
1489                 mcbsp_cfg.pcr0 &= ~CLKXP;
1490         else
1491                 mcbsp_cfg.pcr0 |= CLKXP;
1492
1493         /* Set SCLKME to 0 and CLKSM to 1 */
1494         mcbsp_cfg.pcr0 &= ~SCLKME;
1495         mcbsp_cfg.srgr2 |= CLKSM;
1496
1497         /* Set FSXP */
1498         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
1499                 mcbsp_cfg.pcr0 &= ~FSXP;
1500         else
1501                 mcbsp_cfg.pcr0 |= FSXP;
1502
1503         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
1504                 mcbsp_cfg.pcr0 |= CLKXM;
1505                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
1506                 mcbsp_cfg.pcr0 |= FSXM;
1507                 mcbsp_cfg.srgr2 &= ~FSGM;
1508                 mcbsp_cfg.xcr2 |= XDATDLY(1);
1509                 mcbsp_cfg.rcr2 |= RDATDLY(1);
1510         } else {
1511                 mcbsp_cfg.pcr0 &= ~CLKXM;
1512                 mcbsp_cfg.srgr1 |= CLKGDV(1);
1513                 mcbsp_cfg.pcr0 &= ~FSXM;
1514                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
1515                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
1516         }
1517
1518         mcbsp_cfg.xcr2 &= ~XPHASE;
1519         mcbsp_cfg.rcr2 &= ~RPHASE;
1520
1521         omap_mcbsp_config(id, &mcbsp_cfg);
1522 }
1523 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
1524
1525 #ifdef CONFIG_ARCH_OMAP3
1526 #define max_thres(m)                    (mcbsp->pdata->buffer_size)
1527 #define valid_threshold(m, val)         ((val) <= max_thres(m))
1528 #define THRESHOLD_PROP_BUILDER(prop)                                    \
1529 static ssize_t prop##_show(struct device *dev,                          \
1530                         struct device_attribute *attr, char *buf)       \
1531 {                                                                       \
1532         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
1533                                                                         \
1534         return sprintf(buf, "%u\n", mcbsp->prop);                       \
1535 }                                                                       \
1536                                                                         \
1537 static ssize_t prop##_store(struct device *dev,                         \
1538                                 struct device_attribute *attr,          \
1539                                 const char *buf, size_t size)           \
1540 {                                                                       \
1541         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
1542         unsigned long val;                                              \
1543         int status;                                                     \
1544                                                                         \
1545         status = strict_strtoul(buf, 0, &val);                          \
1546         if (status)                                                     \
1547                 return status;                                          \
1548                                                                         \
1549         if (!valid_threshold(mcbsp, val))                               \
1550                 return -EDOM;                                           \
1551                                                                         \
1552         mcbsp->prop = val;                                              \
1553         return size;                                                    \
1554 }                                                                       \
1555                                                                         \
1556 static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store);
1557
1558 THRESHOLD_PROP_BUILDER(max_tx_thres);
1559 THRESHOLD_PROP_BUILDER(max_rx_thres);
1560
1561 static const char *dma_op_modes[] = {
1562         "element", "threshold", "frame",
1563 };
1564
1565 static ssize_t dma_op_mode_show(struct device *dev,
1566                         struct device_attribute *attr, char *buf)
1567 {
1568         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1569         int dma_op_mode, i = 0;
1570         ssize_t len = 0;
1571         const char * const *s;
1572
1573         dma_op_mode = mcbsp->dma_op_mode;
1574
1575         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
1576                 if (dma_op_mode == i)
1577                         len += sprintf(buf + len, "[%s] ", *s);
1578                 else
1579                         len += sprintf(buf + len, "%s ", *s);
1580         }
1581         len += sprintf(buf + len, "\n");
1582
1583         return len;
1584 }
1585
1586 static ssize_t dma_op_mode_store(struct device *dev,
1587                                 struct device_attribute *attr,
1588                                 const char *buf, size_t size)
1589 {
1590         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1591         const char * const *s;
1592         int i = 0;
1593
1594         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++)
1595                 if (sysfs_streq(buf, *s))
1596                         break;
1597
1598         if (i == ARRAY_SIZE(dma_op_modes))
1599                 return -EINVAL;
1600
1601         spin_lock_irq(&mcbsp->lock);
1602         if (!mcbsp->free) {
1603                 size = -EBUSY;
1604                 goto unlock;
1605         }
1606         mcbsp->dma_op_mode = i;
1607
1608 unlock:
1609         spin_unlock_irq(&mcbsp->lock);
1610
1611         return size;
1612 }
1613
1614 static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
1615
1616 static ssize_t st_taps_show(struct device *dev,
1617                             struct device_attribute *attr, char *buf)
1618 {
1619         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1620         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1621         ssize_t status = 0;
1622         int i;
1623
1624         spin_lock_irq(&mcbsp->lock);
1625         for (i = 0; i < st_data->nr_taps; i++)
1626                 status += sprintf(&buf[status], (i ? ", %d" : "%d"),
1627                                   st_data->taps[i]);
1628         if (i)
1629                 status += sprintf(&buf[status], "\n");
1630         spin_unlock_irq(&mcbsp->lock);
1631
1632         return status;
1633 }
1634
1635 static ssize_t st_taps_store(struct device *dev,
1636                              struct device_attribute *attr,
1637                              const char *buf, size_t size)
1638 {
1639         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1640         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1641         int val, tmp, status, i = 0;
1642
1643         spin_lock_irq(&mcbsp->lock);
1644         memset(st_data->taps, 0, sizeof(st_data->taps));
1645         st_data->nr_taps = 0;
1646
1647         do {
1648                 status = sscanf(buf, "%d%n", &val, &tmp);
1649                 if (status < 0 || status == 0) {
1650                         size = -EINVAL;
1651                         goto out;
1652                 }
1653                 if (val < -32768 || val > 32767) {
1654                         size = -EINVAL;
1655                         goto out;
1656                 }
1657                 st_data->taps[i++] = val;
1658                 buf += tmp;
1659                 if (*buf != ',')
1660                         break;
1661                 buf++;
1662         } while (1);
1663
1664         st_data->nr_taps = i;
1665
1666 out:
1667         spin_unlock_irq(&mcbsp->lock);
1668
1669         return size;
1670 }
1671
1672 static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store);
1673
1674 static const struct attribute *additional_attrs[] = {
1675         &dev_attr_max_tx_thres.attr,
1676         &dev_attr_max_rx_thres.attr,
1677         &dev_attr_dma_op_mode.attr,
1678         NULL,
1679 };
1680
1681 static const struct attribute_group additional_attr_group = {
1682         .attrs = (struct attribute **)additional_attrs,
1683 };
1684
1685 static inline int __devinit omap_additional_add(struct device *dev)
1686 {
1687         return sysfs_create_group(&dev->kobj, &additional_attr_group);
1688 }
1689
1690 static inline void __devexit omap_additional_remove(struct device *dev)
1691 {
1692         sysfs_remove_group(&dev->kobj, &additional_attr_group);
1693 }
1694
1695 static const struct attribute *sidetone_attrs[] = {
1696         &dev_attr_st_taps.attr,
1697         NULL,
1698 };
1699
1700 static const struct attribute_group sidetone_attr_group = {
1701         .attrs = (struct attribute **)sidetone_attrs,
1702 };
1703
1704 static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
1705 {
1706         struct platform_device *pdev;
1707         struct resource *res;
1708         struct omap_mcbsp_st_data *st_data;
1709         int err;
1710
1711         st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
1712         if (!st_data) {
1713                 err = -ENOMEM;
1714                 goto err1;
1715         }
1716
1717         pdev = container_of(mcbsp->dev, struct platform_device, dev);
1718
1719         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
1720         st_data->io_base_st = ioremap(res->start, resource_size(res));
1721         if (!st_data->io_base_st) {
1722                 err = -ENOMEM;
1723                 goto err2;
1724         }
1725
1726         err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1727         if (err)
1728                 goto err3;
1729
1730         mcbsp->st_data = st_data;
1731         return 0;
1732
1733 err3:
1734         iounmap(st_data->io_base_st);
1735 err2:
1736         kfree(st_data);
1737 err1:
1738         return err;
1739
1740 }
1741
1742 static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
1743 {
1744         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1745
1746         if (st_data) {
1747                 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1748                 iounmap(st_data->io_base_st);
1749                 kfree(st_data);
1750         }
1751 }
1752
1753 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
1754 {
1755         mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
1756         if (cpu_is_omap34xx()) {
1757                 /*
1758                  * Initially configure the maximum thresholds to a safe value.
1759                  * The McBSP FIFO usage with these values should not go under
1760                  * 16 locations.
1761                  * If the whole FIFO without safety buffer is used, than there
1762                  * is a possibility that the DMA will be not able to push the
1763                  * new data on time, causing channel shifts in runtime.
1764                  */
1765                 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
1766                 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
1767                 /*
1768                  * REVISIT: Set dmap_op_mode to THRESHOLD as default
1769                  * for mcbsp2 instances.
1770                  */
1771                 if (omap_additional_add(mcbsp->dev))
1772                         dev_warn(mcbsp->dev,
1773                                 "Unable to create additional controls\n");
1774
1775                 if (mcbsp->id == 2 || mcbsp->id == 3)
1776                         if (omap_st_add(mcbsp))
1777                                 dev_warn(mcbsp->dev,
1778                                  "Unable to create sidetone controls\n");
1779
1780         } else {
1781                 mcbsp->max_tx_thres = -EINVAL;
1782                 mcbsp->max_rx_thres = -EINVAL;
1783         }
1784 }
1785
1786 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
1787 {
1788         if (cpu_is_omap34xx()) {
1789                 omap_additional_remove(mcbsp->dev);
1790
1791                 if (mcbsp->id == 2 || mcbsp->id == 3)
1792                         omap_st_remove(mcbsp);
1793         }
1794 }
1795 #else
1796 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
1797 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
1798 #endif /* CONFIG_ARCH_OMAP3 */
1799
1800 /*
1801  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
1802  * 730 has only 2 McBSP, and both of them are MPU peripherals.
1803  */
1804 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
1805 {
1806         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
1807         struct omap_mcbsp *mcbsp;
1808         int id = pdev->id - 1;
1809         struct resource *res;
1810         int ret = 0;
1811
1812         if (!pdata) {
1813                 dev_err(&pdev->dev, "McBSP device initialized without"
1814                                 "platform data\n");
1815                 ret = -EINVAL;
1816                 goto exit;
1817         }
1818
1819         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
1820
1821         if (id >= omap_mcbsp_count) {
1822                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
1823                 ret = -EINVAL;
1824                 goto exit;
1825         }
1826
1827         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
1828         if (!mcbsp) {
1829                 ret = -ENOMEM;
1830                 goto exit;
1831         }
1832
1833         spin_lock_init(&mcbsp->lock);
1834         mcbsp->id = id + 1;
1835         mcbsp->free = true;
1836         mcbsp->dma_tx_lch = -1;
1837         mcbsp->dma_rx_lch = -1;
1838
1839         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
1840         if (!res) {
1841                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1842                 if (!res) {
1843                         dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
1844                                         "resource\n", __func__, pdev->id);
1845                         ret = -ENOMEM;
1846                         goto exit;
1847                 }
1848         }
1849         mcbsp->phys_base = res->start;
1850         omap_mcbsp_cache_size = resource_size(res);
1851         mcbsp->io_base = ioremap(res->start, resource_size(res));
1852         if (!mcbsp->io_base) {
1853                 ret = -ENOMEM;
1854                 goto err_ioremap;
1855         }
1856
1857         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
1858         if (!res)
1859                 mcbsp->phys_dma_base = mcbsp->phys_base;
1860         else
1861                 mcbsp->phys_dma_base = res->start;
1862
1863         /* Default I/O is IRQ based */
1864         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
1865
1866         mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
1867         mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
1868
1869         /* From OMAP4 there will be a single irq line */
1870         if (mcbsp->tx_irq == -ENXIO)
1871                 mcbsp->tx_irq = platform_get_irq(pdev, 0);
1872
1873         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1874         if (!res) {
1875                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
1876                                         __func__, pdev->id);
1877                 ret = -ENODEV;
1878                 goto err_res;
1879         }
1880         mcbsp->dma_rx_sync = res->start;
1881
1882         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1883         if (!res) {
1884                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
1885                                         __func__, pdev->id);
1886                 ret = -ENODEV;
1887                 goto err_res;
1888         }
1889         mcbsp->dma_tx_sync = res->start;
1890
1891         mcbsp->fclk = clk_get(&pdev->dev, "fck");
1892         if (IS_ERR(mcbsp->fclk)) {
1893                 ret = PTR_ERR(mcbsp->fclk);
1894                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
1895                 goto err_res;
1896         }
1897
1898         mcbsp->pdata = pdata;
1899         mcbsp->dev = &pdev->dev;
1900         mcbsp_ptr[id] = mcbsp;
1901         mcbsp->mcbsp_config_type = pdata->mcbsp_config_type;
1902         platform_set_drvdata(pdev, mcbsp);
1903         pm_runtime_enable(mcbsp->dev);
1904
1905         /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
1906         omap34xx_device_init(mcbsp);
1907
1908         return 0;
1909
1910 err_res:
1911         iounmap(mcbsp->io_base);
1912 err_ioremap:
1913         kfree(mcbsp);
1914 exit:
1915         return ret;
1916 }
1917
1918 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
1919 {
1920         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
1921
1922         platform_set_drvdata(pdev, NULL);
1923         if (mcbsp) {
1924
1925                 if (mcbsp->pdata && mcbsp->pdata->ops &&
1926                                 mcbsp->pdata->ops->free)
1927                         mcbsp->pdata->ops->free(mcbsp->id);
1928
1929                 omap34xx_device_exit(mcbsp);
1930
1931                 clk_put(mcbsp->fclk);
1932
1933                 iounmap(mcbsp->io_base);
1934                 kfree(mcbsp);
1935         }
1936
1937         return 0;
1938 }
1939
1940 static struct platform_driver omap_mcbsp_driver = {
1941         .probe          = omap_mcbsp_probe,
1942         .remove         = __devexit_p(omap_mcbsp_remove),
1943         .driver         = {
1944                 .name   = "omap-mcbsp",
1945         },
1946 };
1947
1948 int __init omap_mcbsp_init(void)
1949 {
1950         /* Register the McBSP driver */
1951         return platform_driver_register(&omap_mcbsp_driver);
1952 }