arch/arm/plat-omap/include/plat/display.h

   1 /*
   2  * linux/include/asm-arm/arch-omap/display.h
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  21 #define __ASM_ARCH_OMAP_DISPLAY_H
  22
  23 #include <linux/list.h>
  24 #include <linux/kobject.h>
  25 #include <linux/device.h>
  26 #include <linux/platform_device.h>
  27 #include <asm/atomic.h>
  28
  29 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  30 #define DISPC_IRQ_VSYNC                 (1 << 1)
  31 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  32 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  33 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  34 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  35 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  36 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  37 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  38 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  39 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  40 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  41 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  42 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  43 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  44 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  45 #define DISPC_IRQ_WAKEUP                (1 << 16)
  46 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  47 #define DISPC_IRQ_VSYNC2                (1 << 18)
  48 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  49 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  50
  51 struct omap_dss_device;
  52 struct omap_overlay_manager;
  53
  54 enum omap_display_type {
  55         OMAP_DISPLAY_TYPE_NONE          = 0,
  56         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  57         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  58         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  59         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  60         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  61 };
  62
  63 enum omap_plane {
  64         OMAP_DSS_GFX    = 0,
  65         OMAP_DSS_VIDEO1 = 1,
  66         OMAP_DSS_VIDEO2 = 2
  67 };
  68
  69 enum omap_channel {
  70         OMAP_DSS_CHANNEL_LCD    = 0,
  71         OMAP_DSS_CHANNEL_DIGIT  = 1,
  72         OMAP_DSS_CHANNEL_LCD2   = 2,
  73 };
  74
  75 enum omap_color_mode {
  76         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  77         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  78         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  79         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  80         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  81         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  82         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  83         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
  84         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
  85         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
  86         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
  87         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
  88         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
  89         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
  90 };
  91
  92 enum omap_lcd_display_type {
  93         OMAP_DSS_LCD_DISPLAY_STN,
  94         OMAP_DSS_LCD_DISPLAY_TFT,
  95 };
  96
  97 enum omap_dss_load_mode {
  98         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
  99         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 100         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 101         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 102 };
 103
 104 enum omap_dss_trans_key_type {
 105         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 106         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 107 };
 108
 109 enum omap_rfbi_te_mode {
 110         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 111         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 112 };
 113
 114 enum omap_panel_config {
 115         OMAP_DSS_LCD_IVS                = 1<<0,
 116         OMAP_DSS_LCD_IHS                = 1<<1,
 117         OMAP_DSS_LCD_IPC                = 1<<2,
 118         OMAP_DSS_LCD_IEO                = 1<<3,
 119         OMAP_DSS_LCD_RF                 = 1<<4,
 120         OMAP_DSS_LCD_ONOFF              = 1<<5,
 121
 122         OMAP_DSS_LCD_TFT                = 1<<20,
 123 };
 124
 125 enum omap_dss_venc_type {
 126         OMAP_DSS_VENC_TYPE_COMPOSITE,
 127         OMAP_DSS_VENC_TYPE_SVIDEO,
 128 };
 129
 130 enum omap_display_caps {
 131         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 132         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 133 };
 134
 135 enum omap_dss_update_mode {
 136         OMAP_DSS_UPDATE_DISABLED = 0,
 137         OMAP_DSS_UPDATE_AUTO,
 138         OMAP_DSS_UPDATE_MANUAL,
 139 };
 140
 141 enum omap_dss_display_state {
 142         OMAP_DSS_DISPLAY_DISABLED = 0,
 143         OMAP_DSS_DISPLAY_ACTIVE,
 144         OMAP_DSS_DISPLAY_SUSPENDED,
 145 };
 146
 147 /* XXX perhaps this should be removed */
 148 enum omap_dss_overlay_managers {
 149         OMAP_DSS_OVL_MGR_LCD,
 150         OMAP_DSS_OVL_MGR_TV,
 151         OMAP_DSS_OVL_MGR_LCD2,
 152 };
 153
 154 enum omap_dss_rotation_type {
 155         OMAP_DSS_ROT_DMA = 0,
 156         OMAP_DSS_ROT_VRFB = 1,
 157 };
 158
 159 /* clockwise rotation angle */
 160 enum omap_dss_rotation_angle {
 161         OMAP_DSS_ROT_0   = 0,
 162         OMAP_DSS_ROT_90  = 1,
 163         OMAP_DSS_ROT_180 = 2,
 164         OMAP_DSS_ROT_270 = 3,
 165 };
 166
 167 enum omap_overlay_caps {
 168         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 169         OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
 170 };
 171
 172 enum omap_overlay_manager_caps {
 173         OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
 174 };
 175
 176 /* RFBI */
 177
 178 struct rfbi_timings {
 179         int cs_on_time;
 180         int cs_off_time;
 181         int we_on_time;
 182         int we_off_time;
 183         int re_on_time;
 184         int re_off_time;
 185         int we_cycle_time;
 186         int re_cycle_time;
 187         int cs_pulse_width;
 188         int access_time;
 189
 190         int clk_div;
 191
 192         u32 tim[5];             /* set by rfbi_convert_timings() */
 193
 194         int converted;
 195 };
 196
 197 void omap_rfbi_write_command(const void *buf, u32 len);
 198 void omap_rfbi_read_data(void *buf, u32 len);
 199 void omap_rfbi_write_data(const void *buf, u32 len);
 200 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 201                 u16 x, u16 y,
 202                 u16 w, u16 h);
 203 int omap_rfbi_enable_te(bool enable, unsigned line);
 204 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 205                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 206                              int hs_pol_inv, int vs_pol_inv, int extif_div);
 207
 208 /* DSI */
 209 void dsi_bus_lock(void);
 210 void dsi_bus_unlock(void);
 211 int dsi_vc_dcs_write(int channel, u8 *data, int len);
 212 int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
 213 int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
 214 int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
 215 int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
 216 int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
 217 int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
 218 int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
 219 int dsi_vc_send_null(int channel);
 220 int dsi_vc_send_bta_sync(int channel);
 221
 222 /* Board specific data */
 223 struct omap_dss_board_info {
 224         int (*get_last_off_on_transaction_id)(struct device *dev);
 225         int num_devices;
 226         struct omap_dss_device **devices;
 227         struct omap_dss_device *default_device;
 228 };
 229
 230 #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
 231 /* Init with the board info */
 232 extern int omap_display_init(struct omap_dss_board_info *board_data);
 233 #else
 234 static inline int omap_display_init(struct omap_dss_board_info *board_data)
 235 {
 236         return 0;
 237 }
 238 #endif
 239
 240 struct omap_video_timings {
 241         /* Unit: pixels */
 242         u16 x_res;
 243         /* Unit: pixels */
 244         u16 y_res;
 245         /* Unit: KHz */
 246         u32 pixel_clock;
 247         /* Unit: pixel clocks */
 248         u16 hsw;        /* Horizontal synchronization pulse width */
 249         /* Unit: pixel clocks */
 250         u16 hfp;        /* Horizontal front porch */
 251         /* Unit: pixel clocks */
 252         u16 hbp;        /* Horizontal back porch */
 253         /* Unit: line clocks */
 254         u16 vsw;        /* Vertical synchronization pulse width */
 255         /* Unit: line clocks */
 256         u16 vfp;        /* Vertical front porch */
 257         /* Unit: line clocks */
 258         u16 vbp;        /* Vertical back porch */
 259 };
 260
 261 #ifdef CONFIG_OMAP2_DSS_VENC
 262 /* Hardcoded timings for tv modes. Venc only uses these to
 263  * identify the mode, and does not actually use the configs
 264  * itself. However, the configs should be something that
 265  * a normal monitor can also show */
 266 extern const struct omap_video_timings omap_dss_pal_timings;
 267 extern const struct omap_video_timings omap_dss_ntsc_timings;
 268 #endif
 269
 270 struct omap_overlay_info {
 271         bool enabled;
 272
 273         u32 paddr;
 274         void __iomem *vaddr;
 275         u16 screen_width;
 276         u16 width;
 277         u16 height;
 278         enum omap_color_mode color_mode;
 279         u8 rotation;
 280         enum omap_dss_rotation_type rotation_type;
 281         bool mirror;
 282
 283         u16 pos_x;
 284         u16 pos_y;
 285         u16 out_width;  /* if 0, out_width == width */
 286         u16 out_height; /* if 0, out_height == height */
 287         u8 global_alpha;
 288         u8 pre_mult_alpha;
 289 };
 290
 291 struct omap_overlay {
 292         struct kobject kobj;
 293         struct list_head list;
 294
 295         /* static fields */
 296         const char *name;
 297         int id;
 298         enum omap_color_mode supported_modes;
 299         enum omap_overlay_caps caps;
 300
 301         /* dynamic fields */
 302         struct omap_overlay_manager *manager;
 303         struct omap_overlay_info info;
 304
 305         /* if true, info has been changed, but not applied() yet */
 306         bool info_dirty;
 307
 308         int (*set_manager)(struct omap_overlay *ovl,
 309                 struct omap_overlay_manager *mgr);
 310         int (*unset_manager)(struct omap_overlay *ovl);
 311
 312         int (*set_overlay_info)(struct omap_overlay *ovl,
 313                         struct omap_overlay_info *info);
 314         void (*get_overlay_info)(struct omap_overlay *ovl,
 315                         struct omap_overlay_info *info);
 316
 317         int (*wait_for_go)(struct omap_overlay *ovl);
 318 };
 319
 320 struct omap_overlay_manager_info {
 321         u32 default_color;
 322
 323         enum omap_dss_trans_key_type trans_key_type;
 324         u32 trans_key;
 325         bool trans_enabled;
 326
 327         bool alpha_enabled;
 328 };
 329
 330 struct omap_overlay_manager {
 331         struct kobject kobj;
 332         struct list_head list;
 333
 334         /* static fields */
 335         const char *name;
 336         int id;
 337         enum omap_overlay_manager_caps caps;
 338         int num_overlays;
 339         struct omap_overlay **overlays;
 340         enum omap_display_type supported_displays;
 341
 342         /* dynamic fields */
 343         struct omap_dss_device *device;
 344         struct omap_overlay_manager_info info;
 345
 346         bool device_changed;
 347         /* if true, info has been changed but not applied() yet */
 348         bool info_dirty;
 349
 350         int (*set_device)(struct omap_overlay_manager *mgr,
 351                 struct omap_dss_device *dssdev);
 352         int (*unset_device)(struct omap_overlay_manager *mgr);
 353
 354         int (*set_manager_info)(struct omap_overlay_manager *mgr,
 355                         struct omap_overlay_manager_info *info);
 356         void (*get_manager_info)(struct omap_overlay_manager *mgr,
 357                         struct omap_overlay_manager_info *info);
 358
 359         int (*apply)(struct omap_overlay_manager *mgr);
 360         int (*wait_for_go)(struct omap_overlay_manager *mgr);
 361         int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
 362
 363         int (*enable)(struct omap_overlay_manager *mgr);
 364         int (*disable)(struct omap_overlay_manager *mgr);
 365 };
 366
 367 struct omap_dss_device {
 368         struct device dev;
 369
 370         enum omap_display_type type;
 371
 372         enum omap_channel channel;
 373
 374         union {
 375                 struct {
 376                         u8 data_lines;
 377                 } dpi;
 378
 379                 struct {
 380                         u8 channel;
 381                         u8 data_lines;
 382                 } rfbi;
 383
 384                 struct {
 385                         u8 datapairs;
 386                 } sdi;
 387
 388                 struct {
 389                         u8 clk_lane;
 390                         u8 clk_pol;
 391                         u8 data1_lane;
 392                         u8 data1_pol;
 393                         u8 data2_lane;
 394                         u8 data2_pol;
 395
 396                         struct {
 397                                 u16 regn;
 398                                 u16 regm;
 399                                 u16 regm3;
 400                                 u16 regm4;
 401
 402                                 u16 lp_clk_div;
 403
 404                                 u16 lck_div;
 405                                 u16 pck_div;
 406                         } div;
 407
 408                         bool ext_te;
 409                         u8 ext_te_gpio;
 410                 } dsi;
 411
 412                 struct {
 413                         enum omap_dss_venc_type type;
 414                         bool invert_polarity;
 415                 } venc;
 416         } phy;
 417
 418         struct {
 419                 struct omap_video_timings timings;
 420
 421                 int acbi;       /* ac-bias pin transitions per interrupt */
 422                 /* Unit: line clocks */
 423                 int acb;        /* ac-bias pin frequency */
 424
 425                 enum omap_panel_config config;
 426         } panel;
 427
 428         struct {
 429                 u8 pixel_size;
 430                 struct rfbi_timings rfbi_timings;
 431         } ctrl;
 432
 433         int reset_gpio;
 434
 435         int max_backlight_level;
 436
 437         const char *name;
 438
 439         /* used to match device to driver */
 440         const char *driver_name;
 441
 442         void *data;
 443
 444         struct omap_dss_driver *driver;
 445
 446         /* helper variable for driver suspend/resume */
 447         bool activate_after_resume;
 448
 449         enum omap_display_caps caps;
 450
 451         struct omap_overlay_manager *manager;
 452
 453         enum omap_dss_display_state state;
 454
 455         /* platform specific  */
 456         int (*platform_enable)(struct omap_dss_device *dssdev);
 457         void (*platform_disable)(struct omap_dss_device *dssdev);
 458         int (*set_backlight)(struct omap_dss_device *dssdev, int level);
 459         int (*get_backlight)(struct omap_dss_device *dssdev);
 460 };
 461
 462 struct omap_dss_driver {
 463         struct device_driver driver;
 464
 465         int (*probe)(struct omap_dss_device *);
 466         void (*remove)(struct omap_dss_device *);
 467
 468         int (*enable)(struct omap_dss_device *display);
 469         void (*disable)(struct omap_dss_device *display);
 470         int (*suspend)(struct omap_dss_device *display);
 471         int (*resume)(struct omap_dss_device *display);
 472         int (*run_test)(struct omap_dss_device *display, int test);
 473
 474         int (*set_update_mode)(struct omap_dss_device *dssdev,
 475                         enum omap_dss_update_mode);
 476         enum omap_dss_update_mode (*get_update_mode)(
 477                         struct omap_dss_device *dssdev);
 478
 479         int (*update)(struct omap_dss_device *dssdev,
 480                                u16 x, u16 y, u16 w, u16 h);
 481         int (*sync)(struct omap_dss_device *dssdev);
 482
 483         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 484         int (*get_te)(struct omap_dss_device *dssdev);
 485
 486         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 487         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 488
 489         bool (*get_mirror)(struct omap_dss_device *dssdev);
 490         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 491
 492         int (*memory_read)(struct omap_dss_device *dssdev,
 493                         void *buf, size_t size,
 494                         u16 x, u16 y, u16 w, u16 h);
 495
 496         void (*get_resolution)(struct omap_dss_device *dssdev,
 497                         u16 *xres, u16 *yres);
 498         int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
 499
 500         int (*check_timings)(struct omap_dss_device *dssdev,
 501                         struct omap_video_timings *timings);
 502         void (*set_timings)(struct omap_dss_device *dssdev,
 503                         struct omap_video_timings *timings);
 504         void (*get_timings)(struct omap_dss_device *dssdev,
 505                         struct omap_video_timings *timings);
 506
 507         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 508         u32 (*get_wss)(struct omap_dss_device *dssdev);
 509 };
 510
 511 int omap_dss_register_driver(struct omap_dss_driver *);
 512 void omap_dss_unregister_driver(struct omap_dss_driver *);
 513
 514 int omap_dss_register_device(struct omap_dss_device *);
 515 void omap_dss_unregister_device(struct omap_dss_device *);
 516
 517 void omap_dss_get_device(struct omap_dss_device *dssdev);
 518 void omap_dss_put_device(struct omap_dss_device *dssdev);
 519 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 520 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 521 struct omap_dss_device *omap_dss_find_device(void *data,
 522                 int (*match)(struct omap_dss_device *dssdev, void *data));
 523
 524 int omap_dss_start_device(struct omap_dss_device *dssdev);
 525 void omap_dss_stop_device(struct omap_dss_device *dssdev);
 526
 527 int omap_dss_get_num_overlay_managers(void);
 528 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 529
 530 int omap_dss_get_num_overlays(void);
 531 struct omap_overlay *omap_dss_get_overlay(int num);
 532
 533 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
 534                 u16 *xres, u16 *yres);
 535 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
 536
 537 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 538 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 539 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 540
 541 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
 542 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
 543                 unsigned long timeout);
 544
 545 #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
 546 #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
 547
 548 void omapdss_dsi_vc_enable_hs(int channel, bool enable);
 549 int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
 550
 551 int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
 552                                     u16 *x, u16 *y, u16 *w, u16 *h,
 553                                     bool enlarge_update_area);
 554 int omap_dsi_update(struct omap_dss_device *dssdev,
 555                 int channel,
 556                 u16 x, u16 y, u16 w, u16 h,
 557                 void (*callback)(int, void *), void *data);
 558
 559 int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
 560 void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
 561
 562 int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
 563 void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
 564 void dpi_set_timings(struct omap_dss_device *dssdev,
 565                         struct omap_video_timings *timings);
 566 int dpi_check_timings(struct omap_dss_device *dssdev,
 567                         struct omap_video_timings *timings);
 568
 569 int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
 570 void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
 571
 572 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
 573 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
 574 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
 575                 u16 *x, u16 *y, u16 *w, u16 *h);
 576 int omap_rfbi_update(struct omap_dss_device *dssdev,
 577                 u16 x, u16 y, u16 w, u16 h,
 578                 void (*callback)(void *), void *data);
 579
 580 #endif