arch/arm/plat-omap/dmtimer.c

   1 /*
   2  * linux/arch/arm/plat-omap/dmtimer.c
   3  *
   4  * OMAP Dual-Mode Timers
   5  *
   6  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   7  * Tarun Kanti DebBarma <tarun.kanti@ti.com>
   8  * Thara Gopinath <thara@ti.com>
   9  *
  10  * dmtimer adaptation to platform_driver.
  11  *
  12  * Copyright (C) 2005 Nokia Corporation
  13  * OMAP2 support by Juha Yrjola
  14  * API improvements and OMAP2 clock framework support by Timo Teras
  15  *
  16  * Copyright (C) 2009 Texas Instruments
  17  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  18  *
  19  * This program is free software; you can redistribute it and/or modify it
  20  * under the terms of the GNU General Public License as published by the
  21  * Free Software Foundation; either version 2 of the License, or (at your
  22  * option) any later version.
  23  *
  24  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  27  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * You should have received a copy of the  GNU General Public License along
  34  * with this program; if not, write  to the Free Software Foundation, Inc.,
  35  * 675 Mass Ave, Cambridge, MA 02139, USA.
  36  */
  37
  38 #include <linux/module.h>
  39 #include <linux/io.h>
  40 #include <linux/slab.h>
  41 #include <linux/err.h>
  42 #include <linux/pm_runtime.h>
  43
  44 #include <plat/dmtimer.h>
  45
  46 static LIST_HEAD(omap_timer_list);
  47 static DEFINE_SPINLOCK(dm_timer_lock);
  48
  49 /**
  50  * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
  51  * @timer:      timer pointer over which read operation to perform
  52  * @reg:        lowest byte holds the register offset
  53  *
  54  * The posted mode bit is encoded in reg. Note that in posted mode write
  55  * pending bit must be checked. Otherwise a read of a non completed write
  56  * will produce an error.
  57  */
  58 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
  59 {
  60         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  61         return __omap_dm_timer_read(timer, reg, timer->posted);
  62 }
  63
  64 /**
  65  * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
  66  * @timer:      timer pointer over which write operation is to perform
  67  * @reg:        lowest byte holds the register offset
  68  * @value:      data to write into the register
  69  *
  70  * The posted mode bit is encoded in reg. Note that in posted mode the write
  71  * pending bit must be checked. Otherwise a write on a register which has a
  72  * pending write will be lost.
  73  */
  74 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
  75                                                 u32 value)
  76 {
  77         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  78         __omap_dm_timer_write(timer, reg, value, timer->posted);
  79 }
  80
  81 static void omap_timer_restore_context(struct omap_dm_timer *timer)
  82 {
  83         __raw_writel(timer->context.tiocp_cfg,
  84                         timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
  85         if (timer->revision == 1)
  86                 __raw_writel(timer->context.tistat, timer->sys_stat);
  87
  88         __raw_writel(timer->context.tisr, timer->irq_stat);
  89         omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
  90                                 timer->context.twer);
  91         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
  92                                 timer->context.tcrr);
  93         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
  94                                 timer->context.tldr);
  95         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
  96                                 timer->context.tmar);
  97         omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
  98                                 timer->context.tsicr);
  99         __raw_writel(timer->context.tier, timer->irq_ena);
 100         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
 101                                 timer->context.tclr);
 102 }
 103
 104 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 105 {
 106         int c;
 107
 108         if (!timer->sys_stat)
 109                 return;
 110
 111         c = 0;
 112         while (!(__raw_readl(timer->sys_stat) & 1)) {
 113                 c++;
 114                 if (c > 100000) {
 115                         printk(KERN_ERR "Timer failed to reset\n");
 116                         return;
 117                 }
 118         }
 119 }
 120
 121 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 122 {
 123         omap_dm_timer_enable(timer);
 124         if (timer->pdev->id != 1) {
 125                 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
 126                 omap_dm_timer_wait_for_reset(timer);
 127         }
 128
 129         __omap_dm_timer_reset(timer, 0, 0);
 130         omap_dm_timer_disable(timer);
 131         timer->posted = 1;
 132 }
 133
 134 int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 135 {
 136         struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
 137         int ret;
 138
 139         timer->fclk = clk_get(&timer->pdev->dev, "fck");
 140         if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
 141                 timer->fclk = NULL;
 142                 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
 143                 return -EINVAL;
 144         }
 145
 146         if (pdata->needs_manual_reset)
 147                 omap_dm_timer_reset(timer);
 148
 149         ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 150
 151         timer->posted = 1;
 152         return ret;
 153 }
 154
 155 struct omap_dm_timer *omap_dm_timer_request(void)
 156 {
 157         struct omap_dm_timer *timer = NULL, *t;
 158         unsigned long flags;
 159         int ret = 0;
 160
 161         spin_lock_irqsave(&dm_timer_lock, flags);
 162         list_for_each_entry(t, &omap_timer_list, node) {
 163                 if (t->reserved)
 164                         continue;
 165
 166                 timer = t;
 167                 timer->reserved = 1;
 168                 break;
 169         }
 170
 171         if (timer) {
 172                 ret = omap_dm_timer_prepare(timer);
 173                 if (ret) {
 174                         timer->reserved = 0;
 175                         timer = NULL;
 176                 }
 177         }
 178         spin_unlock_irqrestore(&dm_timer_lock, flags);
 179
 180         if (!timer)
 181                 pr_debug("%s: timer request failed!\n", __func__);
 182
 183         return timer;
 184 }
 185 EXPORT_SYMBOL_GPL(omap_dm_timer_request);
 186
 187 struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 188 {
 189         struct omap_dm_timer *timer = NULL, *t;
 190         unsigned long flags;
 191         int ret = 0;
 192
 193         spin_lock_irqsave(&dm_timer_lock, flags);
 194         list_for_each_entry(t, &omap_timer_list, node) {
 195                 if (t->pdev->id == id && !t->reserved) {
 196                         timer = t;
 197                         timer->reserved = 1;
 198                         break;
 199                 }
 200         }
 201
 202         if (timer) {
 203                 ret = omap_dm_timer_prepare(timer);
 204                 if (ret) {
 205                         timer->reserved = 0;
 206                         timer = NULL;
 207                 }
 208         }
 209         spin_unlock_irqrestore(&dm_timer_lock, flags);
 210
 211         if (!timer)
 212                 pr_debug("%s: timer%d request failed!\n", __func__, id);
 213
 214         return timer;
 215 }
 216 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 217
 218 int omap_dm_timer_free(struct omap_dm_timer *timer)
 219 {
 220         if (unlikely(!timer))
 221                 return -EINVAL;
 222
 223         clk_put(timer->fclk);
 224
 225         WARN_ON(!timer->reserved);
 226         timer->reserved = 0;
 227         return 0;
 228 }
 229 EXPORT_SYMBOL_GPL(omap_dm_timer_free);
 230
 231 void omap_dm_timer_enable(struct omap_dm_timer *timer)
 232 {
 233         pm_runtime_get_sync(&timer->pdev->dev);
 234 }
 235 EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 236
 237 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 238 {
 239         pm_runtime_put_sync(&timer->pdev->dev);
 240 }
 241 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
 242
 243 int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 244 {
 245         if (timer)
 246                 return timer->irq;
 247         return -EINVAL;
 248 }
 249 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 250
 251 #if defined(CONFIG_ARCH_OMAP1)
 252
 253 /**
 254  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
 255  * @inputmask: current value of idlect mask
 256  */
 257 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 258 {
 259         int i = 0;
 260         struct omap_dm_timer *timer = NULL;
 261         unsigned long flags;
 262
 263         /* If ARMXOR cannot be idled this function call is unnecessary */
 264         if (!(inputmask & (1 << 1)))
 265                 return inputmask;
 266
 267         /* If any active timer is using ARMXOR return modified mask */
 268         spin_lock_irqsave(&dm_timer_lock, flags);
 269         list_for_each_entry(timer, &omap_timer_list, node) {
 270                 u32 l;
 271
 272                 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 273                 if (l & OMAP_TIMER_CTRL_ST) {
 274                         if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
 275                                 inputmask &= ~(1 << 1);
 276                         else
 277                                 inputmask &= ~(1 << 2);
 278                 }
 279                 i++;
 280         }
 281         spin_unlock_irqrestore(&dm_timer_lock, flags);
 282
 283         return inputmask;
 284 }
 285 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 286
 287 #else
 288
 289 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
 290 {
 291         if (timer)
 292                 return timer->fclk;
 293         return NULL;
 294 }
 295 EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
 296
 297 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 298 {
 299         BUG();
 300
 301         return 0;
 302 }
 303 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 304
 305 #endif
 306
 307 int omap_dm_timer_trigger(struct omap_dm_timer *timer)
 308 {
 309         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 310                 pr_err("%s: timer not available or enabled.\n", __func__);
 311                 return -EINVAL;
 312         }
 313
 314         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 315         return 0;
 316 }
 317 EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
 318
 319 int omap_dm_timer_start(struct omap_dm_timer *timer)
 320 {
 321         u32 l;
 322
 323         if (unlikely(!timer))
 324                 return -EINVAL;
 325
 326         omap_dm_timer_enable(timer);
 327
 328         if (timer->loses_context) {
 329                 u32 ctx_loss_cnt_after =
 330                         timer->get_context_loss_count(&timer->pdev->dev);
 331                 if (ctx_loss_cnt_after != timer->ctx_loss_count)
 332                         omap_timer_restore_context(timer);
 333         }
 334
 335         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 336         if (!(l & OMAP_TIMER_CTRL_ST)) {
 337                 l |= OMAP_TIMER_CTRL_ST;
 338                 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 339         }
 340
 341         /* Save the context */
 342         timer->context.tclr = l;
 343         return 0;
 344 }
 345 EXPORT_SYMBOL_GPL(omap_dm_timer_start);
 346
 347 int omap_dm_timer_stop(struct omap_dm_timer *timer)
 348 {
 349         unsigned long rate = 0;
 350         struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
 351
 352         if (unlikely(!timer))
 353                 return -EINVAL;
 354
 355         if (!pdata->needs_manual_reset)
 356                 rate = clk_get_rate(timer->fclk);
 357
 358         __omap_dm_timer_stop(timer, timer->posted, rate);
 359
 360         if (timer->loses_context && timer->get_context_loss_count)
 361                 timer->ctx_loss_count =
 362                         timer->get_context_loss_count(&timer->pdev->dev);
 363
 364         /*
 365          * Since the register values are computed and written within
 366          * __omap_dm_timer_stop, we need to use read to retrieve the
 367          * context.
 368          */
 369         timer->context.tclr =
 370                         omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 371         timer->context.tisr = __raw_readl(timer->irq_stat);
 372         omap_dm_timer_disable(timer);
 373         return 0;
 374 }
 375 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
 376
 377 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 378 {
 379         int ret;
 380         struct dmtimer_platform_data *pdata;
 381
 382         if (unlikely(!timer))
 383                 return -EINVAL;
 384
 385         pdata = timer->pdev->dev.platform_data;
 386
 387         if (source < 0 || source >= 3)
 388                 return -EINVAL;
 389
 390         ret = pdata->set_timer_src(timer->pdev, source);
 391
 392         return ret;
 393 }
 394 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 395
 396 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
 397                             unsigned int load)
 398 {
 399         u32 l;
 400
 401         if (unlikely(!timer))
 402                 return -EINVAL;
 403
 404         omap_dm_timer_enable(timer);
 405         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 406         if (autoreload)
 407                 l |= OMAP_TIMER_CTRL_AR;
 408         else
 409                 l &= ~OMAP_TIMER_CTRL_AR;
 410         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 411         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 412
 413         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 414         /* Save the context */
 415         timer->context.tclr = l;
 416         timer->context.tldr = load;
 417         omap_dm_timer_disable(timer);
 418         return 0;
 419 }
 420 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
 421
 422 /* Optimized set_load which removes costly spin wait in timer_start */
 423 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
 424                             unsigned int load)
 425 {
 426         u32 l;
 427
 428         if (unlikely(!timer))
 429                 return -EINVAL;
 430
 431         omap_dm_timer_enable(timer);
 432
 433         if (timer->loses_context) {
 434                 u32 ctx_loss_cnt_after =
 435                         timer->get_context_loss_count(&timer->pdev->dev);
 436                 if (ctx_loss_cnt_after != timer->ctx_loss_count)
 437                         omap_timer_restore_context(timer);
 438         }
 439
 440         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 441         if (autoreload) {
 442                 l |= OMAP_TIMER_CTRL_AR;
 443                 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 444         } else {
 445                 l &= ~OMAP_TIMER_CTRL_AR;
 446         }
 447         l |= OMAP_TIMER_CTRL_ST;
 448
 449         __omap_dm_timer_load_start(timer, l, load, timer->posted);
 450
 451         /* Save the context */
 452         timer->context.tclr = l;
 453         timer->context.tldr = load;
 454         timer->context.tcrr = load;
 455         return 0;
 456 }
 457 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
 458
 459 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
 460                              unsigned int match)
 461 {
 462         u32 l;
 463
 464         if (unlikely(!timer))
 465                 return -EINVAL;
 466
 467         omap_dm_timer_enable(timer);
 468         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 469         if (enable)
 470                 l |= OMAP_TIMER_CTRL_CE;
 471         else
 472                 l &= ~OMAP_TIMER_CTRL_CE;
 473         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 474         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
 475
 476         /* Save the context */
 477         timer->context.tclr = l;
 478         timer->context.tmar = match;
 479         omap_dm_timer_disable(timer);
 480         return 0;
 481 }
 482 EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
 483
 484 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
 485                            int toggle, int trigger)
 486 {
 487         u32 l;
 488
 489         if (unlikely(!timer))
 490                 return -EINVAL;
 491
 492         omap_dm_timer_enable(timer);
 493         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 494         l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
 495                OMAP_TIMER_CTRL_PT | (0x03 << 10));
 496         if (def_on)
 497                 l |= OMAP_TIMER_CTRL_SCPWM;
 498         if (toggle)
 499                 l |= OMAP_TIMER_CTRL_PT;
 500         l |= trigger << 10;
 501         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 502
 503         /* Save the context */
 504         timer->context.tclr = l;
 505         omap_dm_timer_disable(timer);
 506         return 0;
 507 }
 508 EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
 509
 510 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
 511 {
 512         u32 l;
 513
 514         if (unlikely(!timer))
 515                 return -EINVAL;
 516
 517         omap_dm_timer_enable(timer);
 518         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 519         l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
 520         if (prescaler >= 0x00 && prescaler <= 0x07) {
 521                 l |= OMAP_TIMER_CTRL_PRE;
 522                 l |= prescaler << 2;
 523         }
 524         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 525
 526         /* Save the context */
 527         timer->context.tclr = l;
 528         omap_dm_timer_disable(timer);
 529         return 0;
 530 }
 531 EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
 532
 533 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 534                                   unsigned int value)
 535 {
 536         if (unlikely(!timer))
 537                 return -EINVAL;
 538
 539         omap_dm_timer_enable(timer);
 540         __omap_dm_timer_int_enable(timer, value);
 541
 542         /* Save the context */
 543         timer->context.tier = value;
 544         timer->context.twer = value;
 545         omap_dm_timer_disable(timer);
 546         return 0;
 547 }
 548 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 549
 550 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 551 {
 552         unsigned int l;
 553
 554         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 555                 pr_err("%s: timer not available or enabled.\n", __func__);
 556                 return 0;
 557         }
 558
 559         l = __raw_readl(timer->irq_stat);
 560
 561         return l;
 562 }
 563 EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
 564
 565 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
 566 {
 567         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
 568                 return -EINVAL;
 569
 570         __omap_dm_timer_write_status(timer, value);
 571         /* Save the context */
 572         timer->context.tisr = value;
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
 576
 577 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
 578 {
 579         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 580                 pr_err("%s: timer not iavailable or enabled.\n", __func__);
 581                 return 0;
 582         }
 583
 584         return __omap_dm_timer_read_counter(timer, timer->posted);
 585 }
 586 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
 587
 588 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
 589 {
 590         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 591                 pr_err("%s: timer not available or enabled.\n", __func__);
 592                 return -EINVAL;
 593         }
 594
 595         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
 596
 597         /* Save the context */
 598         timer->context.tcrr = value;
 599         return 0;
 600 }
 601 EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
 602
 603 int omap_dm_timers_active(void)
 604 {
 605         struct omap_dm_timer *timer;
 606
 607         list_for_each_entry(timer, &omap_timer_list, node) {
 608                 if (!timer->reserved)
 609                         continue;
 610
 611                 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
 612                     OMAP_TIMER_CTRL_ST) {
 613                         return 1;
 614                 }
 615         }
 616         return 0;
 617 }
 618 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 619
 620 /**
 621  * omap_dm_timer_probe - probe function called for every registered device
 622  * @pdev:       pointer to current timer platform device
 623  *
 624  * Called by driver framework at the end of device registration for all
 625  * timer devices.
 626  */
 627 static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
 628 {
 629         int ret;
 630         unsigned long flags;
 631         struct omap_dm_timer *timer;
 632         struct resource *mem, *irq, *ioarea;
 633         struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 634
 635         if (!pdata) {
 636                 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
 637                 return -ENODEV;
 638         }
 639
 640         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 641         if (unlikely(!irq)) {
 642                 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
 643                 return -ENODEV;
 644         }
 645
 646         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 647         if (unlikely(!mem)) {
 648                 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
 649                 return -ENODEV;
 650         }
 651
 652         ioarea = request_mem_region(mem->start, resource_size(mem),
 653                         pdev->name);
 654         if (!ioarea) {
 655                 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
 656                 return -EBUSY;
 657         }
 658
 659         timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
 660         if (!timer) {
 661                 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
 662                         __func__);
 663                 ret = -ENOMEM;
 664                 goto err_free_ioregion;
 665         }
 666
 667         timer->io_base = ioremap(mem->start, resource_size(mem));
 668         if (!timer->io_base) {
 669                 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
 670                 ret = -ENOMEM;
 671                 goto err_free_mem;
 672         }
 673
 674         timer->id = pdev->id;
 675         timer->irq = irq->start;
 676         timer->reserved = pdata->reserved;
 677         timer->pdev = pdev;
 678         timer->loses_context = pdata->loses_context;
 679         timer->get_context_loss_count = pdata->get_context_loss_count;
 680
 681         /* Skip pm_runtime_enable for OMAP1 */
 682         if (!pdata->needs_manual_reset) {
 683                 pm_runtime_enable(&pdev->dev);
 684                 pm_runtime_irq_safe(&pdev->dev);
 685         }
 686
 687         if (!timer->reserved) {
 688                 pm_runtime_get_sync(&pdev->dev);
 689                 __omap_dm_timer_init_regs(timer);
 690                 pm_runtime_put(&pdev->dev);
 691         }
 692
 693         /* add the timer element to the list */
 694         spin_lock_irqsave(&dm_timer_lock, flags);
 695         list_add_tail(&timer->node, &omap_timer_list);
 696         spin_unlock_irqrestore(&dm_timer_lock, flags);
 697
 698         dev_dbg(&pdev->dev, "Device Probed.\n");
 699
 700         return 0;
 701
 702 err_free_mem:
 703         kfree(timer);
 704
 705 err_free_ioregion:
 706         release_mem_region(mem->start, resource_size(mem));
 707
 708         return ret;
 709 }
 710
 711 /**
 712  * omap_dm_timer_remove - cleanup a registered timer device
 713  * @pdev:       pointer to current timer platform device
 714  *
 715  * Called by driver framework whenever a timer device is unregistered.
 716  * In addition to freeing platform resources it also deletes the timer
 717  * entry from the local list.
 718  */
 719 static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 720 {
 721         struct omap_dm_timer *timer;
 722         unsigned long flags;
 723         int ret = -EINVAL;
 724
 725         spin_lock_irqsave(&dm_timer_lock, flags);
 726         list_for_each_entry(timer, &omap_timer_list, node)
 727                 if (timer->pdev->id == pdev->id) {
 728                         list_del(&timer->node);
 729                         kfree(timer);
 730                         ret = 0;
 731                         break;
 732                 }
 733         spin_unlock_irqrestore(&dm_timer_lock, flags);
 734
 735         return ret;
 736 }
 737
 738 static struct platform_driver omap_dm_timer_driver = {
 739         .probe  = omap_dm_timer_probe,
 740         .remove = __devexit_p(omap_dm_timer_remove),
 741         .driver = {
 742                 .name   = "omap_timer",
 743         },
 744 };
 745
 746 static int __init omap_dm_timer_driver_init(void)
 747 {
 748         return platform_driver_register(&omap_dm_timer_driver);
 749 }
 750
 751 static void __exit omap_dm_timer_driver_exit(void)
 752 {
 753         platform_driver_unregister(&omap_dm_timer_driver);
 754 }
 755
 756 early_platform_init("earlytimer", &omap_dm_timer_driver);
 757 module_init(omap_dm_timer_driver_init);
 758 module_exit(omap_dm_timer_driver_exit);
 759
 760 MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
 761 MODULE_LICENSE("GPL");
 762 MODULE_ALIAS("platform:" DRIVER_NAME);
 763 MODULE_AUTHOR("Texas Instruments Inc");