arch/arm/plat-omap/dmtimer.c

   1 /*
   2  * linux/arch/arm/plat-omap/dmtimer.c
   3  *
   4  * OMAP Dual-Mode Timers
   5  *
   6  * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   7  * Tarun Kanti DebBarma <tarun.kanti@ti.com>
   8  * Thara Gopinath <thara@ti.com>
   9  *
  10  * dmtimer adaptation to platform_driver.
  11  *
  12  * Copyright (C) 2005 Nokia Corporation
  13  * OMAP2 support by Juha Yrjola
  14  * API improvements and OMAP2 clock framework support by Timo Teras
  15  *
  16  * Copyright (C) 2009 Texas Instruments
  17  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  18  *
  19  * This program is free software; you can redistribute it and/or modify it
  20  * under the terms of the GNU General Public License as published by the
  21  * Free Software Foundation; either version 2 of the License, or (at your
  22  * option) any later version.
  23  *
  24  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  25  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  26  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  27  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  * You should have received a copy of the  GNU General Public License along
  34  * with this program; if not, write  to the Free Software Foundation, Inc.,
  35  * 675 Mass Ave, Cambridge, MA 02139, USA.
  36  */
  37
  38 #include <linux/module.h>
  39 #include <linux/io.h>
  40 #include <linux/slab.h>
  41 #include <linux/err.h>
  42 #include <linux/pm_runtime.h>
  43
  44 #include <plat/dmtimer.h>
  45
  46 static LIST_HEAD(omap_timer_list);
  47 static DEFINE_SPINLOCK(dm_timer_lock);
  48
  49 /**
  50  * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
  51  * @timer:      timer pointer over which read operation to perform
  52  * @reg:        lowest byte holds the register offset
  53  *
  54  * The posted mode bit is encoded in reg. Note that in posted mode write
  55  * pending bit must be checked. Otherwise a read of a non completed write
  56  * will produce an error.
  57  */
  58 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
  59 {
  60         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  61         return __omap_dm_timer_read(timer, reg, timer->posted);
  62 }
  63
  64 /**
  65  * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
  66  * @timer:      timer pointer over which write operation is to perform
  67  * @reg:        lowest byte holds the register offset
  68  * @value:      data to write into the register
  69  *
  70  * The posted mode bit is encoded in reg. Note that in posted mode the write
  71  * pending bit must be checked. Otherwise a write on a register which has a
  72  * pending write will be lost.
  73  */
  74 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
  75                                                 u32 value)
  76 {
  77         WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
  78         __omap_dm_timer_write(timer, reg, value, timer->posted);
  79 }
  80
  81 static void omap_timer_restore_context(struct omap_dm_timer *timer)
  82 {
  83         omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET,
  84                                 timer->context.tiocp_cfg);
  85         if (timer->revision > 1)
  86                 __raw_writel(timer->context.tistat, timer->sys_stat);
  87
  88         __raw_writel(timer->context.tisr, timer->irq_stat);
  89         omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
  90                                 timer->context.twer);
  91         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
  92                                 timer->context.tcrr);
  93         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
  94                                 timer->context.tldr);
  95         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
  96                                 timer->context.tmar);
  97         omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
  98                                 timer->context.tsicr);
  99         __raw_writel(timer->context.tier, timer->irq_ena);
 100         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
 101                                 timer->context.tclr);
 102 }
 103
 104 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 105 {
 106         int c;
 107
 108         if (!timer->sys_stat)
 109                 return;
 110
 111         c = 0;
 112         while (!(__raw_readl(timer->sys_stat) & 1)) {
 113                 c++;
 114                 if (c > 100000) {
 115                         printk(KERN_ERR "Timer failed to reset\n");
 116                         return;
 117                 }
 118         }
 119 }
 120
 121 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 122 {
 123         omap_dm_timer_enable(timer);
 124         if (timer->pdev->id != 1) {
 125                 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
 126                 omap_dm_timer_wait_for_reset(timer);
 127         }
 128
 129         __omap_dm_timer_reset(timer, 0, 0);
 130         omap_dm_timer_disable(timer);
 131         timer->posted = 1;
 132 }
 133
 134 int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 135 {
 136         struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
 137         int ret;
 138
 139         timer->fclk = clk_get(&timer->pdev->dev, "fck");
 140         if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
 141                 timer->fclk = NULL;
 142                 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
 143                 return -EINVAL;
 144         }
 145
 146         if (pdata->needs_manual_reset)
 147                 omap_dm_timer_reset(timer);
 148
 149         ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 150
 151         timer->posted = 1;
 152         return ret;
 153 }
 154
 155 struct omap_dm_timer *omap_dm_timer_request(void)
 156 {
 157         struct omap_dm_timer *timer = NULL, *t;
 158         unsigned long flags;
 159         int ret = 0;
 160
 161         spin_lock_irqsave(&dm_timer_lock, flags);
 162         list_for_each_entry(t, &omap_timer_list, node) {
 163                 if (t->reserved)
 164                         continue;
 165
 166                 timer = t;
 167                 timer->reserved = 1;
 168                 break;
 169         }
 170
 171         if (timer) {
 172                 ret = omap_dm_timer_prepare(timer);
 173                 if (ret) {
 174                         timer->reserved = 0;
 175                         timer = NULL;
 176                 }
 177         }
 178         spin_unlock_irqrestore(&dm_timer_lock, flags);
 179
 180         if (!timer)
 181                 pr_debug("%s: timer request failed!\n", __func__);
 182
 183         return timer;
 184 }
 185 EXPORT_SYMBOL_GPL(omap_dm_timer_request);
 186
 187 struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 188 {
 189         struct omap_dm_timer *timer = NULL, *t;
 190         unsigned long flags;
 191         int ret = 0;
 192
 193         spin_lock_irqsave(&dm_timer_lock, flags);
 194         list_for_each_entry(t, &omap_timer_list, node) {
 195                 if (t->pdev->id == id && !t->reserved) {
 196                         timer = t;
 197                         timer->reserved = 1;
 198                         break;
 199                 }
 200         }
 201
 202         if (timer) {
 203                 ret = omap_dm_timer_prepare(timer);
 204                 if (ret) {
 205                         timer->reserved = 0;
 206                         timer = NULL;
 207                 }
 208         }
 209         spin_unlock_irqrestore(&dm_timer_lock, flags);
 210
 211         if (!timer)
 212                 pr_debug("%s: timer%d request failed!\n", __func__, id);
 213
 214         return timer;
 215 }
 216 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 217
 218 int omap_dm_timer_free(struct omap_dm_timer *timer)
 219 {
 220         if (unlikely(!timer))
 221                 return -EINVAL;
 222
 223         clk_put(timer->fclk);
 224
 225         WARN_ON(!timer->reserved);
 226         timer->reserved = 0;
 227         return 0;
 228 }
 229 EXPORT_SYMBOL_GPL(omap_dm_timer_free);
 230
 231 void omap_dm_timer_enable(struct omap_dm_timer *timer)
 232 {
 233         pm_runtime_get_sync(&timer->pdev->dev);
 234 }
 235 EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 236
 237 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 238 {
 239         pm_runtime_put(&timer->pdev->dev);
 240 }
 241 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
 242
 243 int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 244 {
 245         if (timer)
 246                 return timer->irq;
 247         return -EINVAL;
 248 }
 249 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 250
 251 #if defined(CONFIG_ARCH_OMAP1)
 252
 253 /**
 254  * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
 255  * @inputmask: current value of idlect mask
 256  */
 257 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 258 {
 259         int i = 0;
 260         struct omap_dm_timer *timer = NULL;
 261         unsigned long flags;
 262
 263         /* If ARMXOR cannot be idled this function call is unnecessary */
 264         if (!(inputmask & (1 << 1)))
 265                 return inputmask;
 266
 267         /* If any active timer is using ARMXOR return modified mask */
 268         spin_lock_irqsave(&dm_timer_lock, flags);
 269         list_for_each_entry(timer, &omap_timer_list, node) {
 270                 u32 l;
 271
 272                 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 273                 if (l & OMAP_TIMER_CTRL_ST) {
 274                         if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
 275                                 inputmask &= ~(1 << 1);
 276                         else
 277                                 inputmask &= ~(1 << 2);
 278                 }
 279                 i++;
 280         }
 281         spin_unlock_irqrestore(&dm_timer_lock, flags);
 282
 283         return inputmask;
 284 }
 285 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 286
 287 #else
 288
 289 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
 290 {
 291         if (timer)
 292                 return timer->fclk;
 293         return NULL;
 294 }
 295 EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
 296
 297 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 298 {
 299         BUG();
 300
 301         return 0;
 302 }
 303 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 304
 305 #endif
 306
 307 int omap_dm_timer_trigger(struct omap_dm_timer *timer)
 308 {
 309         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 310                 pr_err("%s: timer not available or enabled.\n", __func__);
 311                 return -EINVAL;
 312         }
 313
 314         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 315         return 0;
 316 }
 317 EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
 318
 319 int omap_dm_timer_start(struct omap_dm_timer *timer)
 320 {
 321         u32 l;
 322
 323         if (unlikely(!timer))
 324                 return -EINVAL;
 325
 326         omap_dm_timer_enable(timer);
 327
 328         if (timer->loses_context) {
 329                 u32 ctx_loss_cnt_after =
 330                         timer->get_context_loss_count(&timer->pdev->dev);
 331                 if (ctx_loss_cnt_after != timer->ctx_loss_count)
 332                         omap_timer_restore_context(timer);
 333         }
 334
 335         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 336         if (!(l & OMAP_TIMER_CTRL_ST)) {
 337                 l |= OMAP_TIMER_CTRL_ST;
 338                 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 339         }
 340
 341         /* Save the context */
 342         timer->context.tclr = l;
 343         return 0;
 344 }
 345 EXPORT_SYMBOL_GPL(omap_dm_timer_start);
 346
 347 int omap_dm_timer_stop(struct omap_dm_timer *timer)
 348 {
 349         unsigned long rate = 0;
 350         struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
 351
 352         if (unlikely(!timer))
 353                 return -EINVAL;
 354
 355         if (!pdata->needs_manual_reset)
 356                 rate = clk_get_rate(timer->fclk);
 357
 358         __omap_dm_timer_stop(timer, timer->posted, rate);
 359
 360         return 0;
 361 }
 362 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
 363
 364 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 365 {
 366         int ret;
 367         struct dmtimer_platform_data *pdata;
 368
 369         if (unlikely(!timer))
 370                 return -EINVAL;
 371
 372         pdata = timer->pdev->dev.platform_data;
 373
 374         if (source < 0 || source >= 3)
 375                 return -EINVAL;
 376
 377         ret = pdata->set_timer_src(timer->pdev, source);
 378
 379         return ret;
 380 }
 381 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 382
 383 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
 384                             unsigned int load)
 385 {
 386         u32 l;
 387
 388         if (unlikely(!timer))
 389                 return -EINVAL;
 390
 391         omap_dm_timer_enable(timer);
 392         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 393         if (autoreload)
 394                 l |= OMAP_TIMER_CTRL_AR;
 395         else
 396                 l &= ~OMAP_TIMER_CTRL_AR;
 397         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 398         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 399
 400         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
 401         /* Save the context */
 402         timer->context.tclr = l;
 403         timer->context.tldr = load;
 404         omap_dm_timer_disable(timer);
 405         return 0;
 406 }
 407 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
 408
 409 /* Optimized set_load which removes costly spin wait in timer_start */
 410 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
 411                             unsigned int load)
 412 {
 413         u32 l;
 414
 415         if (unlikely(!timer))
 416                 return -EINVAL;
 417
 418         omap_dm_timer_enable(timer);
 419
 420         if (timer->loses_context) {
 421                 u32 ctx_loss_cnt_after =
 422                         timer->get_context_loss_count(&timer->pdev->dev);
 423                 if (ctx_loss_cnt_after != timer->ctx_loss_count)
 424                         omap_timer_restore_context(timer);
 425         }
 426
 427         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 428         if (autoreload) {
 429                 l |= OMAP_TIMER_CTRL_AR;
 430                 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 431         } else {
 432                 l &= ~OMAP_TIMER_CTRL_AR;
 433         }
 434         l |= OMAP_TIMER_CTRL_ST;
 435
 436         __omap_dm_timer_load_start(timer, l, load, timer->posted);
 437
 438         /* Save the context */
 439         timer->context.tclr = l;
 440         timer->context.tldr = load;
 441         timer->context.tcrr = load;
 442         return 0;
 443 }
 444 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
 445
 446 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
 447                              unsigned int match)
 448 {
 449         u32 l;
 450
 451         if (unlikely(!timer))
 452                 return -EINVAL;
 453
 454         omap_dm_timer_enable(timer);
 455         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 456         if (enable)
 457                 l |= OMAP_TIMER_CTRL_CE;
 458         else
 459                 l &= ~OMAP_TIMER_CTRL_CE;
 460         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 461         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
 462
 463         /* Save the context */
 464         timer->context.tclr = l;
 465         timer->context.tmar = match;
 466         omap_dm_timer_disable(timer);
 467         return 0;
 468 }
 469 EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
 470
 471 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
 472                            int toggle, int trigger)
 473 {
 474         u32 l;
 475
 476         if (unlikely(!timer))
 477                 return -EINVAL;
 478
 479         omap_dm_timer_enable(timer);
 480         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 481         l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
 482                OMAP_TIMER_CTRL_PT | (0x03 << 10));
 483         if (def_on)
 484                 l |= OMAP_TIMER_CTRL_SCPWM;
 485         if (toggle)
 486                 l |= OMAP_TIMER_CTRL_PT;
 487         l |= trigger << 10;
 488         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 489
 490         /* Save the context */
 491         timer->context.tclr = l;
 492         omap_dm_timer_disable(timer);
 493         return 0;
 494 }
 495 EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
 496
 497 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
 498 {
 499         u32 l;
 500
 501         if (unlikely(!timer))
 502                 return -EINVAL;
 503
 504         omap_dm_timer_enable(timer);
 505         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
 506         l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
 507         if (prescaler >= 0x00 && prescaler <= 0x07) {
 508                 l |= OMAP_TIMER_CTRL_PRE;
 509                 l |= prescaler << 2;
 510         }
 511         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
 512
 513         /* Save the context */
 514         timer->context.tclr = l;
 515         omap_dm_timer_disable(timer);
 516         return 0;
 517 }
 518 EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
 519
 520 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
 521                                   unsigned int value)
 522 {
 523         if (unlikely(!timer))
 524                 return -EINVAL;
 525
 526         omap_dm_timer_enable(timer);
 527         __omap_dm_timer_int_enable(timer, value);
 528
 529         /* Save the context */
 530         timer->context.tier = value;
 531         timer->context.twer = value;
 532         omap_dm_timer_disable(timer);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 536
 537 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 538 {
 539         unsigned int l;
 540
 541         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 542                 pr_err("%s: timer not available or enabled.\n", __func__);
 543                 return 0;
 544         }
 545
 546         l = __raw_readl(timer->irq_stat);
 547
 548         return l;
 549 }
 550 EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
 551
 552 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
 553 {
 554         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
 555                 return -EINVAL;
 556
 557         __omap_dm_timer_write_status(timer, value);
 558         /* Save the context */
 559         timer->context.tisr = value;
 560         return 0;
 561 }
 562 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
 563
 564 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
 565 {
 566         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 567                 pr_err("%s: timer not iavailable or enabled.\n", __func__);
 568                 return 0;
 569         }
 570
 571         return __omap_dm_timer_read_counter(timer, timer->posted);
 572 }
 573 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
 574
 575 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
 576 {
 577         if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
 578                 pr_err("%s: timer not available or enabled.\n", __func__);
 579                 return -EINVAL;
 580         }
 581
 582         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
 583
 584         /* Save the context */
 585         timer->context.tcrr = value;
 586         return 0;
 587 }
 588 EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
 589
 590 int omap_dm_timers_active(void)
 591 {
 592         struct omap_dm_timer *timer;
 593
 594         list_for_each_entry(timer, &omap_timer_list, node) {
 595                 if (!timer->reserved)
 596                         continue;
 597
 598                 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
 599                     OMAP_TIMER_CTRL_ST) {
 600                         return 1;
 601                 }
 602         }
 603         return 0;
 604 }
 605 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 606
 607 /**
 608  * omap_dm_timer_probe - probe function called for every registered device
 609  * @pdev:       pointer to current timer platform device
 610  *
 611  * Called by driver framework at the end of device registration for all
 612  * timer devices.
 613  */
 614 static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
 615 {
 616         int ret;
 617         unsigned long flags;
 618         struct omap_dm_timer *timer;
 619         struct resource *mem, *irq, *ioarea;
 620         struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 621
 622         if (!pdata) {
 623                 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
 624                 return -ENODEV;
 625         }
 626
 627         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
 628         if (unlikely(!irq)) {
 629                 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
 630                 return -ENODEV;
 631         }
 632
 633         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 634         if (unlikely(!mem)) {
 635                 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
 636                 return -ENODEV;
 637         }
 638
 639         ioarea = request_mem_region(mem->start, resource_size(mem),
 640                         pdev->name);
 641         if (!ioarea) {
 642                 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
 643                 return -EBUSY;
 644         }
 645
 646         timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
 647         if (!timer) {
 648                 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
 649                         __func__);
 650                 ret = -ENOMEM;
 651                 goto err_free_ioregion;
 652         }
 653
 654         timer->io_base = ioremap(mem->start, resource_size(mem));
 655         if (!timer->io_base) {
 656                 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
 657                 ret = -ENOMEM;
 658                 goto err_free_mem;
 659         }
 660
 661         timer->id = pdev->id;
 662         timer->irq = irq->start;
 663         timer->reserved = pdata->reserved;
 664         timer->pdev = pdev;
 665         timer->loses_context = pdata->loses_context;
 666         timer->get_context_loss_count = pdata->get_context_loss_count;
 667
 668         /* Skip pm_runtime_enable for OMAP1 */
 669         if (!pdata->needs_manual_reset) {
 670                 pm_runtime_enable(&pdev->dev);
 671                 pm_runtime_irq_safe(&pdev->dev);
 672         }
 673
 674         if (!timer->reserved) {
 675                 pm_runtime_get_sync(&pdev->dev);
 676                 __omap_dm_timer_init_regs(timer);
 677                 pm_runtime_put(&pdev->dev);
 678         }
 679
 680         /* add the timer element to the list */
 681         spin_lock_irqsave(&dm_timer_lock, flags);
 682         list_add_tail(&timer->node, &omap_timer_list);
 683         spin_unlock_irqrestore(&dm_timer_lock, flags);
 684
 685         dev_dbg(&pdev->dev, "Device Probed.\n");
 686
 687         return 0;
 688
 689 err_free_mem:
 690         kfree(timer);
 691
 692 err_free_ioregion:
 693         release_mem_region(mem->start, resource_size(mem));
 694
 695         return ret;
 696 }
 697
 698 /**
 699  * omap_dm_timer_remove - cleanup a registered timer device
 700  * @pdev:       pointer to current timer platform device
 701  *
 702  * Called by driver framework whenever a timer device is unregistered.
 703  * In addition to freeing platform resources it also deletes the timer
 704  * entry from the local list.
 705  */
 706 static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
 707 {
 708         struct omap_dm_timer *timer;
 709         unsigned long flags;
 710         int ret = -EINVAL;
 711
 712         spin_lock_irqsave(&dm_timer_lock, flags);
 713         list_for_each_entry(timer, &omap_timer_list, node)
 714                 if (timer->pdev->id == pdev->id) {
 715                         list_del(&timer->node);
 716                         kfree(timer);
 717                         ret = 0;
 718                         break;
 719                 }
 720         spin_unlock_irqrestore(&dm_timer_lock, flags);
 721
 722         return ret;
 723 }
 724
 725 static struct platform_driver omap_dm_timer_driver = {
 726         .probe  = omap_dm_timer_probe,
 727         .remove = __devexit_p(omap_dm_timer_remove),
 728         .driver = {
 729                 .name   = "omap_timer",
 730         },
 731 };
 732
 733 static int __init omap_dm_timer_driver_init(void)
 734 {
 735         return platform_driver_register(&omap_dm_timer_driver);
 736 }
 737
 738 static void __exit omap_dm_timer_driver_exit(void)
 739 {
 740         platform_driver_unregister(&omap_dm_timer_driver);
 741 }
 742
 743 early_platform_init("earlytimer", &omap_dm_timer_driver);
 744 module_init(omap_dm_timer_driver_init);
 745 module_exit(omap_dm_timer_driver_exit);
 746
 747 MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
 748 MODULE_LICENSE("GPL");
 749 MODULE_ALIAS("platform:" DRIVER_NAME);
 750 MODULE_AUTHOR("Texas Instruments Inc");