2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 #include <linux/clk.h>
23 #include <linux/err.h>
24 #include <linux/device.h>
25 #include <linux/dma-mapping.h>
26 #include <asm/sizes.h>
27 #include <mach/hardware.h>
28 #include <mach/devices-common.h>
30 #define imx_ahci_imx_data_entry_single(soc, _devid) \
33 .iobase = soc ## _SATA_BASE_ADDR, \
34 .irq = soc ## _INT_SATA, \
37 #ifdef CONFIG_SOC_IMX53
38 const struct imx_ahci_imx_data imx53_ahci_imx_data __initconst =
39 imx_ahci_imx_data_entry_single(MX53, "imx53-ahci");
44 HOST_CAP_SSS = (1 << 27), /* Staggered Spin-up */
45 HOST_PORTS_IMPL = 0x0c,
46 HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
49 static struct clk *sata_clk, *sata_ref_clk;
51 /* AHCI module Initialization, if return 0, initialization is successful. */
52 static int imx_sata_init(struct device *dev, void __iomem *addr)
58 sata_clk = clk_get(dev, "ahci");
59 if (IS_ERR(sata_clk)) {
60 dev_err(dev, "no sata clock.\n");
61 return PTR_ERR(sata_clk);
63 ret = clk_enable(sata_clk);
65 dev_err(dev, "can't enable sata clock.\n");
69 /* Get the AHCI SATA PHY CLK */
70 sata_ref_clk = clk_get(dev, "ahci_phy");
71 if (IS_ERR(sata_ref_clk)) {
72 dev_err(dev, "no sata ref clock.\n");
73 ret = PTR_ERR(sata_ref_clk);
74 goto release_sata_clk;
76 ret = clk_enable(sata_ref_clk);
78 dev_err(dev, "can't enable sata ref clock.\n");
79 goto put_sata_ref_clk;
82 /* Get the AHB clock rate, and configure the TIMER1MS reg later */
83 clk = clk_get(dev, "ahci_dma");
85 dev_err(dev, "no dma clock.\n");
87 goto release_sata_ref_clk;
89 tmpdata = clk_get_rate(clk) / 1000;
92 writel(tmpdata, addr + HOST_TIMER1MS);
94 tmpdata = readl(addr + HOST_CAP);
95 if (!(tmpdata & HOST_CAP_SSS)) {
96 tmpdata |= HOST_CAP_SSS;
97 writel(tmpdata, addr + HOST_CAP);
100 if (!(readl(addr + HOST_PORTS_IMPL) & 0x1))
101 writel((readl(addr + HOST_PORTS_IMPL) | 0x1),
102 addr + HOST_PORTS_IMPL);
106 release_sata_ref_clk:
107 clk_disable(sata_ref_clk);
109 clk_put(sata_ref_clk);
111 clk_disable(sata_clk);
118 static void imx_sata_exit(struct device *dev)
120 clk_disable(sata_ref_clk);
121 clk_put(sata_ref_clk);
123 clk_disable(sata_clk);
127 struct platform_device *__init imx_add_ahci_imx(
128 const struct imx_ahci_imx_data *data,
129 const struct ahci_platform_data *pdata)
131 struct resource res[] = {
133 .start = data->iobase,
134 .end = data->iobase + SZ_4K - 1,
135 .flags = IORESOURCE_MEM,
139 .flags = IORESOURCE_IRQ,
143 return imx_add_platform_device_dmamask(data->devid, 0,
144 res, ARRAY_SIZE(res),
145 pdata, sizeof(*pdata), DMA_BIT_MASK(32));
148 struct platform_device *__init imx53_add_ahci_imx(void)
150 struct ahci_platform_data pdata = {
151 .init = imx_sata_init,
152 .exit = imx_sata_exit,
155 return imx_add_ahci_imx(&imx53_ahci_imx_data, &pdata);