2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-contiguous.h>
21 #include <linux/highmem.h>
22 #include <linux/memblock.h>
23 #include <linux/slab.h>
24 #include <linux/iommu.h>
26 #include <linux/vmalloc.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/sizes.h>
33 #include <asm/mach/arch.h>
34 #include <asm/dma-iommu.h>
35 #include <asm/mach/map.h>
36 #include <asm/system.h>
37 #include <asm/dma-contiguous.h>
42 * The DMA API is built upon the notion of "buffer ownership". A buffer
43 * is either exclusively owned by the CPU (and therefore may be accessed
44 * by it) or exclusively owned by the DMA device. These helper functions
45 * represent the transitions between these two ownership states.
47 * Note, however, that on later ARMs, this notion does not work due to
48 * speculative prefetches. We model our approach on the assumption that
49 * the CPU does do speculative prefetches, which means we clean caches
50 * before transfers and delay cache invalidation until transfer completion.
53 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
54 size_t, enum dma_data_direction);
55 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
56 size_t, enum dma_data_direction);
59 * arm_dma_map_page - map a portion of a page for streaming DMA
60 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
61 * @page: page that buffer resides in
62 * @offset: offset into page for start of buffer
63 * @size: size of buffer to map
64 * @dir: DMA transfer direction
66 * Ensure that any data held in the cache is appropriately discarded
69 * The device owns this memory once this call has completed. The CPU
70 * can regain ownership by calling dma_unmap_page().
72 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
73 unsigned long offset, size_t size, enum dma_data_direction dir,
74 struct dma_attrs *attrs)
76 if (!arch_is_coherent())
77 __dma_page_cpu_to_dev(page, offset, size, dir);
78 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
82 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
83 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
84 * @handle: DMA address of buffer
85 * @size: size of buffer (same as passed to dma_map_page)
86 * @dir: DMA transfer direction (same as passed to dma_map_page)
88 * Unmap a page streaming mode DMA translation. The handle and size
89 * must match what was provided in the previous dma_map_page() call.
90 * All other usages are undefined.
92 * After this call, reads by the CPU to the buffer are guaranteed to see
93 * whatever the device wrote there.
95 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
96 size_t size, enum dma_data_direction dir,
97 struct dma_attrs *attrs)
99 if (!arch_is_coherent())
100 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
101 handle & ~PAGE_MASK, size, dir);
104 static void arm_dma_sync_single_for_cpu(struct device *dev,
105 dma_addr_t handle, size_t size, enum dma_data_direction dir)
107 unsigned int offset = handle & (PAGE_SIZE - 1);
108 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
109 if (!arch_is_coherent())
110 __dma_page_dev_to_cpu(page, offset, size, dir);
113 static void arm_dma_sync_single_for_device(struct device *dev,
114 dma_addr_t handle, size_t size, enum dma_data_direction dir)
116 unsigned int offset = handle & (PAGE_SIZE - 1);
117 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
118 if (!arch_is_coherent())
119 __dma_page_cpu_to_dev(page, offset, size, dir);
122 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
124 struct dma_map_ops arm_dma_ops = {
125 .alloc = arm_dma_alloc,
126 .free = arm_dma_free,
127 .mmap = arm_dma_mmap,
128 .map_page = arm_dma_map_page,
129 .unmap_page = arm_dma_unmap_page,
130 .map_sg = arm_dma_map_sg,
131 .unmap_sg = arm_dma_unmap_sg,
132 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
133 .sync_single_for_device = arm_dma_sync_single_for_device,
134 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
135 .sync_sg_for_device = arm_dma_sync_sg_for_device,
136 .set_dma_mask = arm_dma_set_mask,
138 EXPORT_SYMBOL(arm_dma_ops);
140 static u64 get_coherent_dma_mask(struct device *dev)
142 u64 mask = (u64)arm_dma_limit;
145 mask = dev->coherent_dma_mask;
148 * Sanity check the DMA mask - it must be non-zero, and
149 * must be able to be satisfied by a DMA allocation.
152 dev_warn(dev, "coherent DMA mask is unset\n");
156 if ((~mask) & (u64)arm_dma_limit) {
157 dev_warn(dev, "coherent DMA mask %#llx is smaller "
158 "than system GFP_DMA mask %#llx\n",
159 mask, (u64)arm_dma_limit);
167 static void __dma_clear_buffer(struct page *page, size_t size)
171 * Ensure that the allocated pages are zeroed, and that any data
172 * lurking in the kernel direct-mapped region is invalidated.
174 ptr = page_address(page);
176 memset(ptr, 0, size);
177 dmac_flush_range(ptr, ptr + size);
178 outer_flush_range(__pa(ptr), __pa(ptr) + size);
183 * Allocate a DMA buffer for 'dev' of size 'size' using the
184 * specified gfp mask. Note that 'size' must be page aligned.
186 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
188 unsigned long order = get_order(size);
189 struct page *page, *p, *e;
191 page = alloc_pages(gfp, order);
196 * Now split the huge page and free the excess pages
198 split_page(page, order);
199 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
202 __dma_clear_buffer(page, size);
208 * Free a DMA buffer. 'size' must be page aligned.
210 static void __dma_free_buffer(struct page *page, size_t size)
212 struct page *e = page + (size >> PAGE_SHIFT);
221 #ifdef CONFIG_HUGETLB_PAGE
222 #warning ARM Coherent DMA allocator does not (yet) support huge TLB
225 static void *__alloc_from_contiguous(struct device *dev, size_t size,
226 pgprot_t prot, struct page **ret_page);
228 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
229 pgprot_t prot, struct page **ret_page,
233 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
236 struct vm_struct *area;
240 * DMA allocation can be mapped to user space, so lets
241 * set VM_USERMAP flags too.
243 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
247 addr = (unsigned long)area->addr;
248 area->phys_addr = __pfn_to_phys(page_to_pfn(page));
250 if (ioremap_page_range(addr, addr + size, area->phys_addr, prot)) {
251 vunmap((void *)addr);
257 static void __dma_free_remap(void *cpu_addr, size_t size)
259 unsigned int flags = VM_ARM_DMA_CONSISTENT | VM_USERMAP;
260 struct vm_struct *area = find_vm_area(cpu_addr);
261 if (!area || (area->flags & flags) != flags) {
262 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
265 unmap_kernel_range((unsigned long)cpu_addr, size);
272 unsigned long *bitmap;
273 unsigned long nr_pages;
278 static struct dma_pool atomic_pool = {
282 static int __init early_coherent_pool(char *p)
284 atomic_pool.size = memparse(p, &p);
287 early_param("coherent_pool", early_coherent_pool);
290 * Initialise the coherent pool for atomic allocations.
292 static int __init atomic_pool_init(void)
294 struct dma_pool *pool = &atomic_pool;
295 pgprot_t prot = pgprot_dmacoherent(pgprot_kernel);
296 unsigned long nr_pages = pool->size >> PAGE_SHIFT;
297 unsigned long *bitmap;
300 int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
302 bitmap = kzalloc(bitmap_size, GFP_KERNEL);
306 if (IS_ENABLED(CONFIG_CMA))
307 ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
309 ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
312 spin_lock_init(&pool->lock);
315 pool->bitmap = bitmap;
316 pool->nr_pages = nr_pages;
317 pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
318 (unsigned)pool->size / 1024);
323 pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
324 (unsigned)pool->size / 1024);
328 * CMA is activated by core_initcall, so we must be called after it.
330 postcore_initcall(atomic_pool_init);
332 struct dma_contig_early_reserve {
337 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
339 static int dma_mmu_remap_num __initdata;
341 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
343 dma_mmu_remap[dma_mmu_remap_num].base = base;
344 dma_mmu_remap[dma_mmu_remap_num].size = size;
348 void __init dma_contiguous_remap(void)
351 for (i = 0; i < dma_mmu_remap_num; i++) {
352 phys_addr_t start = dma_mmu_remap[i].base;
353 phys_addr_t end = start + dma_mmu_remap[i].size;
357 if (end > arm_lowmem_limit)
358 end = arm_lowmem_limit;
362 map.pfn = __phys_to_pfn(start);
363 map.virtual = __phys_to_virt(start);
364 map.length = end - start;
365 map.type = MT_MEMORY_DMA_READY;
368 * Clear previous low-memory mapping
370 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
372 pmd_clear(pmd_off_k(addr));
374 iotable_init(&map, 1);
378 static int __dma_update_pte(pte_t *pte, pgtable_t token, unsigned long addr,
381 struct page *page = virt_to_page(addr);
382 pgprot_t prot = *(pgprot_t *)data;
384 set_pte_ext(pte, mk_pte(page, prot), 0);
388 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
390 unsigned long start = (unsigned long) page_address(page);
391 unsigned end = start + size;
393 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
395 flush_tlb_kernel_range(start, end);
398 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
399 pgprot_t prot, struct page **ret_page,
404 page = __dma_alloc_buffer(dev, size, gfp);
408 ptr = __dma_alloc_remap(page, size, gfp, prot, caller);
410 __dma_free_buffer(page, size);
418 static void *__alloc_from_pool(size_t size, struct page **ret_page)
420 struct dma_pool *pool = &atomic_pool;
421 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
428 WARN(1, "coherent pool not initialised!\n");
433 * Align the region allocation - allocations from pool are rather
434 * small, so align them to their order in pages, minimum is a page
435 * size. This helps reduce fragmentation of the DMA space.
437 align = PAGE_SIZE << get_order(size);
439 spin_lock_irqsave(&pool->lock, flags);
440 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
441 0, count, (1 << align) - 1);
442 if (pageno < pool->nr_pages) {
443 bitmap_set(pool->bitmap, pageno, count);
444 ptr = pool->vaddr + PAGE_SIZE * pageno;
445 *ret_page = pool->page + pageno;
447 spin_unlock_irqrestore(&pool->lock, flags);
452 static int __free_from_pool(void *start, size_t size)
454 struct dma_pool *pool = &atomic_pool;
455 unsigned long pageno, count;
458 if (start < pool->vaddr || start > pool->vaddr + pool->size)
461 if (start + size > pool->vaddr + pool->size) {
462 WARN(1, "freeing wrong coherent size from pool\n");
466 pageno = (start - pool->vaddr) >> PAGE_SHIFT;
467 count = size >> PAGE_SHIFT;
469 spin_lock_irqsave(&pool->lock, flags);
470 bitmap_clear(pool->bitmap, pageno, count);
471 spin_unlock_irqrestore(&pool->lock, flags);
476 static void *__alloc_from_contiguous(struct device *dev, size_t size,
477 pgprot_t prot, struct page **ret_page)
479 unsigned long order = get_order(size);
480 size_t count = size >> PAGE_SHIFT;
483 page = dma_alloc_from_contiguous(dev, count, order);
487 __dma_clear_buffer(page, size);
488 __dma_remap(page, size, prot);
491 return page_address(page);
494 static void __free_from_contiguous(struct device *dev, struct page *page,
497 __dma_remap(page, size, pgprot_kernel);
498 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
501 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
503 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
504 pgprot_writecombine(prot) :
505 pgprot_dmacoherent(prot);
511 #else /* !CONFIG_MMU */
515 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
516 #define __alloc_remap_buffer(dev, size, gfp, prot, ret, c) NULL
517 #define __alloc_from_pool(size, ret_page) NULL
518 #define __alloc_from_contiguous(dev, size, prot, ret) NULL
519 #define __free_from_pool(cpu_addr, size) 0
520 #define __free_from_contiguous(dev, page, size) do { } while (0)
521 #define __dma_free_remap(cpu_addr, size) do { } while (0)
523 #endif /* CONFIG_MMU */
525 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
526 struct page **ret_page)
529 page = __dma_alloc_buffer(dev, size, gfp);
534 return page_address(page);
539 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
540 gfp_t gfp, pgprot_t prot, const void *caller)
542 u64 mask = get_coherent_dma_mask(dev);
546 #ifdef CONFIG_DMA_API_DEBUG
547 u64 limit = (mask + 1) & ~mask;
548 if (limit && size >= limit) {
549 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
558 if (mask < 0xffffffffULL)
562 * Following is a work-around (a.k.a. hack) to prevent pages
563 * with __GFP_COMP being passed to split_page() which cannot
564 * handle them. The real problem is that this flag probably
565 * should be 0 on ARM as it is not supported on this
566 * platform; see CONFIG_HUGETLBFS.
568 gfp &= ~(__GFP_COMP);
570 *handle = DMA_ERROR_CODE;
571 size = PAGE_ALIGN(size);
573 if (arch_is_coherent() || nommu())
574 addr = __alloc_simple_buffer(dev, size, gfp, &page);
575 else if (gfp & GFP_ATOMIC)
576 addr = __alloc_from_pool(size, &page);
577 else if (!IS_ENABLED(CONFIG_CMA))
578 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
580 addr = __alloc_from_contiguous(dev, size, prot, &page);
583 *handle = pfn_to_dma(dev, page_to_pfn(page));
589 * Allocate DMA-coherent memory space and return both the kernel remapped
590 * virtual and bus address for that space.
592 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
593 gfp_t gfp, struct dma_attrs *attrs)
595 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
598 if (dma_alloc_from_coherent(dev, size, handle, &memory))
601 return __dma_alloc(dev, size, handle, gfp, prot,
602 __builtin_return_address(0));
606 * Create userspace mapping for the DMA-coherent memory.
608 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
609 void *cpu_addr, dma_addr_t dma_addr, size_t size,
610 struct dma_attrs *attrs)
614 unsigned long pfn = dma_to_pfn(dev, dma_addr);
615 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
617 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
620 ret = remap_pfn_range(vma, vma->vm_start,
622 vma->vm_end - vma->vm_start,
624 #endif /* CONFIG_MMU */
630 * Free a buffer as defined by the above mapping.
632 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
633 dma_addr_t handle, struct dma_attrs *attrs)
635 struct page *page = pfn_to_page(dma_to_pfn(dev, handle));
637 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
640 size = PAGE_ALIGN(size);
642 if (arch_is_coherent() || nommu()) {
643 __dma_free_buffer(page, size);
644 } else if (__free_from_pool(cpu_addr, size)) {
646 } else if (!IS_ENABLED(CONFIG_CMA)) {
647 __dma_free_remap(cpu_addr, size);
648 __dma_free_buffer(page, size);
651 * Non-atomic allocations cannot be freed with IRQs disabled
653 WARN_ON(irqs_disabled());
654 __free_from_contiguous(dev, page, size);
658 static void dma_cache_maint_page(struct page *page, unsigned long offset,
659 size_t size, enum dma_data_direction dir,
660 void (*op)(const void *, size_t, int))
665 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
669 * A single sg entry may refer to multiple physically contiguous
670 * pages. But we still need to process highmem pages individually.
671 * If highmem is not configured then the bulk of this loop gets
678 page = pfn_to_page(pfn);
680 if (PageHighMem(page)) {
681 if (len + offset > PAGE_SIZE)
682 len = PAGE_SIZE - offset;
683 vaddr = kmap_high_get(page);
688 } else if (cache_is_vipt()) {
689 /* unmapped pages might still be cached */
690 vaddr = kmap_atomic(page);
691 op(vaddr + offset, len, dir);
692 kunmap_atomic(vaddr);
695 vaddr = page_address(page) + offset;
705 * Make an area consistent for devices.
706 * Note: Drivers should NOT use this function directly, as it will break
707 * platforms with CONFIG_DMABOUNCE.
708 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
710 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
711 size_t size, enum dma_data_direction dir)
715 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
717 paddr = page_to_phys(page) + off;
718 if (dir == DMA_FROM_DEVICE) {
719 outer_inv_range(paddr, paddr + size);
721 outer_clean_range(paddr, paddr + size);
723 /* FIXME: non-speculating: flush on bidirectional mappings? */
726 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
727 size_t size, enum dma_data_direction dir)
729 unsigned long paddr = page_to_phys(page) + off;
731 /* FIXME: non-speculating: not required */
732 /* don't bother invalidating if DMA to device */
733 if (dir != DMA_TO_DEVICE)
734 outer_inv_range(paddr, paddr + size);
736 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
739 * Mark the D-cache clean for these pages to avoid extra flushing.
741 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
745 pfn = page_to_pfn(page) + off / PAGE_SIZE;
749 left -= PAGE_SIZE - off;
751 while (left >= PAGE_SIZE) {
752 page = pfn_to_page(pfn++);
753 set_bit(PG_dcache_clean, &page->flags);
760 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
761 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
762 * @sg: list of buffers
763 * @nents: number of buffers to map
764 * @dir: DMA transfer direction
766 * Map a set of buffers described by scatterlist in streaming mode for DMA.
767 * This is the scatter-gather version of the dma_map_single interface.
768 * Here the scatter gather list elements are each tagged with the
769 * appropriate dma address and length. They are obtained via
770 * sg_dma_{address,length}.
772 * Device ownership issues as mentioned for dma_map_single are the same
775 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
776 enum dma_data_direction dir, struct dma_attrs *attrs)
778 struct dma_map_ops *ops = get_dma_ops(dev);
779 struct scatterlist *s;
782 for_each_sg(sg, s, nents, i) {
783 #ifdef CONFIG_NEED_SG_DMA_LENGTH
784 s->dma_length = s->length;
786 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
787 s->length, dir, attrs);
788 if (dma_mapping_error(dev, s->dma_address))
794 for_each_sg(sg, s, i, j)
795 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
800 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
801 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
802 * @sg: list of buffers
803 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
804 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
806 * Unmap a set of streaming mode DMA translations. Again, CPU access
807 * rules concerning calls here are the same as for dma_unmap_single().
809 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
810 enum dma_data_direction dir, struct dma_attrs *attrs)
812 struct dma_map_ops *ops = get_dma_ops(dev);
813 struct scatterlist *s;
817 for_each_sg(sg, s, nents, i)
818 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
822 * arm_dma_sync_sg_for_cpu
823 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
824 * @sg: list of buffers
825 * @nents: number of buffers to map (returned from dma_map_sg)
826 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
828 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
829 int nents, enum dma_data_direction dir)
831 struct dma_map_ops *ops = get_dma_ops(dev);
832 struct scatterlist *s;
835 for_each_sg(sg, s, nents, i)
836 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
841 * arm_dma_sync_sg_for_device
842 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
843 * @sg: list of buffers
844 * @nents: number of buffers to map (returned from dma_map_sg)
845 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
847 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
848 int nents, enum dma_data_direction dir)
850 struct dma_map_ops *ops = get_dma_ops(dev);
851 struct scatterlist *s;
854 for_each_sg(sg, s, nents, i)
855 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
860 * Return whether the given device DMA address mask can be supported
861 * properly. For example, if your device can only drive the low 24-bits
862 * during bus mastering, then you would pass 0x00ffffff as the mask
865 int dma_supported(struct device *dev, u64 mask)
867 if (mask < (u64)arm_dma_limit)
871 EXPORT_SYMBOL(dma_supported);
873 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
875 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
878 *dev->dma_mask = dma_mask;
883 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
885 static int __init dma_debug_do_init(void)
887 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
890 fs_initcall(dma_debug_do_init);
892 #ifdef CONFIG_ARM_DMA_USE_IOMMU
896 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
899 unsigned int order = get_order(size);
900 unsigned int align = 0;
901 unsigned int count, start;
904 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
905 (1 << mapping->order) - 1) >> mapping->order;
907 if (order > mapping->order)
908 align = (1 << (order - mapping->order)) - 1;
910 spin_lock_irqsave(&mapping->lock, flags);
911 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
913 if (start > mapping->bits) {
914 spin_unlock_irqrestore(&mapping->lock, flags);
915 return DMA_ERROR_CODE;
918 bitmap_set(mapping->bitmap, start, count);
919 spin_unlock_irqrestore(&mapping->lock, flags);
921 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
924 static inline void __free_iova(struct dma_iommu_mapping *mapping,
925 dma_addr_t addr, size_t size)
927 unsigned int start = (addr - mapping->base) >>
928 (mapping->order + PAGE_SHIFT);
929 unsigned int count = ((size >> PAGE_SHIFT) +
930 (1 << mapping->order) - 1) >> mapping->order;
933 spin_lock_irqsave(&mapping->lock, flags);
934 bitmap_clear(mapping->bitmap, start, count);
935 spin_unlock_irqrestore(&mapping->lock, flags);
938 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
941 int count = size >> PAGE_SHIFT;
942 int array_size = count * sizeof(struct page *);
945 if (array_size <= PAGE_SIZE)
946 pages = kzalloc(array_size, gfp);
948 pages = vzalloc(array_size);
953 int j, order = __fls(count);
955 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
956 while (!pages[i] && order)
957 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
962 split_page(pages[i], order);
965 pages[i + j] = pages[i] + j;
967 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
976 __free_pages(pages[i], 0);
977 if (array_size <= PAGE_SIZE)
984 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
986 int count = size >> PAGE_SHIFT;
987 int array_size = count * sizeof(struct page *);
989 for (i = 0; i < count; i++)
991 __free_pages(pages[i], 0);
992 if (array_size <= PAGE_SIZE)
1000 * Create a CPU mapping for a specified pages
1003 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot,
1006 unsigned int i, nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1007 struct vm_struct *area;
1010 area = get_vm_area_caller(size, VM_ARM_DMA_CONSISTENT | VM_USERMAP,
1015 area->pages = pages;
1016 area->nr_pages = nr_pages;
1017 p = (unsigned long)area->addr;
1019 for (i = 0; i < nr_pages; i++) {
1020 phys_addr_t phys = __pfn_to_phys(page_to_pfn(pages[i]));
1021 if (ioremap_page_range(p, p + PAGE_SIZE, phys, prot))
1027 unmap_kernel_range((unsigned long)area->addr, size);
1033 * Create a mapping in device IO address space for specified pages
1036 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
1038 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1039 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1040 dma_addr_t dma_addr, iova;
1041 int i, ret = DMA_ERROR_CODE;
1043 dma_addr = __alloc_iova(mapping, size);
1044 if (dma_addr == DMA_ERROR_CODE)
1048 for (i = 0; i < count; ) {
1049 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
1050 phys_addr_t phys = page_to_phys(pages[i]);
1051 unsigned int len, j;
1053 for (j = i + 1; j < count; j++, next_pfn++)
1054 if (page_to_pfn(pages[j]) != next_pfn)
1057 len = (j - i) << PAGE_SHIFT;
1058 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1066 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
1067 __free_iova(mapping, dma_addr, size);
1068 return DMA_ERROR_CODE;
1071 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1073 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1076 * add optional in-page offset from iova to size and align
1077 * result to page size
1079 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1082 iommu_unmap(mapping->domain, iova, size);
1083 __free_iova(mapping, iova, size);
1087 static struct page **__iommu_get_pages(void *cpu_addr)
1089 struct vm_struct *area;
1091 area = find_vm_area(cpu_addr);
1092 if (area && (area->flags & VM_ARM_DMA_CONSISTENT))
1097 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1098 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1100 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1101 struct page **pages;
1104 *handle = DMA_ERROR_CODE;
1105 size = PAGE_ALIGN(size);
1107 pages = __iommu_alloc_buffer(dev, size, gfp);
1111 *handle = __iommu_create_mapping(dev, pages, size);
1112 if (*handle == DMA_ERROR_CODE)
1115 addr = __iommu_alloc_remap(pages, size, gfp, prot,
1116 __builtin_return_address(0));
1123 __iommu_remove_mapping(dev, *handle, size);
1125 __iommu_free_buffer(dev, pages, size);
1129 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1130 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1131 struct dma_attrs *attrs)
1133 unsigned long uaddr = vma->vm_start;
1134 unsigned long usize = vma->vm_end - vma->vm_start;
1135 struct page **pages = __iommu_get_pages(cpu_addr);
1137 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1143 int ret = vm_insert_page(vma, uaddr, *pages++);
1145 pr_err("Remapping memory failed: %d\n", ret);
1150 } while (usize > 0);
1156 * free a page as defined by the above mapping.
1157 * Must not be called with IRQs disabled.
1159 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1160 dma_addr_t handle, struct dma_attrs *attrs)
1162 struct page **pages = __iommu_get_pages(cpu_addr);
1163 size = PAGE_ALIGN(size);
1166 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1170 unmap_kernel_range((unsigned long)cpu_addr, size);
1173 __iommu_remove_mapping(dev, handle, size);
1174 __iommu_free_buffer(dev, pages, size);
1178 * Map a part of the scatter-gather list into contiguous io address space
1180 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1181 size_t size, dma_addr_t *handle,
1182 enum dma_data_direction dir)
1184 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1185 dma_addr_t iova, iova_base;
1188 struct scatterlist *s;
1190 size = PAGE_ALIGN(size);
1191 *handle = DMA_ERROR_CODE;
1193 iova_base = iova = __alloc_iova(mapping, size);
1194 if (iova == DMA_ERROR_CODE)
1197 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1198 phys_addr_t phys = page_to_phys(sg_page(s));
1199 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1201 if (!arch_is_coherent())
1202 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1204 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1207 count += len >> PAGE_SHIFT;
1210 *handle = iova_base;
1214 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1215 __free_iova(mapping, iova_base, size);
1220 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1221 * @dev: valid struct device pointer
1222 * @sg: list of buffers
1223 * @nents: number of buffers to map
1224 * @dir: DMA transfer direction
1226 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1227 * The scatter gather list elements are merged together (if possible) and
1228 * tagged with the appropriate dma address and length. They are obtained via
1229 * sg_dma_{address,length}.
1231 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1232 enum dma_data_direction dir, struct dma_attrs *attrs)
1234 struct scatterlist *s = sg, *dma = sg, *start = sg;
1236 unsigned int offset = s->offset;
1237 unsigned int size = s->offset + s->length;
1238 unsigned int max = dma_get_max_seg_size(dev);
1240 for (i = 1; i < nents; i++) {
1243 s->dma_address = DMA_ERROR_CODE;
1246 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1247 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1251 dma->dma_address += offset;
1252 dma->dma_length = size - offset;
1254 size = offset = s->offset;
1261 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir) < 0)
1264 dma->dma_address += offset;
1265 dma->dma_length = size - offset;
1270 for_each_sg(sg, s, count, i)
1271 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1276 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1277 * @dev: valid struct device pointer
1278 * @sg: list of buffers
1279 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1280 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1282 * Unmap a set of streaming mode DMA translations. Again, CPU access
1283 * rules concerning calls here are the same as for dma_unmap_single().
1285 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1286 enum dma_data_direction dir, struct dma_attrs *attrs)
1288 struct scatterlist *s;
1291 for_each_sg(sg, s, nents, i) {
1293 __iommu_remove_mapping(dev, sg_dma_address(s),
1295 if (!arch_is_coherent())
1296 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1302 * arm_iommu_sync_sg_for_cpu
1303 * @dev: valid struct device pointer
1304 * @sg: list of buffers
1305 * @nents: number of buffers to map (returned from dma_map_sg)
1306 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1308 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1309 int nents, enum dma_data_direction dir)
1311 struct scatterlist *s;
1314 for_each_sg(sg, s, nents, i)
1315 if (!arch_is_coherent())
1316 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1321 * arm_iommu_sync_sg_for_device
1322 * @dev: valid struct device pointer
1323 * @sg: list of buffers
1324 * @nents: number of buffers to map (returned from dma_map_sg)
1325 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1327 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1328 int nents, enum dma_data_direction dir)
1330 struct scatterlist *s;
1333 for_each_sg(sg, s, nents, i)
1334 if (!arch_is_coherent())
1335 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1340 * arm_iommu_map_page
1341 * @dev: valid struct device pointer
1342 * @page: page that buffer resides in
1343 * @offset: offset into page for start of buffer
1344 * @size: size of buffer to map
1345 * @dir: DMA transfer direction
1347 * IOMMU aware version of arm_dma_map_page()
1349 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1350 unsigned long offset, size_t size, enum dma_data_direction dir,
1351 struct dma_attrs *attrs)
1353 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1354 dma_addr_t dma_addr;
1355 int ret, len = PAGE_ALIGN(size + offset);
1357 if (!arch_is_coherent())
1358 __dma_page_cpu_to_dev(page, offset, size, dir);
1360 dma_addr = __alloc_iova(mapping, len);
1361 if (dma_addr == DMA_ERROR_CODE)
1364 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1368 return dma_addr + offset;
1370 __free_iova(mapping, dma_addr, len);
1371 return DMA_ERROR_CODE;
1375 * arm_iommu_unmap_page
1376 * @dev: valid struct device pointer
1377 * @handle: DMA address of buffer
1378 * @size: size of buffer (same as passed to dma_map_page)
1379 * @dir: DMA transfer direction (same as passed to dma_map_page)
1381 * IOMMU aware version of arm_dma_unmap_page()
1383 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1384 size_t size, enum dma_data_direction dir,
1385 struct dma_attrs *attrs)
1387 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1388 dma_addr_t iova = handle & PAGE_MASK;
1389 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1390 int offset = handle & ~PAGE_MASK;
1391 int len = PAGE_ALIGN(size + offset);
1396 if (!arch_is_coherent())
1397 __dma_page_dev_to_cpu(page, offset, size, dir);
1399 iommu_unmap(mapping->domain, iova, len);
1400 __free_iova(mapping, iova, len);
1403 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1404 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1406 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1407 dma_addr_t iova = handle & PAGE_MASK;
1408 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1409 unsigned int offset = handle & ~PAGE_MASK;
1414 if (!arch_is_coherent())
1415 __dma_page_dev_to_cpu(page, offset, size, dir);
1418 static void arm_iommu_sync_single_for_device(struct device *dev,
1419 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1421 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1422 dma_addr_t iova = handle & PAGE_MASK;
1423 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1424 unsigned int offset = handle & ~PAGE_MASK;
1429 __dma_page_cpu_to_dev(page, offset, size, dir);
1432 struct dma_map_ops iommu_ops = {
1433 .alloc = arm_iommu_alloc_attrs,
1434 .free = arm_iommu_free_attrs,
1435 .mmap = arm_iommu_mmap_attrs,
1437 .map_page = arm_iommu_map_page,
1438 .unmap_page = arm_iommu_unmap_page,
1439 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1440 .sync_single_for_device = arm_iommu_sync_single_for_device,
1442 .map_sg = arm_iommu_map_sg,
1443 .unmap_sg = arm_iommu_unmap_sg,
1444 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1445 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1449 * arm_iommu_create_mapping
1450 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1451 * @base: start address of the valid IO address space
1452 * @size: size of the valid IO address space
1453 * @order: accuracy of the IO addresses allocations
1455 * Creates a mapping structure which holds information about used/unused
1456 * IO address ranges, which is required to perform memory allocation and
1457 * mapping with IOMMU aware functions.
1459 * The client device need to be attached to the mapping with
1460 * arm_iommu_attach_device function.
1462 struct dma_iommu_mapping *
1463 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1466 unsigned int count = size >> (PAGE_SHIFT + order);
1467 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1468 struct dma_iommu_mapping *mapping;
1472 return ERR_PTR(-EINVAL);
1474 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1478 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1479 if (!mapping->bitmap)
1482 mapping->base = base;
1483 mapping->bits = BITS_PER_BYTE * bitmap_size;
1484 mapping->order = order;
1485 spin_lock_init(&mapping->lock);
1487 mapping->domain = iommu_domain_alloc(bus);
1488 if (!mapping->domain)
1491 kref_init(&mapping->kref);
1494 kfree(mapping->bitmap);
1498 return ERR_PTR(err);
1501 static void release_iommu_mapping(struct kref *kref)
1503 struct dma_iommu_mapping *mapping =
1504 container_of(kref, struct dma_iommu_mapping, kref);
1506 iommu_domain_free(mapping->domain);
1507 kfree(mapping->bitmap);
1511 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1514 kref_put(&mapping->kref, release_iommu_mapping);
1518 * arm_iommu_attach_device
1519 * @dev: valid struct device pointer
1520 * @mapping: io address space mapping structure (returned from
1521 * arm_iommu_create_mapping)
1523 * Attaches specified io address space mapping to the provided device,
1524 * this replaces the dma operations (dma_map_ops pointer) with the
1525 * IOMMU aware version. More than one client might be attached to
1526 * the same io address space mapping.
1528 int arm_iommu_attach_device(struct device *dev,
1529 struct dma_iommu_mapping *mapping)
1533 err = iommu_attach_device(mapping->domain, dev);
1537 kref_get(&mapping->kref);
1538 dev->archdata.mapping = mapping;
1539 set_dma_ops(dev, &iommu_ops);
1541 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));