2 * Copyright (C) 2010,2011 Google, Inc.
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <linux/platform_data/tegra_usb.h>
28 #include <mach/irqs.h>
29 #include <mach/iomap.h>
31 #include <mach/usb_phy.h>
33 #include "gpio-names.h"
36 static struct resource i2c_resource1[] = {
40 .flags = IORESOURCE_IRQ,
43 .start = TEGRA_I2C_BASE,
44 .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
45 .flags = IORESOURCE_MEM,
49 static struct resource i2c_resource2[] = {
53 .flags = IORESOURCE_IRQ,
56 .start = TEGRA_I2C2_BASE,
57 .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
58 .flags = IORESOURCE_MEM,
62 static struct resource i2c_resource3[] = {
66 .flags = IORESOURCE_IRQ,
69 .start = TEGRA_I2C3_BASE,
70 .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
71 .flags = IORESOURCE_MEM,
75 static struct resource i2c_resource4[] = {
79 .flags = IORESOURCE_IRQ,
82 .start = TEGRA_DVC_BASE,
83 .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
84 .flags = IORESOURCE_MEM,
88 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
89 .bus_clk_rate = 400000,
92 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
93 .bus_clk_rate = 400000,
96 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
97 .bus_clk_rate = 400000,
100 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
101 .bus_clk_rate = 400000,
104 struct platform_device tegra_i2c_device1 = {
107 .resource = i2c_resource1,
108 .num_resources = ARRAY_SIZE(i2c_resource1),
110 .platform_data = &tegra_i2c1_platform_data,
114 struct platform_device tegra_i2c_device2 = {
117 .resource = i2c_resource2,
118 .num_resources = ARRAY_SIZE(i2c_resource2),
120 .platform_data = &tegra_i2c2_platform_data,
124 struct platform_device tegra_i2c_device3 = {
127 .resource = i2c_resource3,
128 .num_resources = ARRAY_SIZE(i2c_resource3),
130 .platform_data = &tegra_i2c3_platform_data,
134 struct platform_device tegra_i2c_device4 = {
137 .resource = i2c_resource4,
138 .num_resources = ARRAY_SIZE(i2c_resource4),
140 .platform_data = &tegra_dvc_platform_data,
144 static struct resource spi_resource1[] = {
146 .start = INT_S_LINK1,
148 .flags = IORESOURCE_IRQ,
151 .start = TEGRA_SPI1_BASE,
152 .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
153 .flags = IORESOURCE_MEM,
157 static struct resource spi_resource2[] = {
161 .flags = IORESOURCE_IRQ,
164 .start = TEGRA_SPI2_BASE,
165 .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
166 .flags = IORESOURCE_MEM,
170 static struct resource spi_resource3[] = {
174 .flags = IORESOURCE_IRQ,
177 .start = TEGRA_SPI3_BASE,
178 .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
179 .flags = IORESOURCE_MEM,
183 static struct resource spi_resource4[] = {
187 .flags = IORESOURCE_IRQ,
190 .start = TEGRA_SPI4_BASE,
191 .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
192 .flags = IORESOURCE_MEM,
196 struct platform_device tegra_spi_device1 = {
199 .resource = spi_resource1,
200 .num_resources = ARRAY_SIZE(spi_resource1),
202 .coherent_dma_mask = 0xffffffff,
206 struct platform_device tegra_spi_device2 = {
209 .resource = spi_resource2,
210 .num_resources = ARRAY_SIZE(spi_resource2),
212 .coherent_dma_mask = 0xffffffff,
216 struct platform_device tegra_spi_device3 = {
219 .resource = spi_resource3,
220 .num_resources = ARRAY_SIZE(spi_resource3),
222 .coherent_dma_mask = 0xffffffff,
226 struct platform_device tegra_spi_device4 = {
229 .resource = spi_resource4,
230 .num_resources = ARRAY_SIZE(spi_resource4),
232 .coherent_dma_mask = 0xffffffff,
237 static struct resource sdhci_resource1[] = {
241 .flags = IORESOURCE_IRQ,
244 .start = TEGRA_SDMMC1_BASE,
245 .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
246 .flags = IORESOURCE_MEM,
250 static struct resource sdhci_resource2[] = {
254 .flags = IORESOURCE_IRQ,
257 .start = TEGRA_SDMMC2_BASE,
258 .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
259 .flags = IORESOURCE_MEM,
263 static struct resource sdhci_resource3[] = {
267 .flags = IORESOURCE_IRQ,
270 .start = TEGRA_SDMMC3_BASE,
271 .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
272 .flags = IORESOURCE_MEM,
276 static struct resource sdhci_resource4[] = {
280 .flags = IORESOURCE_IRQ,
283 .start = TEGRA_SDMMC4_BASE,
284 .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
285 .flags = IORESOURCE_MEM,
289 /* board files should fill in platform_data register the devices themselvs.
290 * See board-harmony.c for an example
292 struct platform_device tegra_sdhci_device1 = {
293 .name = "sdhci-tegra",
295 .resource = sdhci_resource1,
296 .num_resources = ARRAY_SIZE(sdhci_resource1),
299 struct platform_device tegra_sdhci_device2 = {
300 .name = "sdhci-tegra",
302 .resource = sdhci_resource2,
303 .num_resources = ARRAY_SIZE(sdhci_resource2),
306 struct platform_device tegra_sdhci_device3 = {
307 .name = "sdhci-tegra",
309 .resource = sdhci_resource3,
310 .num_resources = ARRAY_SIZE(sdhci_resource3),
313 struct platform_device tegra_sdhci_device4 = {
314 .name = "sdhci-tegra",
316 .resource = sdhci_resource4,
317 .num_resources = ARRAY_SIZE(sdhci_resource4),
320 static struct resource tegra_usb1_resources[] = {
322 .start = TEGRA_USB_BASE,
323 .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
324 .flags = IORESOURCE_MEM,
329 .flags = IORESOURCE_IRQ,
333 static struct resource tegra_usb2_resources[] = {
335 .start = TEGRA_USB2_BASE,
336 .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
337 .flags = IORESOURCE_MEM,
342 .flags = IORESOURCE_IRQ,
346 static struct resource tegra_usb3_resources[] = {
348 .start = TEGRA_USB3_BASE,
349 .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
350 .flags = IORESOURCE_MEM,
355 .flags = IORESOURCE_IRQ,
359 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
360 /* All existing boards use GPIO PV0 for phy reset */
361 .reset_gpio = TEGRA_GPIO_PV0,
365 static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
366 .operating_mode = TEGRA_USB_OTG,
367 .power_down_on_bus_suspend = 1,
370 static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
371 .phy_config = &tegra_ehci2_ulpi_phy_config,
372 .operating_mode = TEGRA_USB_HOST,
373 .power_down_on_bus_suspend = 1,
376 static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
377 .operating_mode = TEGRA_USB_HOST,
378 .power_down_on_bus_suspend = 1,
381 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
383 struct platform_device tegra_ehci1_device = {
384 .name = "tegra-ehci",
387 .dma_mask = &tegra_ehci_dmamask,
388 .coherent_dma_mask = DMA_BIT_MASK(32),
389 .platform_data = &tegra_ehci1_pdata,
391 .resource = tegra_usb1_resources,
392 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
395 struct platform_device tegra_ehci2_device = {
396 .name = "tegra-ehci",
399 .dma_mask = &tegra_ehci_dmamask,
400 .coherent_dma_mask = DMA_BIT_MASK(32),
401 .platform_data = &tegra_ehci2_pdata,
403 .resource = tegra_usb2_resources,
404 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
407 struct platform_device tegra_ehci3_device = {
408 .name = "tegra-ehci",
411 .dma_mask = &tegra_ehci_dmamask,
412 .coherent_dma_mask = DMA_BIT_MASK(32),
413 .platform_data = &tegra_ehci3_pdata,
415 .resource = tegra_usb3_resources,
416 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
419 static struct resource tegra_pmu_resources[] = {
421 .start = INT_CPU0_PMU_INTR,
422 .end = INT_CPU0_PMU_INTR,
423 .flags = IORESOURCE_IRQ,
426 .start = INT_CPU1_PMU_INTR,
427 .end = INT_CPU1_PMU_INTR,
428 .flags = IORESOURCE_IRQ,
432 struct platform_device tegra_pmu_device = {
434 .id = ARM_PMU_DEVICE_CPU,
435 .num_resources = ARRAY_SIZE(tegra_pmu_resources),
436 .resource = tegra_pmu_resources,
439 static struct resource tegra_uarta_resources[] = {
441 .start = TEGRA_UARTA_BASE,
442 .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
443 .flags = IORESOURCE_MEM,
448 .flags = IORESOURCE_IRQ,
452 static struct resource tegra_uartb_resources[] = {
454 .start = TEGRA_UARTB_BASE,
455 .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
456 .flags = IORESOURCE_MEM,
461 .flags = IORESOURCE_IRQ,
465 static struct resource tegra_uartc_resources[] = {
467 .start = TEGRA_UARTC_BASE,
468 .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
469 .flags = IORESOURCE_MEM,
474 .flags = IORESOURCE_IRQ,
478 static struct resource tegra_uartd_resources[] = {
480 .start = TEGRA_UARTD_BASE,
481 .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
482 .flags = IORESOURCE_MEM,
487 .flags = IORESOURCE_IRQ,
491 static struct resource tegra_uarte_resources[] = {
493 .start = TEGRA_UARTE_BASE,
494 .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
495 .flags = IORESOURCE_MEM,
500 .flags = IORESOURCE_IRQ,
504 struct platform_device tegra_uarta_device = {
505 .name = "tegra_uart",
507 .num_resources = ARRAY_SIZE(tegra_uarta_resources),
508 .resource = tegra_uarta_resources,
510 .coherent_dma_mask = DMA_BIT_MASK(32),
514 struct platform_device tegra_uartb_device = {
515 .name = "tegra_uart",
517 .num_resources = ARRAY_SIZE(tegra_uartb_resources),
518 .resource = tegra_uartb_resources,
520 .coherent_dma_mask = DMA_BIT_MASK(32),
524 struct platform_device tegra_uartc_device = {
525 .name = "tegra_uart",
527 .num_resources = ARRAY_SIZE(tegra_uartc_resources),
528 .resource = tegra_uartc_resources,
530 .coherent_dma_mask = DMA_BIT_MASK(32),
534 struct platform_device tegra_uartd_device = {
535 .name = "tegra_uart",
537 .num_resources = ARRAY_SIZE(tegra_uartd_resources),
538 .resource = tegra_uartd_resources,
540 .coherent_dma_mask = DMA_BIT_MASK(32),
544 struct platform_device tegra_uarte_device = {
545 .name = "tegra_uart",
547 .num_resources = ARRAY_SIZE(tegra_uarte_resources),
548 .resource = tegra_uarte_resources,
550 .coherent_dma_mask = DMA_BIT_MASK(32),
554 static struct resource i2s_resource1[] = {
558 .flags = IORESOURCE_IRQ
561 .start = TEGRA_DMA_REQ_SEL_I2S_1,
562 .end = TEGRA_DMA_REQ_SEL_I2S_1,
563 .flags = IORESOURCE_DMA
566 .start = TEGRA_I2S1_BASE,
567 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
568 .flags = IORESOURCE_MEM
572 static struct resource i2s_resource2[] = {
576 .flags = IORESOURCE_IRQ
579 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
580 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
581 .flags = IORESOURCE_DMA
584 .start = TEGRA_I2S2_BASE,
585 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
586 .flags = IORESOURCE_MEM
590 struct platform_device tegra_i2s_device1 = {
593 .resource = i2s_resource1,
594 .num_resources = ARRAY_SIZE(i2s_resource1),
597 struct platform_device tegra_i2s_device2 = {
600 .resource = i2s_resource2,
601 .num_resources = ARRAY_SIZE(i2s_resource2),
604 static struct resource tegra_das_resources[] = {
606 .start = TEGRA_APB_MISC_DAS_BASE,
607 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
608 .flags = IORESOURCE_MEM,
612 struct platform_device tegra_das_device = {
615 .num_resources = ARRAY_SIZE(tegra_das_resources),
616 .resource = tegra_das_resources,
619 struct platform_device tegra_pcm_device = {
620 .name = "tegra-pcm-audio",