Merge branch 'master' into upstream
[pandora-kernel.git] / arch / arm / mach-shmobile / setup-sh7377.c
1 /*
2  * sh7377 processor support
3  *
4  * Copyright (C) 2010  Magnus Damm
5  * Copyright (C) 2008  Yoshihiro Shimoda
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  */
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
26 #include <linux/input.h>
27 #include <linux/io.h>
28 #include <linux/serial_sci.h>
29 #include <linux/sh_intc.h>
30 #include <linux/sh_timer.h>
31 #include <mach/hardware.h>
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
34
35 /* SCIFA0 */
36 static struct plat_sci_port scif0_platform_data = {
37         .mapbase        = 0xe6c40000,
38         .flags          = UPF_BOOT_AUTOCONF,
39         .type           = PORT_SCIF,
40         .irqs           = { evt2irq(0xc00), evt2irq(0xc00),
41                             evt2irq(0xc00), evt2irq(0xc00) },
42 };
43
44 static struct platform_device scif0_device = {
45         .name           = "sh-sci",
46         .id             = 0,
47         .dev            = {
48                 .platform_data  = &scif0_platform_data,
49         },
50 };
51
52 /* SCIFA1 */
53 static struct plat_sci_port scif1_platform_data = {
54         .mapbase        = 0xe6c50000,
55         .flags          = UPF_BOOT_AUTOCONF,
56         .type           = PORT_SCIF,
57         .irqs           = { evt2irq(0xc20), evt2irq(0xc20),
58                             evt2irq(0xc20), evt2irq(0xc20) },
59 };
60
61 static struct platform_device scif1_device = {
62         .name           = "sh-sci",
63         .id             = 1,
64         .dev            = {
65                 .platform_data  = &scif1_platform_data,
66         },
67 };
68
69 /* SCIFA2 */
70 static struct plat_sci_port scif2_platform_data = {
71         .mapbase        = 0xe6c60000,
72         .flags          = UPF_BOOT_AUTOCONF,
73         .type           = PORT_SCIF,
74         .irqs           = { evt2irq(0xc40), evt2irq(0xc40),
75                             evt2irq(0xc40), evt2irq(0xc40) },
76 };
77
78 static struct platform_device scif2_device = {
79         .name           = "sh-sci",
80         .id             = 2,
81         .dev            = {
82                 .platform_data  = &scif2_platform_data,
83         },
84 };
85
86 /* SCIFA3 */
87 static struct plat_sci_port scif3_platform_data = {
88         .mapbase        = 0xe6c70000,
89         .flags          = UPF_BOOT_AUTOCONF,
90         .type           = PORT_SCIF,
91         .irqs           = { evt2irq(0xc60), evt2irq(0xc60),
92                             evt2irq(0xc60), evt2irq(0xc60) },
93 };
94
95 static struct platform_device scif3_device = {
96         .name           = "sh-sci",
97         .id             = 3,
98         .dev            = {
99                 .platform_data  = &scif3_platform_data,
100         },
101 };
102
103 /* SCIFA4 */
104 static struct plat_sci_port scif4_platform_data = {
105         .mapbase        = 0xe6c80000,
106         .flags          = UPF_BOOT_AUTOCONF,
107         .type           = PORT_SCIF,
108         .irqs           = { evt2irq(0xd20), evt2irq(0xd20),
109                             evt2irq(0xd20), evt2irq(0xd20) },
110 };
111
112 static struct platform_device scif4_device = {
113         .name           = "sh-sci",
114         .id             = 4,
115         .dev            = {
116                 .platform_data  = &scif4_platform_data,
117         },
118 };
119
120 /* SCIFA5 */
121 static struct plat_sci_port scif5_platform_data = {
122         .mapbase        = 0xe6cb0000,
123         .flags          = UPF_BOOT_AUTOCONF,
124         .type           = PORT_SCIF,
125         .irqs           = { evt2irq(0xd40), evt2irq(0xd40),
126                             evt2irq(0xd40), evt2irq(0xd40) },
127 };
128
129 static struct platform_device scif5_device = {
130         .name           = "sh-sci",
131         .id             = 5,
132         .dev            = {
133                 .platform_data  = &scif5_platform_data,
134         },
135 };
136
137 /* SCIFA6 */
138 static struct plat_sci_port scif6_platform_data = {
139         .mapbase        = 0xe6cc0000,
140         .flags          = UPF_BOOT_AUTOCONF,
141         .type           = PORT_SCIF,
142         .irqs           = { intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80),
143                             intcs_evt2irq(0x1a80), intcs_evt2irq(0x1a80) },
144 };
145
146 static struct platform_device scif6_device = {
147         .name           = "sh-sci",
148         .id             = 6,
149         .dev            = {
150                 .platform_data  = &scif6_platform_data,
151         },
152 };
153
154 /* SCIFB */
155 static struct plat_sci_port scif7_platform_data = {
156         .mapbase        = 0xe6c30000,
157         .flags          = UPF_BOOT_AUTOCONF,
158         .type           = PORT_SCIF,
159         .irqs           = { evt2irq(0xd60), evt2irq(0xd60),
160                             evt2irq(0xd60), evt2irq(0xd60) },
161 };
162
163 static struct platform_device scif7_device = {
164         .name           = "sh-sci",
165         .id             = 7,
166         .dev            = {
167                 .platform_data  = &scif7_platform_data,
168         },
169 };
170
171 static struct sh_timer_config cmt10_platform_data = {
172         .name = "CMT10",
173         .channel_offset = 0x10,
174         .timer_bit = 0,
175         .clockevent_rating = 125,
176         .clocksource_rating = 125,
177 };
178
179 static struct resource cmt10_resources[] = {
180         [0] = {
181                 .name   = "CMT10",
182                 .start  = 0xe6138010,
183                 .end    = 0xe613801b,
184                 .flags  = IORESOURCE_MEM,
185         },
186         [1] = {
187                 .start  = evt2irq(0xb00), /* CMT1_CMT10 */
188                 .flags  = IORESOURCE_IRQ,
189         },
190 };
191
192 static struct platform_device cmt10_device = {
193         .name           = "sh_cmt",
194         .id             = 10,
195         .dev = {
196                 .platform_data  = &cmt10_platform_data,
197         },
198         .resource       = cmt10_resources,
199         .num_resources  = ARRAY_SIZE(cmt10_resources),
200 };
201
202 static struct platform_device *sh7377_early_devices[] __initdata = {
203         &scif0_device,
204         &scif1_device,
205         &scif2_device,
206         &scif3_device,
207         &scif4_device,
208         &scif5_device,
209         &scif6_device,
210         &scif7_device,
211         &cmt10_device,
212 };
213
214 void __init sh7377_add_standard_devices(void)
215 {
216         platform_add_devices(sh7377_early_devices,
217                             ARRAY_SIZE(sh7377_early_devices));
218 }
219
220 #define SMSTPCR3 0xe615013c
221 #define SMSTPCR3_CMT1 (1 << 29)
222
223 void __init sh7377_add_early_devices(void)
224 {
225         /* enable clock to CMT1 */
226         __raw_writel(__raw_readl(SMSTPCR3) & ~SMSTPCR3_CMT1, SMSTPCR3);
227
228         early_platform_add_devices(sh7377_early_devices,
229                                    ARRAY_SIZE(sh7377_early_devices));
230 }