arch/arm/mach-s5p64x0/cpu.c

   1 /* linux/arch/arm/mach-s5p64x0/cpu.c
   2  *
   3  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/types.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/list.h>
  15 #include <linux/timer.h>
  16 #include <linux/init.h>
  17 #include <linux/clk.h>
  18 #include <linux/io.h>
  19 #include <linux/sysdev.h>
  20 #include <linux/serial_core.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/sched.h>
  23 #include <linux/dma-mapping.h>
  24
  25 #include <asm/mach/arch.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach/irq.h>
  28 #include <asm/proc-fns.h>
  29 #include <asm/irq.h>
  30
  31 #include <mach/hardware.h>
  32 #include <mach/map.h>
  33 #include <mach/regs-clock.h>
  34
  35 #include <plat/regs-serial.h>
  36 #include <plat/cpu.h>
  37 #include <plat/devs.h>
  38 #include <plat/clock.h>
  39 #include <plat/s5p6440.h>
  40 #include <plat/s5p6450.h>
  41 #include <plat/adc-core.h>
  42
  43 /* Initial IO mappings */
  44
  45 static struct map_desc s5p64x0_iodesc[] __initdata = {
  46         {
  47                 .virtual        = (unsigned long)S5P_VA_GPIO,
  48                 .pfn            = __phys_to_pfn(S5P64X0_PA_GPIO),
  49                 .length         = SZ_4K,
  50                 .type           = MT_DEVICE,
  51         }, {
  52                 .virtual        = (unsigned long)VA_VIC0,
  53                 .pfn            = __phys_to_pfn(S5P64X0_PA_VIC0),
  54                 .length         = SZ_16K,
  55                 .type           = MT_DEVICE,
  56         }, {
  57                 .virtual        = (unsigned long)VA_VIC1,
  58                 .pfn            = __phys_to_pfn(S5P64X0_PA_VIC1),
  59                 .length         = SZ_16K,
  60                 .type           = MT_DEVICE,
  61         },
  62 };
  63
  64 static struct map_desc s5p6440_iodesc[] __initdata = {
  65         {
  66                 .virtual        = (unsigned long)S3C_VA_UART,
  67                 .pfn            = __phys_to_pfn(S5P6440_PA_UART(0)),
  68                 .length         = SZ_4K,
  69                 .type           = MT_DEVICE,
  70         },
  71 };
  72
  73 static struct map_desc s5p6450_iodesc[] __initdata = {
  74         {
  75                 .virtual        = (unsigned long)S3C_VA_UART,
  76                 .pfn            = __phys_to_pfn(S5P6450_PA_UART(0)),
  77                 .length         = SZ_512K,
  78                 .type           = MT_DEVICE,
  79         }, {
  80                 .virtual        = (unsigned long)S3C_VA_UART + SZ_512K,
  81                 .pfn            = __phys_to_pfn(S5P6450_PA_UART(5)),
  82                 .length         = SZ_4K,
  83                 .type           = MT_DEVICE,
  84         },
  85 };
  86
  87 static void s5p64x0_idle(void)
  88 {
  89         unsigned long val;
  90
  91         if (!need_resched()) {
  92                 val = __raw_readl(S5P64X0_PWR_CFG);
  93                 val &= ~(0x3 << 5);
  94                 val |= (0x1 << 5);
  95                 __raw_writel(val, S5P64X0_PWR_CFG);
  96
  97                 cpu_do_idle();
  98         }
  99         local_irq_enable();
 100 }
 101
 102 /*
 103  * s5p64x0_map_io
 104  *
 105  * register the standard CPU IO areas
 106  */
 107
 108 void __init s5p6440_map_io(void)
 109 {
 110         /* initialize any device information early */
 111         s3c_adc_setname("s3c64xx-adc");
 112
 113         iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
 114         iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
 115         init_consistent_dma_size(SZ_8M);
 116 }
 117
 118 void __init s5p6450_map_io(void)
 119 {
 120         /* initialize any device information early */
 121         s3c_adc_setname("s3c64xx-adc");
 122
 123         iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
 124         iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
 125         init_consistent_dma_size(SZ_8M);
 126 }
 127
 128 /*
 129  * s5p64x0_init_clocks
 130  *
 131  * register and setup the CPU clocks
 132  */
 133
 134 void __init s5p6440_init_clocks(int xtal)
 135 {
 136         printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
 137
 138         s3c24xx_register_baseclocks(xtal);
 139         s5p_register_clocks(xtal);
 140         s5p6440_register_clocks();
 141         s5p6440_setup_clocks();
 142 }
 143
 144 void __init s5p6450_init_clocks(int xtal)
 145 {
 146         printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
 147
 148         s3c24xx_register_baseclocks(xtal);
 149         s5p_register_clocks(xtal);
 150         s5p6450_register_clocks();
 151         s5p6450_setup_clocks();
 152 }
 153
 154 /*
 155  * s5p64x0_init_irq
 156  *
 157  * register the CPU interrupts
 158  */
 159
 160 void __init s5p6440_init_irq(void)
 161 {
 162         /* S5P6440 supports 2 VIC */
 163         u32 vic[2];
 164
 165         /*
 166          * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
 167          * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
 168          */
 169         vic[0] = 0xff800ae7;
 170         vic[1] = 0xffbf23e5;
 171
 172         s5p_init_irq(vic, ARRAY_SIZE(vic));
 173 }
 174
 175 void __init s5p6450_init_irq(void)
 176 {
 177         /* S5P6450 supports only 2 VIC */
 178         u32 vic[2];
 179
 180         /*
 181          * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
 182          * VIC1 is missing IRQ VIC1[12, 14, 23]
 183          */
 184         vic[0] = 0xff9f1fff;
 185         vic[1] = 0xff7fafff;
 186
 187         s5p_init_irq(vic, ARRAY_SIZE(vic));
 188 }
 189
 190 struct sysdev_class s5p64x0_sysclass = {
 191         .name   = "s5p64x0-core",
 192 };
 193
 194 static struct sys_device s5p64x0_sysdev = {
 195         .cls    = &s5p64x0_sysclass,
 196 };
 197
 198 static int __init s5p64x0_core_init(void)
 199 {
 200         return sysdev_class_register(&s5p64x0_sysclass);
 201 }
 202 core_initcall(s5p64x0_core_init);
 203
 204 int __init s5p64x0_init(void)
 205 {
 206         printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
 207
 208         /* set idle function */
 209         pm_idle = s5p64x0_idle;
 210
 211         return sysdev_register(&s5p64x0_sysdev);
 212 }