Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jack/linux...
[pandora-kernel.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
2  *
3  * Copyright 2008 Openmoko, Inc.
4  * Copyright 2008 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/i2c.h>
24 #include <linux/leds.h>
25 #include <linux/fb.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/smsc911x.h>
29 #include <linux/regulator/fixed.h>
30
31 #ifdef CONFIG_SMDK6410_WM1190_EV1
32 #include <linux/mfd/wm8350/core.h>
33 #include <linux/mfd/wm8350/pmic.h>
34 #endif
35
36 #ifdef CONFIG_SMDK6410_WM1192_EV1
37 #include <linux/mfd/wm831x/core.h>
38 #include <linux/mfd/wm831x/pdata.h>
39 #endif
40
41 #include <video/platform_lcd.h>
42
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45 #include <asm/mach/irq.h>
46
47 #include <mach/hardware.h>
48 #include <mach/regs-fb.h>
49 #include <mach/map.h>
50
51 #include <asm/irq.h>
52 #include <asm/mach-types.h>
53
54 #include <plat/regs-serial.h>
55 #include <mach/regs-modem.h>
56 #include <mach/regs-gpio.h>
57 #include <mach/regs-sys.h>
58 #include <mach/regs-srom.h>
59 #include <plat/iic.h>
60 #include <plat/fb.h>
61 #include <plat/gpio-cfg.h>
62
63 #include <mach/s3c6410.h>
64 #include <plat/clock.h>
65 #include <plat/devs.h>
66 #include <plat/cpu.h>
67
68 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
69 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
71
72 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
73         [0] = {
74                 .hwport      = 0,
75                 .flags       = 0,
76                 .ucon        = UCON,
77                 .ulcon       = ULCON,
78                 .ufcon       = UFCON,
79         },
80         [1] = {
81                 .hwport      = 1,
82                 .flags       = 0,
83                 .ucon        = UCON,
84                 .ulcon       = ULCON,
85                 .ufcon       = UFCON,
86         },
87         [2] = {
88                 .hwport      = 2,
89                 .flags       = 0,
90                 .ucon        = UCON,
91                 .ulcon       = ULCON,
92                 .ufcon       = UFCON,
93         },
94         [3] = {
95                 .hwport      = 3,
96                 .flags       = 0,
97                 .ucon        = UCON,
98                 .ulcon       = ULCON,
99                 .ufcon       = UFCON,
100         },
101 };
102
103 /* framebuffer and LCD setup. */
104
105 /* GPF15 = LCD backlight control
106  * GPF13 => Panel power
107  * GPN5 = LCD nRESET signal
108  * PWM_TOUT1 => backlight brightness
109  */
110
111 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
112                                    unsigned int power)
113 {
114         if (power) {
115                 gpio_direction_output(S3C64XX_GPF(13), 1);
116                 gpio_direction_output(S3C64XX_GPF(15), 1);
117
118                 /* fire nRESET on power up */
119                 gpio_direction_output(S3C64XX_GPN(5), 0);
120                 msleep(10);
121                 gpio_direction_output(S3C64XX_GPN(5), 1);
122                 msleep(1);
123         } else {
124                 gpio_direction_output(S3C64XX_GPF(15), 0);
125                 gpio_direction_output(S3C64XX_GPF(13), 0);
126         }
127 }
128
129 static struct plat_lcd_data smdk6410_lcd_power_data = {
130         .set_power      = smdk6410_lcd_power_set,
131 };
132
133 static struct platform_device smdk6410_lcd_powerdev = {
134         .name                   = "platform-lcd",
135         .dev.parent             = &s3c_device_fb.dev,
136         .dev.platform_data      = &smdk6410_lcd_power_data,
137 };
138
139 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
140         /* this is to ensure we use win0 */
141         .win_mode       = {
142                 .pixclock       = 41094,
143                 .left_margin    = 8,
144                 .right_margin   = 13,
145                 .upper_margin   = 7,
146                 .lower_margin   = 5,
147                 .hsync_len      = 3,
148                 .vsync_len      = 1,
149                 .xres           = 800,
150                 .yres           = 480,
151         },
152         .max_bpp        = 32,
153         .default_bpp    = 16,
154 };
155
156 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
157 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
158         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
159         .win[0]         = &smdk6410_fb_win0,
160         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
161         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
162 };
163
164 /*
165  * Configuring Ethernet on SMDK6410
166  *
167  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
168  * The constant address below corresponds to nCS1
169  *
170  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
171  *  2) CFG6 needs to be switched to "LAN9115" side
172  */
173
174 static struct resource smdk6410_smsc911x_resources[] = {
175         [0] = {
176                 .start = S3C64XX_PA_XM0CSN1,
177                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
178                 .flags = IORESOURCE_MEM,
179         },
180         [1] = {
181                 .start = S3C_EINT(10),
182                 .end   = S3C_EINT(10),
183                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
184         },
185 };
186
187 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
188         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
189         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
190         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
191         .phy_interface = PHY_INTERFACE_MODE_MII,
192 };
193
194
195 static struct platform_device smdk6410_smsc911x = {
196         .name          = "smsc911x",
197         .id            = -1,
198         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
199         .resource      = &smdk6410_smsc911x_resources[0],
200         .dev = {
201                 .platform_data = &smdk6410_smsc911x_pdata,
202         },
203 };
204
205 #ifdef CONFIG_REGULATOR
206 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
207         {
208                 /* WM8580 */
209                 .supply = "PVDD",
210                 .dev_name = "0-001b",
211         },
212         {
213                 /* WM8580 */
214                 .supply = "AVDD",
215                 .dev_name = "0-001b",
216         },
217 };
218
219 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
220         .constraints = {
221                 .always_on = 1,
222         },
223         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
224         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
225 };
226
227 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
228         .supply_name = "B_PWR_5V",
229         .microvolts = 5000000,
230         .init_data = &smdk6410_b_pwr_5v_data,
231         .gpio = -EINVAL,
232 };
233
234 static struct platform_device smdk6410_b_pwr_5v = {
235         .name          = "reg-fixed-voltage",
236         .id            = -1,
237         .dev = {
238                 .platform_data = &smdk6410_b_pwr_5v_pdata,
239         },
240 };
241 #endif
242
243 static struct map_desc smdk6410_iodesc[] = {};
244
245 static struct platform_device *smdk6410_devices[] __initdata = {
246 #ifdef CONFIG_SMDK6410_SD_CH0
247         &s3c_device_hsmmc0,
248 #endif
249 #ifdef CONFIG_SMDK6410_SD_CH1
250         &s3c_device_hsmmc1,
251 #endif
252         &s3c_device_i2c0,
253         &s3c_device_i2c1,
254         &s3c_device_fb,
255         &s3c_device_ohci,
256         &s3c_device_usb_hsotg,
257         &s3c64xx_device_iisv4,
258
259 #ifdef CONFIG_REGULATOR
260         &smdk6410_b_pwr_5v,
261 #endif
262         &smdk6410_lcd_powerdev,
263
264         &smdk6410_smsc911x,
265 };
266
267 #ifdef CONFIG_REGULATOR
268 /* ARM core */
269 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
270         {
271                 .supply = "vddarm",
272         }
273 };
274
275 /* VDDARM, BUCK1 on J5 */
276 static struct regulator_init_data smdk6410_vddarm = {
277         .constraints = {
278                 .name = "PVDD_ARM",
279                 .min_uV = 1000000,
280                 .max_uV = 1300000,
281                 .always_on = 1,
282                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
283         },
284         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
285         .consumer_supplies = smdk6410_vddarm_consumers,
286 };
287
288 /* VDD_INT, BUCK2 on J5 */
289 static struct regulator_init_data smdk6410_vddint = {
290         .constraints = {
291                 .name = "PVDD_INT",
292                 .min_uV = 1000000,
293                 .max_uV = 1200000,
294                 .always_on = 1,
295                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
296         },
297 };
298
299 /* VDD_HI, LDO3 on J5 */
300 static struct regulator_init_data smdk6410_vddhi = {
301         .constraints = {
302                 .name = "PVDD_HI",
303                 .always_on = 1,
304         },
305 };
306
307 /* VDD_PLL, LDO2 on J5 */
308 static struct regulator_init_data smdk6410_vddpll = {
309         .constraints = {
310                 .name = "PVDD_PLL",
311                 .always_on = 1,
312         },
313 };
314
315 /* VDD_UH_MMC, LDO5 on J5 */
316 static struct regulator_init_data smdk6410_vdduh_mmc = {
317         .constraints = {
318                 .name = "PVDD_UH/PVDD_MMC",
319                 .always_on = 1,
320         },
321 };
322
323 /* VCCM3BT, LDO8 on J5 */
324 static struct regulator_init_data smdk6410_vccmc3bt = {
325         .constraints = {
326                 .name = "PVCCM3BT",
327                 .always_on = 1,
328         },
329 };
330
331 /* VCCM2MTV, LDO11 on J5 */
332 static struct regulator_init_data smdk6410_vccm2mtv = {
333         .constraints = {
334                 .name = "PVCCM2MTV",
335                 .always_on = 1,
336         },
337 };
338
339 /* VDD_LCD, LDO12 on J5 */
340 static struct regulator_init_data smdk6410_vddlcd = {
341         .constraints = {
342                 .name = "PVDD_LCD",
343                 .always_on = 1,
344         },
345 };
346
347 /* VDD_OTGI, LDO9 on J5 */
348 static struct regulator_init_data smdk6410_vddotgi = {
349         .constraints = {
350                 .name = "PVDD_OTGI",
351                 .always_on = 1,
352         },
353 };
354
355 /* VDD_OTG, LDO14 on J5 */
356 static struct regulator_init_data smdk6410_vddotg = {
357         .constraints = {
358                 .name = "PVDD_OTG",
359                 .always_on = 1,
360         },
361 };
362
363 /* VDD_ALIVE, LDO15 on J5 */
364 static struct regulator_init_data smdk6410_vddalive = {
365         .constraints = {
366                 .name = "PVDD_ALIVE",
367                 .always_on = 1,
368         },
369 };
370
371 /* VDD_AUDIO, VLDO_AUDIO on J5 */
372 static struct regulator_init_data smdk6410_vddaudio = {
373         .constraints = {
374                 .name = "PVDD_AUDIO",
375                 .always_on = 1,
376         },
377 };
378 #endif
379
380 #ifdef CONFIG_SMDK6410_WM1190_EV1
381 /* S3C64xx internal logic & PLL */
382 static struct regulator_init_data wm8350_dcdc1_data = {
383         .constraints = {
384                 .name = "PVDD_INT/PVDD_PLL",
385                 .min_uV = 1200000,
386                 .max_uV = 1200000,
387                 .always_on = 1,
388                 .apply_uV = 1,
389         },
390 };
391
392 /* Memory */
393 static struct regulator_init_data wm8350_dcdc3_data = {
394         .constraints = {
395                 .name = "PVDD_MEM",
396                 .min_uV = 1800000,
397                 .max_uV = 1800000,
398                 .always_on = 1,
399                 .state_mem = {
400                          .uV = 1800000,
401                          .mode = REGULATOR_MODE_NORMAL,
402                          .enabled = 1,
403                 },
404                 .initial_state = PM_SUSPEND_MEM,
405         },
406 };
407
408 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
409 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
410         {
411                 /* WM8580 */
412                 .supply = "DVDD",
413                 .dev_name = "0-001b",
414         },
415 };
416
417 static struct regulator_init_data wm8350_dcdc4_data = {
418         .constraints = {
419                 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
420                 .min_uV = 3000000,
421                 .max_uV = 3000000,
422                 .always_on = 1,
423         },
424         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
425         .consumer_supplies = wm8350_dcdc4_consumers,
426 };
427
428 /* OTGi/1190-EV1 HPVDD & AVDD */
429 static struct regulator_init_data wm8350_ldo4_data = {
430         .constraints = {
431                 .name = "PVDD_OTGI/HPVDD/AVDD",
432                 .min_uV = 1200000,
433                 .max_uV = 1200000,
434                 .apply_uV = 1,
435                 .always_on = 1,
436         },
437 };
438
439 static struct {
440         int regulator;
441         struct regulator_init_data *initdata;
442 } wm1190_regulators[] = {
443         { WM8350_DCDC_1, &wm8350_dcdc1_data },
444         { WM8350_DCDC_3, &wm8350_dcdc3_data },
445         { WM8350_DCDC_4, &wm8350_dcdc4_data },
446         { WM8350_DCDC_6, &smdk6410_vddarm },
447         { WM8350_LDO_1, &smdk6410_vddalive },
448         { WM8350_LDO_2, &smdk6410_vddotg },
449         { WM8350_LDO_3, &smdk6410_vddlcd },
450         { WM8350_LDO_4, &wm8350_ldo4_data },
451 };
452
453 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
454 {
455         int i;
456
457         /* Configure the IRQ line */
458         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
459
460         /* Instantiate the regulators */
461         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
462                 wm8350_register_regulator(wm8350,
463                                           wm1190_regulators[i].regulator,
464                                           wm1190_regulators[i].initdata);
465
466         return 0;
467 }
468
469 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
470         .init = smdk6410_wm8350_init,
471         .irq_high = 1,
472         .irq_base = IRQ_BOARD_START,
473 };
474 #endif
475
476 #ifdef CONFIG_SMDK6410_WM1192_EV1
477 static struct gpio_led wm1192_pmic_leds[] = {
478         {
479                 .name = "PMIC:red:power",
480                 .gpio = GPIO_BOARD_START + 3,
481                 .default_state = LEDS_GPIO_DEFSTATE_ON,
482         },
483 };
484
485 static struct gpio_led_platform_data wm1192_pmic_led = {
486         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
487         .leds = wm1192_pmic_leds,
488 };
489
490 static struct platform_device wm1192_pmic_led_dev = {
491         .name          = "leds-gpio",
492         .id            = -1,
493         .dev = {
494                 .platform_data = &wm1192_pmic_led,
495         },
496 };
497
498 static int wm1192_pre_init(struct wm831x *wm831x)
499 {
500         int ret;
501
502         /* Configure the IRQ line */
503         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
504
505         ret = platform_device_register(&wm1192_pmic_led_dev);
506         if (ret != 0)
507                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
508
509         return 0;
510 }
511
512 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
513         .isink = 1,
514         .max_uA = 27554,
515 };
516
517 static struct regulator_init_data wm1192_dcdc3 = {
518         .constraints = {
519                 .name = "PVDD_MEM/PVDD_GPS",
520                 .always_on = 1,
521         },
522 };
523
524 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
525         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
526 };
527
528 static struct regulator_init_data wm1192_ldo1 = {
529         .constraints = {
530                 .name = "PVDD_LCD/PVDD_EXT",
531                 .always_on = 1,
532         },
533         .consumer_supplies = wm1192_ldo1_consumers,
534         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
535 };
536
537 static struct wm831x_status_pdata wm1192_led7_pdata = {
538         .name = "LED7:green:",
539 };
540
541 static struct wm831x_status_pdata wm1192_led8_pdata = {
542         .name = "LED8:green:",
543 };
544
545 static struct wm831x_pdata smdk6410_wm1192_pdata = {
546         .pre_init = wm1192_pre_init,
547         .irq_base = IRQ_BOARD_START,
548
549         .backlight = &wm1192_backlight_pdata,
550         .dcdc = {
551                 &smdk6410_vddarm,  /* DCDC1 */
552                 &smdk6410_vddint,  /* DCDC2 */
553                 &wm1192_dcdc3,
554         },
555         .gpio_base = GPIO_BOARD_START,
556         .ldo = {
557                  &wm1192_ldo1,        /* LDO1 */
558                  &smdk6410_vdduh_mmc, /* LDO2 */
559                  NULL,                /* LDO3 NC */
560                  &smdk6410_vddotgi,   /* LDO4 */
561                  &smdk6410_vddotg,    /* LDO5 */
562                  &smdk6410_vddhi,     /* LDO6 */
563                  &smdk6410_vddaudio,  /* LDO7 */
564                  &smdk6410_vccm2mtv,  /* LDO8 */
565                  &smdk6410_vddpll,    /* LDO9 */
566                  &smdk6410_vccmc3bt,  /* LDO10 */
567                  &smdk6410_vddalive,  /* LDO11 */
568         },
569         .status = {
570                 &wm1192_led7_pdata,
571                 &wm1192_led8_pdata,
572         },
573 };
574 #endif
575
576 static struct i2c_board_info i2c_devs0[] __initdata = {
577         { I2C_BOARD_INFO("24c08", 0x50), },
578         { I2C_BOARD_INFO("wm8580", 0x1b), },
579
580 #ifdef CONFIG_SMDK6410_WM1192_EV1
581         { I2C_BOARD_INFO("wm8312", 0x34),
582           .platform_data = &smdk6410_wm1192_pdata,
583           .irq = S3C_EINT(12),
584         },
585 #endif
586
587 #ifdef CONFIG_SMDK6410_WM1190_EV1
588         { I2C_BOARD_INFO("wm8350", 0x1a),
589           .platform_data = &smdk6410_wm8350_pdata,
590           .irq = S3C_EINT(12),
591         },
592 #endif
593 };
594
595 static struct i2c_board_info i2c_devs1[] __initdata = {
596         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
597 };
598
599 static void __init smdk6410_map_io(void)
600 {
601         u32 tmp;
602
603         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
604         s3c24xx_init_clocks(12000000);
605         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
606
607         /* set the LCD type */
608
609         tmp = __raw_readl(S3C64XX_SPCON);
610         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
611         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
612         __raw_writel(tmp, S3C64XX_SPCON);
613
614         /* remove the lcd bypass */
615         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
616         tmp &= ~MIFPCON_LCD_BYPASS;
617         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
618 }
619
620 static void __init smdk6410_machine_init(void)
621 {
622         u32 cs1;
623
624         s3c_i2c0_set_platdata(NULL);
625         s3c_i2c1_set_platdata(NULL);
626         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
627
628         /* configure nCS1 width to 16 bits */
629
630         cs1 = __raw_readl(S3C64XX_SROM_BW) &
631                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
632         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
633                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
634                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
635                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
636         __raw_writel(cs1, S3C64XX_SROM_BW);
637
638         /* set timing for nCS1 suitable for ethernet chip */
639
640         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
641                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
642                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
643                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
644                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
645                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
646                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
647
648         gpio_request(S3C64XX_GPN(5), "LCD power");
649         gpio_request(S3C64XX_GPF(13), "LCD power");
650         gpio_request(S3C64XX_GPF(15), "LCD power");
651
652         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
653         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
654
655         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
656 }
657
658 MACHINE_START(SMDK6410, "SMDK6410")
659         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
660         .phys_io        = S3C_PA_UART & 0xfff00000,
661         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
662         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
663
664         .init_irq       = s3c6410_init_irq,
665         .map_io         = smdk6410_map_io,
666         .init_machine   = smdk6410_machine_init,
667         .timer          = &s3c24xx_timer,
668 MACHINE_END