arch/arm/mach-s3c64xx/mach-ncp.c

   1 /*
   2  * linux/arch/arm/mach-s3c64xx/mach-ncp.c
   3  *
   4  * Copyright (C) 2008-2009 Samsung Electronics
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/types.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/list.h>
  16 #include <linux/timer.h>
  17 #include <linux/init.h>
  18 #include <linux/serial_core.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/io.h>
  21 #include <linux/i2c.h>
  22 #include <linux/fb.h>
  23 #include <linux/gpio.h>
  24 #include <linux/delay.h>
  25
  26 #include <video/platform_lcd.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/irq.h>
  31
  32 #include <mach/hardware.h>
  33 #include <mach/regs-fb.h>
  34 #include <mach/map.h>
  35
  36 #include <asm/irq.h>
  37 #include <asm/mach-types.h>
  38
  39 #include <plat/regs-serial.h>
  40 #include <plat/iic.h>
  41 #include <plat/fb.h>
  42
  43 #include <mach/s3c6410.h>
  44 #include <plat/clock.h>
  45 #include <plat/devs.h>
  46 #include <plat/cpu.h>
  47
  48 #define UCON S3C2410_UCON_DEFAULT
  49 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
  50 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  51
  52 static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
  53         /* REVISIT: NCP uses only serial 1, 2 */
  54         [0] = {
  55                 .hwport      = 0,
  56                 .flags       = 0,
  57                 .ucon        = UCON,
  58                 .ulcon       = ULCON,
  59                 .ufcon       = UFCON,
  60         },
  61         [1] = {
  62                 .hwport      = 1,
  63                 .flags       = 0,
  64                 .ucon        = UCON,
  65                 .ulcon       = ULCON,
  66                 .ufcon       = UFCON,
  67         },
  68         [2] = {
  69                 .hwport      = 2,
  70                 .flags       = 0,
  71                 .ucon        = UCON,
  72                 .ulcon       = ULCON,
  73                 .ufcon       = UFCON,
  74         },
  75 };
  76
  77 static struct platform_device *ncp_devices[] __initdata = {
  78         &s3c_device_hsmmc1,
  79         &s3c_device_i2c0,
  80 };
  81
  82 static struct map_desc ncp_iodesc[] __initdata = {};
  83
  84 static void __init ncp_map_io(void)
  85 {
  86         s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
  87         s3c24xx_init_clocks(12000000);
  88         s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
  89 }
  90
  91 static void __init ncp_machine_init(void)
  92 {
  93         s3c_i2c0_set_platdata(NULL);
  94
  95         platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
  96 }
  97
  98 MACHINE_START(NCP, "NCP")
  99         /* Maintainer: Samsung Electronics */
 100         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 101         .init_irq       = s3c6410_init_irq,
 102         .map_io         = ncp_map_io,
 103         .init_machine   = ncp_machine_init,
 104         .timer          = &s3c24xx_timer,
 105 MACHINE_END