Pull bugzilla-5452 into release branch
[pandora-kernel.git] / arch / arm / mach-s3c2410 / mach-rx3715.c
1 /* linux/arch/arm/mach-s3c2410/mach-rx3715.c
2  *
3  * Copyright (c) 2003,2004 Simtec Electronics
4  *      Ben Dooks <ben@simtec.co.uk>
5  *
6  * http://www.handhelds.org/projects/rx3715.html
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * Modifications:
13  *      16-Sep-2004 BJD  Copied from mach-h1940.c
14  *      25-Oct-2004 BJD  Updates for 2.6.10-rc1
15  *      10-Jan-2005 BJD  Removed include of s3c2410.h s3c2440.h
16  *      14-Jan-2005 BJD  Added new clock init
17  *      10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
18  *      14-Mar-2005 BJD  Fixed __iomem warnings
19  *      20-Sep-2005 BJD  Added static to non-exported items
20  *      31-Oct-2005 BJD  Added LCD setup for framebuffer
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/timer.h>
28 #include <linux/init.h>
29 #include <linux/tty.h>
30 #include <linux/console.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_core.h>
33 #include <linux/serial.h>
34
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_ecc.h>
38 #include <linux/mtd/partitions.h>
39
40 #include <asm/mach/arch.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/irq.h>
43
44 #include <asm/hardware.h>
45 #include <asm/hardware/iomd.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/mach-types.h>
49
50 #include <asm/arch/regs-serial.h>
51 #include <asm/arch/regs-gpio.h>
52 #include <asm/arch/regs-lcd.h>
53
54 #include <asm/arch/nand.h>
55 #include <asm/arch/fb.h>
56
57 #include "clock.h"
58 #include "devs.h"
59 #include "cpu.h"
60 #include "pm.h"
61
62 static struct map_desc rx3715_iodesc[] __initdata = {
63         /* dump ISA space somewhere unused */
64
65         {
66                 .virtual        = (u32)S3C24XX_VA_ISA_WORD,
67                 .pfn            = __phys_to_pfn(S3C2410_CS3),
68                 .length         = SZ_1M,
69                 .type           = MT_DEVICE,
70         }, {
71                 .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
72                 .pfn            = __phys_to_pfn(S3C2410_CS3),
73                 .length         = SZ_1M,
74                 .type           = MT_DEVICE,
75         },
76 };
77
78
79 static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
80         [0] = {
81                 .name           = "fclk",
82                 .divisor        = 0,
83                 .min_baud       = 0,
84                 .max_baud       = 0,
85         }
86 };
87
88 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
89         [0] = {
90                 .hwport      = 0,
91                 .flags       = 0,
92                 .ucon        = 0x3c5,
93                 .ulcon       = 0x03,
94                 .ufcon       = 0x51,
95                 .clocks      = rx3715_serial_clocks,
96                 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
97         },
98         [1] = {
99                 .hwport      = 1,
100                 .flags       = 0,
101                 .ucon        = 0x3c5,
102                 .ulcon       = 0x03,
103                 .ufcon       = 0x00,
104                 .clocks      = rx3715_serial_clocks,
105                 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
106         },
107         /* IR port */
108         [2] = {
109                 .hwport      = 2,
110                 .uart_flags  = UPF_CONS_FLOW,
111                 .ucon        = 0x3c5,
112                 .ulcon       = 0x43,
113                 .ufcon       = 0x51,
114                 .clocks      = rx3715_serial_clocks,
115                 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
116         }
117 };
118
119 /* framebuffer lcd controller information */
120
121 static struct s3c2410fb_mach_info rx3715_lcdcfg __initdata = {
122         .regs   = {
123                 .lcdcon1 =      S3C2410_LCDCON1_TFT16BPP | \
124                                 S3C2410_LCDCON1_TFT | \
125                                 S3C2410_LCDCON1_CLKVAL(0x0C),
126
127                 .lcdcon2 =      S3C2410_LCDCON2_VBPD(5) | \
128                                 S3C2410_LCDCON2_LINEVAL(319) | \
129                                 S3C2410_LCDCON2_VFPD(6) | \
130                                 S3C2410_LCDCON2_VSPW(2),
131
132                 .lcdcon3 =      S3C2410_LCDCON3_HBPD(35) | \
133                                 S3C2410_LCDCON3_HOZVAL(239) | \
134                                 S3C2410_LCDCON3_HFPD(35),
135
136                 .lcdcon4 =      S3C2410_LCDCON4_MVAL(0) | \
137                                 S3C2410_LCDCON4_HSPW(7),
138
139                 .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
140                                 S3C2410_LCDCON5_FRM565 |
141                                 S3C2410_LCDCON5_HWSWP,
142         },
143
144         .lpcsel =       0xf82,
145
146         .gpccon =       0xaa955699,
147         .gpccon_mask =  0xffc003cc,
148         .gpcup =        0x0000ffff,
149         .gpcup_mask =   0xffffffff,
150
151         .gpdcon =       0xaa95aaa1,
152         .gpdcon_mask =  0xffc0fff0,
153         .gpdup =        0x0000faff,
154         .gpdup_mask =   0xffffffff,
155
156         .fixed_syncs =  1,
157         .width  =       240,
158         .height =       320,
159
160         .xres   = {
161                 .min =          240,
162                 .max =          240,
163                 .defval =       240,
164         },
165
166         .yres   = {
167                 .max =          320,
168                 .min =          320,
169                 .defval =       320,
170         },
171
172         .bpp    = {
173                 .min =          16,
174                 .max =          16,
175                 .defval =       16,
176         },
177 };
178
179 static struct mtd_partition rx3715_nand_part[] = {
180         [0] = {
181                 .name           = "Whole Flash",
182                 .offset         = 0,
183                 .size           = MTDPART_SIZ_FULL,
184                 .mask_flags     = MTD_WRITEABLE,
185         }
186 };
187
188 static struct s3c2410_nand_set rx3715_nand_sets[] = {
189         [0] = {
190                 .name           = "Internal",
191                 .nr_chips       = 1,
192                 .nr_partitions  = ARRAY_SIZE(rx3715_nand_part),
193                 .partitions     = rx3715_nand_part,
194         },
195 };
196
197 static struct s3c2410_platform_nand rx3715_nand_info = {
198         .tacls          = 25,
199         .twrph0         = 50,
200         .twrph1         = 15,
201         .nr_sets        = ARRAY_SIZE(rx3715_nand_sets),
202         .sets           = rx3715_nand_sets,
203 };
204
205 static struct platform_device *rx3715_devices[] __initdata = {
206         &s3c_device_usb,
207         &s3c_device_lcd,
208         &s3c_device_wdt,
209         &s3c_device_i2c,
210         &s3c_device_iis,
211         &s3c_device_nand,
212 };
213
214 static struct s3c24xx_board rx3715_board __initdata = {
215         .devices       = rx3715_devices,
216         .devices_count = ARRAY_SIZE(rx3715_devices)
217 };
218
219 static void __init rx3715_map_io(void)
220 {
221         s3c_device_nand.dev.platform_data = &rx3715_nand_info;
222
223         s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
224         s3c24xx_init_clocks(16934000);
225         s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
226         s3c24xx_set_board(&rx3715_board);
227 }
228
229 static void __init rx3715_init_irq(void)
230 {
231         s3c24xx_init_irq();
232 }
233
234 static void __init rx3715_init_machine(void)
235 {
236         s3c2410_pm_init();
237         s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
238 }
239
240
241 MACHINE_START(RX3715, "IPAQ-RX3715")
242         /* Maintainer: Ben Dooks <ben@fluff.org> */
243         .phys_io        = S3C2410_PA_UART,
244         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
245         .boot_params    = S3C2410_SDRAM_PA + 0x100,
246         .map_io         = rx3715_map_io,
247         .init_irq       = rx3715_init_irq,
248         .init_machine   = rx3715_init_machine,
249         .timer          = &s3c24xx_timer,
250 MACHINE_END