Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide-2.6
[pandora-kernel.git] / arch / arm / mach-realview / realview_pb11mp.c
1 /*
2  *  linux/arch/arm/mach-realview/realview_pb11mp.c
3  *
4  *  Copyright (C) 2008 ARM Limited
5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/io.h>
29
30 #include <mach/hardware.h>
31 #include <asm/irq.h>
32 #include <asm/leds.h>
33 #include <asm/mach-types.h>
34 #include <asm/pmu.h>
35 #include <asm/hardware/gic.h>
36 #include <asm/hardware/cache-l2x0.h>
37 #include <asm/localtimer.h>
38
39 #include <asm/mach/arch.h>
40 #include <asm/mach/flash.h>
41 #include <asm/mach/map.h>
42 #include <asm/mach/time.h>
43
44 #include <mach/board-pb11mp.h>
45 #include <mach/irqs.h>
46
47 #include "core.h"
48
49 static struct map_desc realview_pb11mp_io_desc[] __initdata = {
50         {
51                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
52                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
53                 .length         = SZ_4K,
54                 .type           = MT_DEVICE,
55         }, {
56                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_CPU_BASE),
57                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_CPU_BASE),
58                 .length         = SZ_4K,
59                 .type           = MT_DEVICE,
60         }, {
61                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_GIC_DIST_BASE),
62                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_GIC_DIST_BASE),
63                 .length         = SZ_4K,
64                 .type           = MT_DEVICE,
65         }, {
66                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_CPU_BASE),
67                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_CPU_BASE),
68                 .length         = SZ_4K,
69                 .type           = MT_DEVICE,
70         }, {
71                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_GIC_DIST_BASE),
72                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_GIC_DIST_BASE),
73                 .length         = SZ_4K,
74                 .type           = MT_DEVICE,
75         }, {
76                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
77                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
78                 .length         = SZ_4K,
79                 .type           = MT_DEVICE,
80         }, {
81                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER0_1_BASE),
82                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER0_1_BASE),
83                 .length         = SZ_4K,
84                 .type           = MT_DEVICE,
85         }, {
86                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_TIMER2_3_BASE),
87                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_TIMER2_3_BASE),
88                 .length         = SZ_4K,
89                 .type           = MT_DEVICE,
90         }, {
91                 .virtual        = IO_ADDRESS(REALVIEW_TC11MP_L220_BASE),
92                 .pfn            = __phys_to_pfn(REALVIEW_TC11MP_L220_BASE),
93                 .length         = SZ_8K,
94                 .type           = MT_DEVICE,
95         },
96 #ifdef CONFIG_DEBUG_LL
97         {
98                 .virtual        = IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE),
99                 .pfn            = __phys_to_pfn(REALVIEW_PB11MP_UART0_BASE),
100                 .length         = SZ_4K,
101                 .type           = MT_DEVICE,
102         },
103 #endif
104 };
105
106 static void __init realview_pb11mp_map_io(void)
107 {
108         iotable_init(realview_pb11mp_io_desc, ARRAY_SIZE(realview_pb11mp_io_desc));
109 }
110
111 static struct pl061_platform_data gpio0_plat_data = {
112         .gpio_base      = 0,
113         .irq_base       = -1,
114 };
115
116 static struct pl061_platform_data gpio1_plat_data = {
117         .gpio_base      = 8,
118         .irq_base       = -1,
119 };
120
121 static struct pl061_platform_data gpio2_plat_data = {
122         .gpio_base      = 16,
123         .irq_base       = -1,
124 };
125
126 /*
127  * RealView PB11MPCore AMBA devices
128  */
129
130 #define GPIO2_IRQ               { IRQ_PB11MP_GPIO2, NO_IRQ }
131 #define GPIO2_DMA               { 0, 0 }
132 #define GPIO3_IRQ               { IRQ_PB11MP_GPIO3, NO_IRQ }
133 #define GPIO3_DMA               { 0, 0 }
134 #define AACI_IRQ                { IRQ_TC11MP_AACI, NO_IRQ }
135 #define AACI_DMA                { 0x80, 0x81 }
136 #define MMCI0_IRQ               { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
137 #define MMCI0_DMA               { 0x84, 0 }
138 #define KMI0_IRQ                { IRQ_TC11MP_KMI0, NO_IRQ }
139 #define KMI0_DMA                { 0, 0 }
140 #define KMI1_IRQ                { IRQ_TC11MP_KMI1, NO_IRQ }
141 #define KMI1_DMA                { 0, 0 }
142 #define PB11MP_SMC_IRQ          { NO_IRQ, NO_IRQ }
143 #define PB11MP_SMC_DMA          { 0, 0 }
144 #define MPMC_IRQ                { NO_IRQ, NO_IRQ }
145 #define MPMC_DMA                { 0, 0 }
146 #define PB11MP_CLCD_IRQ         { IRQ_PB11MP_CLCD, NO_IRQ }
147 #define PB11MP_CLCD_DMA         { 0, 0 }
148 #define DMAC_IRQ                { IRQ_PB11MP_DMAC, NO_IRQ }
149 #define DMAC_DMA                { 0, 0 }
150 #define SCTL_IRQ                { NO_IRQ, NO_IRQ }
151 #define SCTL_DMA                { 0, 0 }
152 #define PB11MP_WATCHDOG_IRQ     { IRQ_PB11MP_WATCHDOG, NO_IRQ }
153 #define PB11MP_WATCHDOG_DMA     { 0, 0 }
154 #define PB11MP_GPIO0_IRQ        { IRQ_PB11MP_GPIO0, NO_IRQ }
155 #define PB11MP_GPIO0_DMA        { 0, 0 }
156 #define GPIO1_IRQ               { IRQ_PB11MP_GPIO1, NO_IRQ }
157 #define GPIO1_DMA               { 0, 0 }
158 #define PB11MP_RTC_IRQ          { IRQ_TC11MP_RTC, NO_IRQ }
159 #define PB11MP_RTC_DMA          { 0, 0 }
160 #define SCI_IRQ                 { IRQ_PB11MP_SCI, NO_IRQ }
161 #define SCI_DMA                 { 7, 6 }
162 #define PB11MP_UART0_IRQ        { IRQ_TC11MP_UART0, NO_IRQ }
163 #define PB11MP_UART0_DMA        { 15, 14 }
164 #define PB11MP_UART1_IRQ        { IRQ_TC11MP_UART1, NO_IRQ }
165 #define PB11MP_UART1_DMA        { 13, 12 }
166 #define PB11MP_UART2_IRQ        { IRQ_PB11MP_UART2, NO_IRQ }
167 #define PB11MP_UART2_DMA        { 11, 10 }
168 #define PB11MP_UART3_IRQ        { IRQ_PB11MP_UART3, NO_IRQ }
169 #define PB11MP_UART3_DMA        { 0x86, 0x87 }
170 #define PB11MP_SSP_IRQ          { IRQ_PB11MP_SSP, NO_IRQ }
171 #define PB11MP_SSP_DMA          { 9, 8 }
172
173 /* FPGA Primecells */
174 AMBA_DEVICE(aaci,       "fpga:aaci",    AACI,           NULL);
175 AMBA_DEVICE(mmc0,       "fpga:mmc0",    MMCI0,          &realview_mmc0_plat_data);
176 AMBA_DEVICE(kmi0,       "fpga:kmi0",    KMI0,           NULL);
177 AMBA_DEVICE(kmi1,       "fpga:kmi1",    KMI1,           NULL);
178 AMBA_DEVICE(uart3,      "fpga:uart3",   PB11MP_UART3,   NULL);
179
180 /* DevChip Primecells */
181 AMBA_DEVICE(smc,        "dev:smc",      PB11MP_SMC,     NULL);
182 AMBA_DEVICE(sctl,       "dev:sctl",     SCTL,           NULL);
183 AMBA_DEVICE(wdog,       "dev:wdog",     PB11MP_WATCHDOG, NULL);
184 AMBA_DEVICE(gpio0,      "dev:gpio0",    PB11MP_GPIO0,   &gpio0_plat_data);
185 AMBA_DEVICE(gpio1,      "dev:gpio1",    GPIO1,          &gpio1_plat_data);
186 AMBA_DEVICE(gpio2,      "dev:gpio2",    GPIO2,          &gpio2_plat_data);
187 AMBA_DEVICE(rtc,        "dev:rtc",      PB11MP_RTC,     NULL);
188 AMBA_DEVICE(sci0,       "dev:sci0",     SCI,            NULL);
189 AMBA_DEVICE(uart0,      "dev:uart0",    PB11MP_UART0,   NULL);
190 AMBA_DEVICE(uart1,      "dev:uart1",    PB11MP_UART1,   NULL);
191 AMBA_DEVICE(uart2,      "dev:uart2",    PB11MP_UART2,   NULL);
192 AMBA_DEVICE(ssp0,       "dev:ssp0",     PB11MP_SSP,     NULL);
193
194 /* Primecells on the NEC ISSP chip */
195 AMBA_DEVICE(clcd,       "issp:clcd",    PB11MP_CLCD,    &clcd_plat_data);
196 AMBA_DEVICE(dmac,       "issp:dmac",    DMAC,           NULL);
197
198 static struct amba_device *amba_devs[] __initdata = {
199         &dmac_device,
200         &uart0_device,
201         &uart1_device,
202         &uart2_device,
203         &uart3_device,
204         &smc_device,
205         &clcd_device,
206         &sctl_device,
207         &wdog_device,
208         &gpio0_device,
209         &gpio1_device,
210         &gpio2_device,
211         &rtc_device,
212         &sci0_device,
213         &ssp0_device,
214         &aaci_device,
215         &mmc0_device,
216         &kmi0_device,
217         &kmi1_device,
218 };
219
220 /*
221  * RealView PB11MPCore platform devices
222  */
223 static struct resource realview_pb11mp_flash_resource[] = {
224         [0] = {
225                 .start          = REALVIEW_PB11MP_FLASH0_BASE,
226                 .end            = REALVIEW_PB11MP_FLASH0_BASE + REALVIEW_PB11MP_FLASH0_SIZE - 1,
227                 .flags          = IORESOURCE_MEM,
228         },
229         [1] = {
230                 .start          = REALVIEW_PB11MP_FLASH1_BASE,
231                 .end            = REALVIEW_PB11MP_FLASH1_BASE + REALVIEW_PB11MP_FLASH1_SIZE - 1,
232                 .flags          = IORESOURCE_MEM,
233         },
234 };
235
236 static struct resource realview_pb11mp_smsc911x_resources[] = {
237         [0] = {
238                 .start          = REALVIEW_PB11MP_ETH_BASE,
239                 .end            = REALVIEW_PB11MP_ETH_BASE + SZ_64K - 1,
240                 .flags          = IORESOURCE_MEM,
241         },
242         [1] = {
243                 .start          = IRQ_TC11MP_ETH,
244                 .end            = IRQ_TC11MP_ETH,
245                 .flags          = IORESOURCE_IRQ,
246         },
247 };
248
249 static struct resource realview_pb11mp_isp1761_resources[] = {
250         [0] = {
251                 .start          = REALVIEW_PB11MP_USB_BASE,
252                 .end            = REALVIEW_PB11MP_USB_BASE + SZ_128K - 1,
253                 .flags          = IORESOURCE_MEM,
254         },
255         [1] = {
256                 .start          = IRQ_TC11MP_USB,
257                 .end            = IRQ_TC11MP_USB,
258                 .flags          = IORESOURCE_IRQ,
259         },
260 };
261
262 static struct resource pmu_resources[] = {
263         [0] = {
264                 .start          = IRQ_TC11MP_PMU_CPU0,
265                 .end            = IRQ_TC11MP_PMU_CPU0,
266                 .flags          = IORESOURCE_IRQ,
267         },
268         [1] = {
269                 .start          = IRQ_TC11MP_PMU_CPU1,
270                 .end            = IRQ_TC11MP_PMU_CPU1,
271                 .flags          = IORESOURCE_IRQ,
272         },
273         [2] = {
274                 .start          = IRQ_TC11MP_PMU_CPU2,
275                 .end            = IRQ_TC11MP_PMU_CPU2,
276                 .flags          = IORESOURCE_IRQ,
277         },
278         [3] = {
279                 .start          = IRQ_TC11MP_PMU_CPU3,
280                 .end            = IRQ_TC11MP_PMU_CPU3,
281                 .flags          = IORESOURCE_IRQ,
282         },
283 };
284
285 static struct platform_device pmu_device = {
286         .name                   = "arm-pmu",
287         .id                     = ARM_PMU_DEVICE_CPU,
288         .num_resources          = ARRAY_SIZE(pmu_resources),
289         .resource               = pmu_resources,
290 };
291
292 static void __init gic_init_irq(void)
293 {
294         unsigned int pldctrl;
295
296         /* new irq mode with no DCC */
297         writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
298         pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
299         pldctrl |= 2 << 22;
300         writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_PB11MP_SYS_PLD_CTRL1);
301         writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
302
303         /* ARM11MPCore test chip GIC, primary */
304         gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
305         gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
306         gic_cpu_init(0, gic_cpu_base_addr);
307
308         /* board GIC, secondary */
309         gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
310         gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
311         gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
312 }
313
314 static void __init realview_pb11mp_timer_init(void)
315 {
316         timer0_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE);
317         timer1_va_base = __io_address(REALVIEW_PB11MP_TIMER0_1_BASE) + 0x20;
318         timer2_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE);
319         timer3_va_base = __io_address(REALVIEW_PB11MP_TIMER2_3_BASE) + 0x20;
320
321 #ifdef CONFIG_LOCAL_TIMERS
322         twd_base = __io_address(REALVIEW_TC11MP_TWD_BASE);
323 #endif
324         realview_timer_init(IRQ_TC11MP_TIMER0_1);
325 }
326
327 static struct sys_timer realview_pb11mp_timer = {
328         .init           = realview_pb11mp_timer_init,
329 };
330
331 static void realview_pb11mp_reset(char mode)
332 {
333         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
334         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
335
336         /*
337          * To reset, we hit the on-board reset register
338          * in the system FPGA
339          */
340         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
341         __raw_writel(0x0000, reset_ctrl);
342         __raw_writel(0x0004, reset_ctrl);
343 }
344
345 static void __init realview_pb11mp_init(void)
346 {
347         int i;
348
349 #ifdef CONFIG_CACHE_L2X0
350         /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
351          * Bits:  .... ...0 0111 1001 0000 .... .... .... */
352         l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
353 #endif
354
355         realview_flash_register(realview_pb11mp_flash_resource,
356                                 ARRAY_SIZE(realview_pb11mp_flash_resource));
357         realview_eth_register(NULL, realview_pb11mp_smsc911x_resources);
358         platform_device_register(&realview_i2c_device);
359         platform_device_register(&realview_cf_device);
360         realview_usb_register(realview_pb11mp_isp1761_resources);
361         platform_device_register(&pmu_device);
362
363         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
364                 struct amba_device *d = amba_devs[i];
365                 amba_device_register(d, &iomem_resource);
366         }
367
368 #ifdef CONFIG_LEDS
369         leds_event = realview_leds_event;
370 #endif
371         realview_reset = realview_pb11mp_reset;
372 }
373
374 MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
375         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
376         .phys_io        = REALVIEW_PB11MP_UART0_BASE,
377         .io_pg_offst    = (IO_ADDRESS(REALVIEW_PB11MP_UART0_BASE) >> 18) & 0xfffc,
378         .boot_params    = PHYS_OFFSET + 0x00000100,
379         .fixup          = realview_fixup,
380         .map_io         = realview_pb11mp_map_io,
381         .init_irq       = gic_init_irq,
382         .timer          = &realview_pb11mp_timer,
383         .init_machine   = realview_pb11mp_init,
384 MACHINE_END