Merge branch 'for-2.6.36' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/asoc...
[pandora-kernel.git] / arch / arm / mach-realview / realview_eb.c
1 /*
2  *  linux/arch/arm/mach-realview/realview_eb.c
3  *
4  *  Copyright (C) 2004 ARM Limited
5  *  Copyright (C) 2000 Deep Blue Solutions Ltd
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
20  */
21
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
26 #include <linux/amba/pl061.h>
27 #include <linux/amba/mmci.h>
28 #include <linux/io.h>
29
30 #include <mach/hardware.h>
31 #include <asm/irq.h>
32 #include <asm/leds.h>
33 #include <asm/mach-types.h>
34 #include <asm/pmu.h>
35 #include <asm/hardware/gic.h>
36 #include <asm/hardware/cache-l2x0.h>
37 #include <asm/localtimer.h>
38
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/time.h>
42
43 #include <mach/board-eb.h>
44 #include <mach/irqs.h>
45
46 #include "core.h"
47
48 static struct map_desc realview_eb_io_desc[] __initdata = {
49         {
50                 .virtual        = IO_ADDRESS(REALVIEW_SYS_BASE),
51                 .pfn            = __phys_to_pfn(REALVIEW_SYS_BASE),
52                 .length         = SZ_4K,
53                 .type           = MT_DEVICE,
54         }, {
55                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
56                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
57                 .length         = SZ_4K,
58                 .type           = MT_DEVICE,
59         }, {
60                 .virtual        = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
61                 .pfn            = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
62                 .length         = SZ_4K,
63                 .type           = MT_DEVICE,
64         }, {
65                 .virtual        = IO_ADDRESS(REALVIEW_SCTL_BASE),
66                 .pfn            = __phys_to_pfn(REALVIEW_SCTL_BASE),
67                 .length         = SZ_4K,
68                 .type           = MT_DEVICE,
69         }, {
70                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
71                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
72                 .length         = SZ_4K,
73                 .type           = MT_DEVICE,
74         }, {
75                 .virtual        = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
76                 .pfn            = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
77                 .length         = SZ_4K,
78                 .type           = MT_DEVICE,
79         },
80 #ifdef CONFIG_DEBUG_LL
81         {
82                 .virtual        = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
83                 .pfn            = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
84                 .length         = SZ_4K,
85                 .type           = MT_DEVICE,
86         }
87 #endif
88 };
89
90 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
91         {
92                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
93                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
94                 .length         = SZ_4K,
95                 .type           = MT_DEVICE,
96         }, {
97                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
98                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
99                 .length         = SZ_4K,
100                 .type           = MT_DEVICE,
101         }, {
102                 .virtual        = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
103                 .pfn            = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
104                 .length         = SZ_8K,
105                 .type           = MT_DEVICE,
106         }
107 };
108
109 static void __init realview_eb_map_io(void)
110 {
111         iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
112         if (core_tile_eb11mp() || core_tile_a9mp())
113                 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
114 }
115
116 static struct pl061_platform_data gpio0_plat_data = {
117         .gpio_base      = 0,
118         .irq_base       = -1,
119 };
120
121 static struct pl061_platform_data gpio1_plat_data = {
122         .gpio_base      = 8,
123         .irq_base       = -1,
124 };
125
126 static struct pl061_platform_data gpio2_plat_data = {
127         .gpio_base      = 16,
128         .irq_base       = -1,
129 };
130
131 /*
132  * RealView EB AMBA devices
133  */
134
135 /*
136  * These devices are connected via the core APB bridge
137  */
138 #define GPIO2_IRQ       { IRQ_EB_GPIO2, NO_IRQ }
139 #define GPIO2_DMA       { 0, 0 }
140 #define GPIO3_IRQ       { IRQ_EB_GPIO3, NO_IRQ }
141 #define GPIO3_DMA       { 0, 0 }
142
143 #define AACI_IRQ        { IRQ_EB_AACI, NO_IRQ }
144 #define AACI_DMA        { 0x80, 0x81 }
145 #define MMCI0_IRQ       { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
146 #define MMCI0_DMA       { 0x84, 0 }
147 #define KMI0_IRQ        { IRQ_EB_KMI0, NO_IRQ }
148 #define KMI0_DMA        { 0, 0 }
149 #define KMI1_IRQ        { IRQ_EB_KMI1, NO_IRQ }
150 #define KMI1_DMA        { 0, 0 }
151
152 /*
153  * These devices are connected directly to the multi-layer AHB switch
154  */
155 #define EB_SMC_IRQ      { NO_IRQ, NO_IRQ }
156 #define EB_SMC_DMA      { 0, 0 }
157 #define MPMC_IRQ        { NO_IRQ, NO_IRQ }
158 #define MPMC_DMA        { 0, 0 }
159 #define EB_CLCD_IRQ     { IRQ_EB_CLCD, NO_IRQ }
160 #define EB_CLCD_DMA     { 0, 0 }
161 #define DMAC_IRQ        { IRQ_EB_DMA, NO_IRQ }
162 #define DMAC_DMA        { 0, 0 }
163
164 /*
165  * These devices are connected via the core APB bridge
166  */
167 #define SCTL_IRQ        { NO_IRQ, NO_IRQ }
168 #define SCTL_DMA        { 0, 0 }
169 #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
170 #define EB_WATCHDOG_DMA { 0, 0 }
171 #define EB_GPIO0_IRQ    { IRQ_EB_GPIO0, NO_IRQ }
172 #define EB_GPIO0_DMA    { 0, 0 }
173 #define GPIO1_IRQ       { IRQ_EB_GPIO1, NO_IRQ }
174 #define GPIO1_DMA       { 0, 0 }
175 #define EB_RTC_IRQ      { IRQ_EB_RTC, NO_IRQ }
176 #define EB_RTC_DMA      { 0, 0 }
177
178 /*
179  * These devices are connected via the DMA APB bridge
180  */
181 #define SCI_IRQ         { IRQ_EB_SCI, NO_IRQ }
182 #define SCI_DMA         { 7, 6 }
183 #define EB_UART0_IRQ    { IRQ_EB_UART0, NO_IRQ }
184 #define EB_UART0_DMA    { 15, 14 }
185 #define EB_UART1_IRQ    { IRQ_EB_UART1, NO_IRQ }
186 #define EB_UART1_DMA    { 13, 12 }
187 #define EB_UART2_IRQ    { IRQ_EB_UART2, NO_IRQ }
188 #define EB_UART2_DMA    { 11, 10 }
189 #define EB_UART3_IRQ    { IRQ_EB_UART3, NO_IRQ }
190 #define EB_UART3_DMA    { 0x86, 0x87 }
191 #define EB_SSP_IRQ      { IRQ_EB_SSP, NO_IRQ }
192 #define EB_SSP_DMA      { 9, 8 }
193
194 /* FPGA Primecells */
195 AMBA_DEVICE(aaci,  "fpga:aaci",  AACI,     NULL);
196 AMBA_DEVICE(mmc0,  "fpga:mmc0",  MMCI0,    &realview_mmc0_plat_data);
197 AMBA_DEVICE(kmi0,  "fpga:kmi0",  KMI0,     NULL);
198 AMBA_DEVICE(kmi1,  "fpga:kmi1",  KMI1,     NULL);
199 AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
200
201 /* DevChip Primecells */
202 AMBA_DEVICE(smc,   "dev:smc",   EB_SMC,   NULL);
203 AMBA_DEVICE(clcd,  "dev:clcd",  EB_CLCD,  &clcd_plat_data);
204 AMBA_DEVICE(dmac,  "dev:dmac",  DMAC,     NULL);
205 AMBA_DEVICE(sctl,  "dev:sctl",  SCTL,     NULL);
206 AMBA_DEVICE(wdog,  "dev:wdog",  EB_WATCHDOG, NULL);
207 AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
208 AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1,    &gpio1_plat_data);
209 AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2,    &gpio2_plat_data);
210 AMBA_DEVICE(rtc,   "dev:rtc",   EB_RTC,   NULL);
211 AMBA_DEVICE(sci0,  "dev:sci0",  SCI,      NULL);
212 AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
213 AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
214 AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
215 AMBA_DEVICE(ssp0,  "dev:ssp0",  EB_SSP,   NULL);
216
217 static struct amba_device *amba_devs[] __initdata = {
218         &dmac_device,
219         &uart0_device,
220         &uart1_device,
221         &uart2_device,
222         &uart3_device,
223         &smc_device,
224         &clcd_device,
225         &sctl_device,
226         &wdog_device,
227         &gpio0_device,
228         &gpio1_device,
229         &gpio2_device,
230         &rtc_device,
231         &sci0_device,
232         &ssp0_device,
233         &aaci_device,
234         &mmc0_device,
235         &kmi0_device,
236         &kmi1_device,
237 };
238
239 /*
240  * RealView EB platform devices
241  */
242 static struct resource realview_eb_flash_resource = {
243         .start                  = REALVIEW_EB_FLASH_BASE,
244         .end                    = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
245         .flags                  = IORESOURCE_MEM,
246 };
247
248 static struct resource realview_eb_eth_resources[] = {
249         [0] = {
250                 .start          = REALVIEW_EB_ETH_BASE,
251                 .end            = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
252                 .flags          = IORESOURCE_MEM,
253         },
254         [1] = {
255                 .start          = IRQ_EB_ETH,
256                 .end            = IRQ_EB_ETH,
257                 .flags          = IORESOURCE_IRQ,
258         },
259 };
260
261 /*
262  * Detect and register the correct Ethernet device. RealView/EB rev D
263  * platforms use the newer SMSC LAN9118 Ethernet chip
264  */
265 static int eth_device_register(void)
266 {
267         void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
268         const char *name = NULL;
269         u32 idrev;
270
271         if (!eth_addr)
272                 return -ENOMEM;
273
274         idrev = readl(eth_addr + 0x50);
275         if ((idrev & 0xFFFF0000) != 0x01180000)
276                 /* SMSC LAN9118 not present, use LAN91C111 instead */
277                 name = "smc91x";
278
279         iounmap(eth_addr);
280         return realview_eth_register(name, realview_eb_eth_resources);
281 }
282
283 static struct resource realview_eb_isp1761_resources[] = {
284         [0] = {
285                 .start          = REALVIEW_EB_USB_BASE,
286                 .end            = REALVIEW_EB_USB_BASE + SZ_128K - 1,
287                 .flags          = IORESOURCE_MEM,
288         },
289         [1] = {
290                 .start          = IRQ_EB_USB,
291                 .end            = IRQ_EB_USB,
292                 .flags          = IORESOURCE_IRQ,
293         },
294 };
295
296 static struct resource pmu_resources[] = {
297         [0] = {
298                 .start          = IRQ_EB11MP_PMU_CPU0,
299                 .end            = IRQ_EB11MP_PMU_CPU0,
300                 .flags          = IORESOURCE_IRQ,
301         },
302         [1] = {
303                 .start          = IRQ_EB11MP_PMU_CPU1,
304                 .end            = IRQ_EB11MP_PMU_CPU1,
305                 .flags          = IORESOURCE_IRQ,
306         },
307         [2] = {
308                 .start          = IRQ_EB11MP_PMU_CPU2,
309                 .end            = IRQ_EB11MP_PMU_CPU2,
310                 .flags          = IORESOURCE_IRQ,
311         },
312         [3] = {
313                 .start          = IRQ_EB11MP_PMU_CPU3,
314                 .end            = IRQ_EB11MP_PMU_CPU3,
315                 .flags          = IORESOURCE_IRQ,
316         },
317 };
318
319 static struct platform_device pmu_device = {
320         .name                   = "arm-pmu",
321         .id                     = ARM_PMU_DEVICE_CPU,
322         .num_resources          = ARRAY_SIZE(pmu_resources),
323         .resource               = pmu_resources,
324 };
325
326 static void __init gic_init_irq(void)
327 {
328         if (core_tile_eb11mp() || core_tile_a9mp()) {
329                 unsigned int pldctrl;
330
331                 /* new irq mode */
332                 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
333                 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
334                 pldctrl |= 0x00800000;
335                 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
336                 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
337
338                 /* core tile GIC, primary */
339                 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
340                 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
341                 gic_cpu_init(0, gic_cpu_base_addr);
342
343 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
344                 /* board GIC, secondary */
345                 gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
346                 gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
347                 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
348 #endif
349         } else {
350                 /* board GIC, primary */
351                 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
352                 gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
353                 gic_cpu_init(0, gic_cpu_base_addr);
354         }
355 }
356
357 /*
358  * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
359  */
360 static void realview_eb11mp_fixup(void)
361 {
362         /* AMBA devices */
363         dmac_device.irq[0]      = IRQ_EB11MP_DMA;
364         uart0_device.irq[0]     = IRQ_EB11MP_UART0;
365         uart1_device.irq[0]     = IRQ_EB11MP_UART1;
366         uart2_device.irq[0]     = IRQ_EB11MP_UART2;
367         uart3_device.irq[0]     = IRQ_EB11MP_UART3;
368         clcd_device.irq[0]      = IRQ_EB11MP_CLCD;
369         wdog_device.irq[0]      = IRQ_EB11MP_WDOG;
370         gpio0_device.irq[0]     = IRQ_EB11MP_GPIO0;
371         gpio1_device.irq[0]     = IRQ_EB11MP_GPIO1;
372         gpio2_device.irq[0]     = IRQ_EB11MP_GPIO2;
373         rtc_device.irq[0]       = IRQ_EB11MP_RTC;
374         sci0_device.irq[0]      = IRQ_EB11MP_SCI;
375         ssp0_device.irq[0]      = IRQ_EB11MP_SSP;
376         aaci_device.irq[0]      = IRQ_EB11MP_AACI;
377         mmc0_device.irq[0]      = IRQ_EB11MP_MMCI0A;
378         mmc0_device.irq[1]      = IRQ_EB11MP_MMCI0B;
379         kmi0_device.irq[0]      = IRQ_EB11MP_KMI0;
380         kmi1_device.irq[0]      = IRQ_EB11MP_KMI1;
381
382         /* platform devices */
383         realview_eb_eth_resources[1].start      = IRQ_EB11MP_ETH;
384         realview_eb_eth_resources[1].end        = IRQ_EB11MP_ETH;
385         realview_eb_isp1761_resources[1].start  = IRQ_EB11MP_USB;
386         realview_eb_isp1761_resources[1].end    = IRQ_EB11MP_USB;
387 }
388
389 static void __init realview_eb_timer_init(void)
390 {
391         unsigned int timer_irq;
392
393         timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
394         timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
395         timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
396         timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
397
398         if (core_tile_eb11mp() || core_tile_a9mp()) {
399 #ifdef CONFIG_LOCAL_TIMERS
400                 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
401 #endif
402                 timer_irq = IRQ_EB11MP_TIMER0_1;
403         } else
404                 timer_irq = IRQ_EB_TIMER0_1;
405
406         realview_timer_init(timer_irq);
407 }
408
409 static struct sys_timer realview_eb_timer = {
410         .init           = realview_eb_timer_init,
411 };
412
413 static void realview_eb_reset(char mode)
414 {
415         void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
416         void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
417
418         /*
419          * To reset, we hit the on-board reset register
420          * in the system FPGA
421          */
422         __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
423         if (core_tile_eb11mp())
424                 __raw_writel(0x0008, reset_ctrl);
425 }
426
427 static void __init realview_eb_init(void)
428 {
429         int i;
430
431         if (core_tile_eb11mp() || core_tile_a9mp()) {
432                 realview_eb11mp_fixup();
433
434 #ifdef CONFIG_CACHE_L2X0
435                 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
436                  * Bits:  .... ...0 0111 1001 0000 .... .... .... */
437                 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
438 #endif
439                 platform_device_register(&pmu_device);
440         }
441
442         realview_flash_register(&realview_eb_flash_resource, 1);
443         platform_device_register(&realview_i2c_device);
444         eth_device_register();
445         realview_usb_register(realview_eb_isp1761_resources);
446
447         for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
448                 struct amba_device *d = amba_devs[i];
449                 amba_device_register(d, &iomem_resource);
450         }
451
452 #ifdef CONFIG_LEDS
453         leds_event = realview_leds_event;
454 #endif
455         realview_reset = realview_eb_reset;
456 }
457
458 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
459         /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
460         .phys_io        = REALVIEW_EB_UART0_BASE,
461         .io_pg_offst    = (IO_ADDRESS(REALVIEW_EB_UART0_BASE) >> 18) & 0xfffc,
462         .boot_params    = PHYS_OFFSET + 0x00000100,
463         .fixup          = realview_fixup,
464         .map_io         = realview_eb_map_io,
465         .init_irq       = gic_init_irq,
466         .timer          = &realview_eb_timer,
467         .init_machine   = realview_eb_init,
468 MACHINE_END