Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[pandora-kernel.git] / arch / arm / mach-pxa / devices.c
1 #include <linux/module.h>
2 #include <linux/kernel.h>
3 #include <linux/init.h>
4 #include <linux/platform_device.h>
5 #include <linux/dma-mapping.h>
6
7 #include <asm/pmu.h>
8 #include <mach/udc.h>
9 #include <mach/pxa3xx-u2d.h>
10 #include <mach/pxafb.h>
11 #include <mach/mmc.h>
12 #include <mach/irda.h>
13 #include <mach/ohci.h>
14 #include <plat/pxa27x_keypad.h>
15 #include <mach/pxa2xx_spi.h>
16 #include <mach/camera.h>
17 #include <mach/audio.h>
18 #include <mach/hardware.h>
19 #include <plat/i2c.h>
20 #include <plat/pxa3xx_nand.h>
21
22 #include "devices.h"
23 #include "generic.h"
24
25 void __init pxa_register_device(struct platform_device *dev, void *data)
26 {
27         int ret;
28
29         dev->dev.platform_data = data;
30
31         ret = platform_device_register(dev);
32         if (ret)
33                 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34 }
35
36 static struct resource pxa_resource_pmu = {
37         .start  = IRQ_PMU,
38         .end    = IRQ_PMU,
39         .flags  = IORESOURCE_IRQ,
40 };
41
42 struct platform_device pxa_device_pmu = {
43         .name           = "arm-pmu",
44         .id             = ARM_PMU_DEVICE_CPU,
45         .resource       = &pxa_resource_pmu,
46         .num_resources  = 1,
47 };
48
49 static struct resource pxamci_resources[] = {
50         [0] = {
51                 .start  = 0x41100000,
52                 .end    = 0x41100fff,
53                 .flags  = IORESOURCE_MEM,
54         },
55         [1] = {
56                 .start  = IRQ_MMC,
57                 .end    = IRQ_MMC,
58                 .flags  = IORESOURCE_IRQ,
59         },
60         [2] = {
61                 .start  = 21,
62                 .end    = 21,
63                 .flags  = IORESOURCE_DMA,
64         },
65         [3] = {
66                 .start  = 22,
67                 .end    = 22,
68                 .flags  = IORESOURCE_DMA,
69         },
70 };
71
72 static u64 pxamci_dmamask = 0xffffffffUL;
73
74 struct platform_device pxa_device_mci = {
75         .name           = "pxa2xx-mci",
76         .id             = 0,
77         .dev            = {
78                 .dma_mask = &pxamci_dmamask,
79                 .coherent_dma_mask = 0xffffffff,
80         },
81         .num_resources  = ARRAY_SIZE(pxamci_resources),
82         .resource       = pxamci_resources,
83 };
84
85 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86 {
87         pxa_register_device(&pxa_device_mci, info);
88 }
89
90
91 static struct pxa2xx_udc_mach_info pxa_udc_info = {
92         .gpio_pullup = -1,
93         .gpio_vbus   = -1,
94 };
95
96 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97 {
98         memcpy(&pxa_udc_info, info, sizeof *info);
99 }
100
101 static struct resource pxa2xx_udc_resources[] = {
102         [0] = {
103                 .start  = 0x40600000,
104                 .end    = 0x4060ffff,
105                 .flags  = IORESOURCE_MEM,
106         },
107         [1] = {
108                 .start  = IRQ_USB,
109                 .end    = IRQ_USB,
110                 .flags  = IORESOURCE_IRQ,
111         },
112 };
113
114 static u64 udc_dma_mask = ~(u32)0;
115
116 struct platform_device pxa25x_device_udc = {
117         .name           = "pxa25x-udc",
118         .id             = -1,
119         .resource       = pxa2xx_udc_resources,
120         .num_resources  = ARRAY_SIZE(pxa2xx_udc_resources),
121         .dev            =  {
122                 .platform_data  = &pxa_udc_info,
123                 .dma_mask       = &udc_dma_mask,
124         }
125 };
126
127 struct platform_device pxa27x_device_udc = {
128         .name           = "pxa27x-udc",
129         .id             = -1,
130         .resource       = pxa2xx_udc_resources,
131         .num_resources  = ARRAY_SIZE(pxa2xx_udc_resources),
132         .dev            =  {
133                 .platform_data  = &pxa_udc_info,
134                 .dma_mask       = &udc_dma_mask,
135         }
136 };
137
138 #ifdef CONFIG_PXA3xx
139 static struct resource pxa3xx_u2d_resources[] = {
140         [0] = {
141                 .start  = 0x54100000,
142                 .end    = 0x54100fff,
143                 .flags  = IORESOURCE_MEM,
144         },
145         [1] = {
146                 .start  = IRQ_USB2,
147                 .end    = IRQ_USB2,
148                 .flags  = IORESOURCE_IRQ,
149         },
150 };
151
152 struct platform_device pxa3xx_device_u2d = {
153         .name           = "pxa3xx-u2d",
154         .id             = -1,
155         .resource       = pxa3xx_u2d_resources,
156         .num_resources  = ARRAY_SIZE(pxa3xx_u2d_resources),
157 };
158
159 void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160 {
161         pxa_register_device(&pxa3xx_device_u2d, info);
162 }
163 #endif /* CONFIG_PXA3xx */
164
165 static struct resource pxafb_resources[] = {
166         [0] = {
167                 .start  = 0x44000000,
168                 .end    = 0x4400ffff,
169                 .flags  = IORESOURCE_MEM,
170         },
171         [1] = {
172                 .start  = IRQ_LCD,
173                 .end    = IRQ_LCD,
174                 .flags  = IORESOURCE_IRQ,
175         },
176 };
177
178 static u64 fb_dma_mask = ~(u64)0;
179
180 struct platform_device pxa_device_fb = {
181         .name           = "pxa2xx-fb",
182         .id             = -1,
183         .dev            = {
184                 .dma_mask       = &fb_dma_mask,
185                 .coherent_dma_mask = 0xffffffff,
186         },
187         .num_resources  = ARRAY_SIZE(pxafb_resources),
188         .resource       = pxafb_resources,
189 };
190
191 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
192 {
193         pxa_register_device(&pxa_device_fb, info);
194 }
195
196 void __init set_pxa_fb_parent(struct device *parent_dev)
197 {
198         pxa_device_fb.dev.parent = parent_dev;
199 }
200
201 static struct resource pxa_resource_ffuart[] = {
202         {
203                 .start  = 0x40100000,
204                 .end    = 0x40100023,
205                 .flags  = IORESOURCE_MEM,
206         }, {
207                 .start  = IRQ_FFUART,
208                 .end    = IRQ_FFUART,
209                 .flags  = IORESOURCE_IRQ,
210         }
211 };
212
213 struct platform_device pxa_device_ffuart = {
214         .name           = "pxa2xx-uart",
215         .id             = 0,
216         .resource       = pxa_resource_ffuart,
217         .num_resources  = ARRAY_SIZE(pxa_resource_ffuart),
218 };
219
220 void __init pxa_set_ffuart_info(void *info)
221 {
222         pxa_register_device(&pxa_device_ffuart, info);
223 }
224
225 static struct resource pxa_resource_btuart[] = {
226         {
227                 .start  = 0x40200000,
228                 .end    = 0x40200023,
229                 .flags  = IORESOURCE_MEM,
230         }, {
231                 .start  = IRQ_BTUART,
232                 .end    = IRQ_BTUART,
233                 .flags  = IORESOURCE_IRQ,
234         }
235 };
236
237 struct platform_device pxa_device_btuart = {
238         .name           = "pxa2xx-uart",
239         .id             = 1,
240         .resource       = pxa_resource_btuart,
241         .num_resources  = ARRAY_SIZE(pxa_resource_btuart),
242 };
243
244 void __init pxa_set_btuart_info(void *info)
245 {
246         pxa_register_device(&pxa_device_btuart, info);
247 }
248
249 static struct resource pxa_resource_stuart[] = {
250         {
251                 .start  = 0x40700000,
252                 .end    = 0x40700023,
253                 .flags  = IORESOURCE_MEM,
254         }, {
255                 .start  = IRQ_STUART,
256                 .end    = IRQ_STUART,
257                 .flags  = IORESOURCE_IRQ,
258         }
259 };
260
261 struct platform_device pxa_device_stuart = {
262         .name           = "pxa2xx-uart",
263         .id             = 2,
264         .resource       = pxa_resource_stuart,
265         .num_resources  = ARRAY_SIZE(pxa_resource_stuart),
266 };
267
268 void __init pxa_set_stuart_info(void *info)
269 {
270         pxa_register_device(&pxa_device_stuart, info);
271 }
272
273 static struct resource pxa_resource_hwuart[] = {
274         {
275                 .start  = 0x41600000,
276                 .end    = 0x4160002F,
277                 .flags  = IORESOURCE_MEM,
278         }, {
279                 .start  = IRQ_HWUART,
280                 .end    = IRQ_HWUART,
281                 .flags  = IORESOURCE_IRQ,
282         }
283 };
284
285 struct platform_device pxa_device_hwuart = {
286         .name           = "pxa2xx-uart",
287         .id             = 3,
288         .resource       = pxa_resource_hwuart,
289         .num_resources  = ARRAY_SIZE(pxa_resource_hwuart),
290 };
291
292 void __init pxa_set_hwuart_info(void *info)
293 {
294         if (cpu_is_pxa255())
295                 pxa_register_device(&pxa_device_hwuart, info);
296         else
297                 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
298 }
299
300 static struct resource pxai2c_resources[] = {
301         {
302                 .start  = 0x40301680,
303                 .end    = 0x403016a3,
304                 .flags  = IORESOURCE_MEM,
305         }, {
306                 .start  = IRQ_I2C,
307                 .end    = IRQ_I2C,
308                 .flags  = IORESOURCE_IRQ,
309         },
310 };
311
312 struct platform_device pxa_device_i2c = {
313         .name           = "pxa2xx-i2c",
314         .id             = 0,
315         .resource       = pxai2c_resources,
316         .num_resources  = ARRAY_SIZE(pxai2c_resources),
317 };
318
319 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
320 {
321         pxa_register_device(&pxa_device_i2c, info);
322 }
323
324 #ifdef CONFIG_PXA27x
325 static struct resource pxa27x_resources_i2c_power[] = {
326         {
327                 .start  = 0x40f00180,
328                 .end    = 0x40f001a3,
329                 .flags  = IORESOURCE_MEM,
330         }, {
331                 .start  = IRQ_PWRI2C,
332                 .end    = IRQ_PWRI2C,
333                 .flags  = IORESOURCE_IRQ,
334         },
335 };
336
337 struct platform_device pxa27x_device_i2c_power = {
338         .name           = "pxa2xx-i2c",
339         .id             = 1,
340         .resource       = pxa27x_resources_i2c_power,
341         .num_resources  = ARRAY_SIZE(pxa27x_resources_i2c_power),
342 };
343 #endif
344
345 #ifdef CONFIG_PXA3xx
346 static struct resource pxa3xx_resources_i2c_power[] = {
347         {
348                 .start  = 0x40f500c0,
349                 .end    = 0x40f500d3,
350                 .flags  = IORESOURCE_MEM,
351         }, {
352                 .start  = IRQ_PWRI2C,
353                 .end    = IRQ_PWRI2C,
354                 .flags  = IORESOURCE_IRQ,
355         },
356 };
357
358 struct platform_device pxa3xx_device_i2c_power = {
359         .name           = "pxa3xx-pwri2c",
360         .id             = 1,
361         .resource       = pxa3xx_resources_i2c_power,
362         .num_resources  = ARRAY_SIZE(pxa3xx_resources_i2c_power),
363 };
364 #endif
365
366 static struct resource pxai2s_resources[] = {
367         {
368                 .start  = 0x40400000,
369                 .end    = 0x40400083,
370                 .flags  = IORESOURCE_MEM,
371         }, {
372                 .start  = IRQ_I2S,
373                 .end    = IRQ_I2S,
374                 .flags  = IORESOURCE_IRQ,
375         },
376 };
377
378 struct platform_device pxa_device_i2s = {
379         .name           = "pxa2xx-i2s",
380         .id             = -1,
381         .resource       = pxai2s_resources,
382         .num_resources  = ARRAY_SIZE(pxai2s_resources),
383 };
384
385 static u64 pxaficp_dmamask = ~(u32)0;
386
387 struct platform_device pxa_device_ficp = {
388         .name           = "pxa2xx-ir",
389         .id             = -1,
390         .dev            = {
391                 .dma_mask = &pxaficp_dmamask,
392                 .coherent_dma_mask = 0xffffffff,
393         },
394 };
395
396 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
397 {
398         pxa_register_device(&pxa_device_ficp, info);
399 }
400
401 static struct resource pxa_rtc_resources[] = {
402         [0] = {
403                 .start  = 0x40900000,
404                 .end    = 0x40900000 + 0x3b,
405                 .flags  = IORESOURCE_MEM,
406         },
407         [1] = {
408                 .start  = IRQ_RTC1Hz,
409                 .end    = IRQ_RTC1Hz,
410                 .flags  = IORESOURCE_IRQ,
411         },
412         [2] = {
413                 .start  = IRQ_RTCAlrm,
414                 .end    = IRQ_RTCAlrm,
415                 .flags  = IORESOURCE_IRQ,
416         },
417 };
418
419 struct platform_device sa1100_device_rtc = {
420         .name           = "sa1100-rtc",
421         .id             = -1,
422 };
423
424 struct platform_device pxa_device_rtc = {
425         .name           = "pxa-rtc",
426         .id             = -1,
427         .num_resources  = ARRAY_SIZE(pxa_rtc_resources),
428         .resource       = pxa_rtc_resources,
429 };
430
431 static struct resource pxa_ac97_resources[] = {
432         [0] = {
433                 .start  = 0x40500000,
434                 .end    = 0x40500000 + 0xfff,
435                 .flags  = IORESOURCE_MEM,
436         },
437         [1] = {
438                 .start  = IRQ_AC97,
439                 .end    = IRQ_AC97,
440                 .flags  = IORESOURCE_IRQ,
441         },
442 };
443
444 static u64 pxa_ac97_dmamask = 0xffffffffUL;
445
446 struct platform_device pxa_device_ac97 = {
447         .name           = "pxa2xx-ac97",
448         .id             = -1,
449         .dev            = {
450                 .dma_mask = &pxa_ac97_dmamask,
451                 .coherent_dma_mask = 0xffffffff,
452         },
453         .num_resources  = ARRAY_SIZE(pxa_ac97_resources),
454         .resource       = pxa_ac97_resources,
455 };
456
457 void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
458 {
459         pxa_register_device(&pxa_device_ac97, ops);
460 }
461
462 #ifdef CONFIG_PXA25x
463
464 static struct resource pxa25x_resource_pwm0[] = {
465         [0] = {
466                 .start  = 0x40b00000,
467                 .end    = 0x40b0000f,
468                 .flags  = IORESOURCE_MEM,
469         },
470 };
471
472 struct platform_device pxa25x_device_pwm0 = {
473         .name           = "pxa25x-pwm",
474         .id             = 0,
475         .resource       = pxa25x_resource_pwm0,
476         .num_resources  = ARRAY_SIZE(pxa25x_resource_pwm0),
477 };
478
479 static struct resource pxa25x_resource_pwm1[] = {
480         [0] = {
481                 .start  = 0x40c00000,
482                 .end    = 0x40c0000f,
483                 .flags  = IORESOURCE_MEM,
484         },
485 };
486
487 struct platform_device pxa25x_device_pwm1 = {
488         .name           = "pxa25x-pwm",
489         .id             = 1,
490         .resource       = pxa25x_resource_pwm1,
491         .num_resources  = ARRAY_SIZE(pxa25x_resource_pwm1),
492 };
493
494 static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
495
496 static struct resource pxa25x_resource_ssp[] = {
497         [0] = {
498                 .start  = 0x41000000,
499                 .end    = 0x4100001f,
500                 .flags  = IORESOURCE_MEM,
501         },
502         [1] = {
503                 .start  = IRQ_SSP,
504                 .end    = IRQ_SSP,
505                 .flags  = IORESOURCE_IRQ,
506         },
507         [2] = {
508                 /* DRCMR for RX */
509                 .start  = 13,
510                 .end    = 13,
511                 .flags  = IORESOURCE_DMA,
512         },
513         [3] = {
514                 /* DRCMR for TX */
515                 .start  = 14,
516                 .end    = 14,
517                 .flags  = IORESOURCE_DMA,
518         },
519 };
520
521 struct platform_device pxa25x_device_ssp = {
522         .name           = "pxa25x-ssp",
523         .id             = 0,
524         .dev            = {
525                 .dma_mask = &pxa25x_ssp_dma_mask,
526                 .coherent_dma_mask = DMA_BIT_MASK(32),
527         },
528         .resource       = pxa25x_resource_ssp,
529         .num_resources  = ARRAY_SIZE(pxa25x_resource_ssp),
530 };
531
532 static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
533
534 static struct resource pxa25x_resource_nssp[] = {
535         [0] = {
536                 .start  = 0x41400000,
537                 .end    = 0x4140002f,
538                 .flags  = IORESOURCE_MEM,
539         },
540         [1] = {
541                 .start  = IRQ_NSSP,
542                 .end    = IRQ_NSSP,
543                 .flags  = IORESOURCE_IRQ,
544         },
545         [2] = {
546                 /* DRCMR for RX */
547                 .start  = 15,
548                 .end    = 15,
549                 .flags  = IORESOURCE_DMA,
550         },
551         [3] = {
552                 /* DRCMR for TX */
553                 .start  = 16,
554                 .end    = 16,
555                 .flags  = IORESOURCE_DMA,
556         },
557 };
558
559 struct platform_device pxa25x_device_nssp = {
560         .name           = "pxa25x-nssp",
561         .id             = 1,
562         .dev            = {
563                 .dma_mask = &pxa25x_nssp_dma_mask,
564                 .coherent_dma_mask = DMA_BIT_MASK(32),
565         },
566         .resource       = pxa25x_resource_nssp,
567         .num_resources  = ARRAY_SIZE(pxa25x_resource_nssp),
568 };
569
570 static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
571
572 static struct resource pxa25x_resource_assp[] = {
573         [0] = {
574                 .start  = 0x41500000,
575                 .end    = 0x4150002f,
576                 .flags  = IORESOURCE_MEM,
577         },
578         [1] = {
579                 .start  = IRQ_ASSP,
580                 .end    = IRQ_ASSP,
581                 .flags  = IORESOURCE_IRQ,
582         },
583         [2] = {
584                 /* DRCMR for RX */
585                 .start  = 23,
586                 .end    = 23,
587                 .flags  = IORESOURCE_DMA,
588         },
589         [3] = {
590                 /* DRCMR for TX */
591                 .start  = 24,
592                 .end    = 24,
593                 .flags  = IORESOURCE_DMA,
594         },
595 };
596
597 struct platform_device pxa25x_device_assp = {
598         /* ASSP is basically equivalent to NSSP */
599         .name           = "pxa25x-nssp",
600         .id             = 2,
601         .dev            = {
602                 .dma_mask = &pxa25x_assp_dma_mask,
603                 .coherent_dma_mask = DMA_BIT_MASK(32),
604         },
605         .resource       = pxa25x_resource_assp,
606         .num_resources  = ARRAY_SIZE(pxa25x_resource_assp),
607 };
608 #endif /* CONFIG_PXA25x */
609
610 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
611
612 static struct resource pxa27x_resource_keypad[] = {
613         [0] = {
614                 .start  = 0x41500000,
615                 .end    = 0x4150004c,
616                 .flags  = IORESOURCE_MEM,
617         },
618         [1] = {
619                 .start  = IRQ_KEYPAD,
620                 .end    = IRQ_KEYPAD,
621                 .flags  = IORESOURCE_IRQ,
622         },
623 };
624
625 struct platform_device pxa27x_device_keypad = {
626         .name           = "pxa27x-keypad",
627         .id             = -1,
628         .resource       = pxa27x_resource_keypad,
629         .num_resources  = ARRAY_SIZE(pxa27x_resource_keypad),
630 };
631
632 void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
633 {
634         pxa_register_device(&pxa27x_device_keypad, info);
635 }
636
637 static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
638
639 static struct resource pxa27x_resource_ohci[] = {
640         [0] = {
641                 .start  = 0x4C000000,
642                 .end    = 0x4C00ff6f,
643                 .flags  = IORESOURCE_MEM,
644         },
645         [1] = {
646                 .start  = IRQ_USBH1,
647                 .end    = IRQ_USBH1,
648                 .flags  = IORESOURCE_IRQ,
649         },
650 };
651
652 struct platform_device pxa27x_device_ohci = {
653         .name           = "pxa27x-ohci",
654         .id             = -1,
655         .dev            = {
656                 .dma_mask = &pxa27x_ohci_dma_mask,
657                 .coherent_dma_mask = DMA_BIT_MASK(32),
658         },
659         .num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
660         .resource       = pxa27x_resource_ohci,
661 };
662
663 void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
664 {
665         pxa_register_device(&pxa27x_device_ohci, info);
666 }
667
668 static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
669
670 static struct resource pxa27x_resource_ssp1[] = {
671         [0] = {
672                 .start  = 0x41000000,
673                 .end    = 0x4100003f,
674                 .flags  = IORESOURCE_MEM,
675         },
676         [1] = {
677                 .start  = IRQ_SSP,
678                 .end    = IRQ_SSP,
679                 .flags  = IORESOURCE_IRQ,
680         },
681         [2] = {
682                 /* DRCMR for RX */
683                 .start  = 13,
684                 .end    = 13,
685                 .flags  = IORESOURCE_DMA,
686         },
687         [3] = {
688                 /* DRCMR for TX */
689                 .start  = 14,
690                 .end    = 14,
691                 .flags  = IORESOURCE_DMA,
692         },
693 };
694
695 struct platform_device pxa27x_device_ssp1 = {
696         .name           = "pxa27x-ssp",
697         .id             = 0,
698         .dev            = {
699                 .dma_mask = &pxa27x_ssp1_dma_mask,
700                 .coherent_dma_mask = DMA_BIT_MASK(32),
701         },
702         .resource       = pxa27x_resource_ssp1,
703         .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp1),
704 };
705
706 static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
707
708 static struct resource pxa27x_resource_ssp2[] = {
709         [0] = {
710                 .start  = 0x41700000,
711                 .end    = 0x4170003f,
712                 .flags  = IORESOURCE_MEM,
713         },
714         [1] = {
715                 .start  = IRQ_SSP2,
716                 .end    = IRQ_SSP2,
717                 .flags  = IORESOURCE_IRQ,
718         },
719         [2] = {
720                 /* DRCMR for RX */
721                 .start  = 15,
722                 .end    = 15,
723                 .flags  = IORESOURCE_DMA,
724         },
725         [3] = {
726                 /* DRCMR for TX */
727                 .start  = 16,
728                 .end    = 16,
729                 .flags  = IORESOURCE_DMA,
730         },
731 };
732
733 struct platform_device pxa27x_device_ssp2 = {
734         .name           = "pxa27x-ssp",
735         .id             = 1,
736         .dev            = {
737                 .dma_mask = &pxa27x_ssp2_dma_mask,
738                 .coherent_dma_mask = DMA_BIT_MASK(32),
739         },
740         .resource       = pxa27x_resource_ssp2,
741         .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp2),
742 };
743
744 static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
745
746 static struct resource pxa27x_resource_ssp3[] = {
747         [0] = {
748                 .start  = 0x41900000,
749                 .end    = 0x4190003f,
750                 .flags  = IORESOURCE_MEM,
751         },
752         [1] = {
753                 .start  = IRQ_SSP3,
754                 .end    = IRQ_SSP3,
755                 .flags  = IORESOURCE_IRQ,
756         },
757         [2] = {
758                 /* DRCMR for RX */
759                 .start  = 66,
760                 .end    = 66,
761                 .flags  = IORESOURCE_DMA,
762         },
763         [3] = {
764                 /* DRCMR for TX */
765                 .start  = 67,
766                 .end    = 67,
767                 .flags  = IORESOURCE_DMA,
768         },
769 };
770
771 struct platform_device pxa27x_device_ssp3 = {
772         .name           = "pxa27x-ssp",
773         .id             = 2,
774         .dev            = {
775                 .dma_mask = &pxa27x_ssp3_dma_mask,
776                 .coherent_dma_mask = DMA_BIT_MASK(32),
777         },
778         .resource       = pxa27x_resource_ssp3,
779         .num_resources  = ARRAY_SIZE(pxa27x_resource_ssp3),
780 };
781
782 static struct resource pxa27x_resource_pwm0[] = {
783         [0] = {
784                 .start  = 0x40b00000,
785                 .end    = 0x40b0001f,
786                 .flags  = IORESOURCE_MEM,
787         },
788 };
789
790 struct platform_device pxa27x_device_pwm0 = {
791         .name           = "pxa27x-pwm",
792         .id             = 0,
793         .resource       = pxa27x_resource_pwm0,
794         .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm0),
795 };
796
797 static struct resource pxa27x_resource_pwm1[] = {
798         [0] = {
799                 .start  = 0x40c00000,
800                 .end    = 0x40c0001f,
801                 .flags  = IORESOURCE_MEM,
802         },
803 };
804
805 struct platform_device pxa27x_device_pwm1 = {
806         .name           = "pxa27x-pwm",
807         .id             = 1,
808         .resource       = pxa27x_resource_pwm1,
809         .num_resources  = ARRAY_SIZE(pxa27x_resource_pwm1),
810 };
811
812 static struct resource pxa27x_resource_camera[] = {
813         [0] = {
814                 .start  = 0x50000000,
815                 .end    = 0x50000fff,
816                 .flags  = IORESOURCE_MEM,
817         },
818         [1] = {
819                 .start  = IRQ_CAMERA,
820                 .end    = IRQ_CAMERA,
821                 .flags  = IORESOURCE_IRQ,
822         },
823 };
824
825 static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
826
827 static struct platform_device pxa27x_device_camera = {
828         .name           = "pxa27x-camera",
829         .id             = 0, /* This is used to put cameras on this interface */
830         .dev            = {
831                 .dma_mask               = &pxa27x_dma_mask_camera,
832                 .coherent_dma_mask      = 0xffffffff,
833         },
834         .num_resources  = ARRAY_SIZE(pxa27x_resource_camera),
835         .resource       = pxa27x_resource_camera,
836 };
837
838 void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
839 {
840         pxa_register_device(&pxa27x_device_camera, info);
841 }
842 #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
843
844 #ifdef CONFIG_PXA3xx
845 static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
846
847 static struct resource pxa3xx_resource_ssp4[] = {
848         [0] = {
849                 .start  = 0x41a00000,
850                 .end    = 0x41a0003f,
851                 .flags  = IORESOURCE_MEM,
852         },
853         [1] = {
854                 .start  = IRQ_SSP4,
855                 .end    = IRQ_SSP4,
856                 .flags  = IORESOURCE_IRQ,
857         },
858         [2] = {
859                 /* DRCMR for RX */
860                 .start  = 2,
861                 .end    = 2,
862                 .flags  = IORESOURCE_DMA,
863         },
864         [3] = {
865                 /* DRCMR for TX */
866                 .start  = 3,
867                 .end    = 3,
868                 .flags  = IORESOURCE_DMA,
869         },
870 };
871
872 struct platform_device pxa3xx_device_ssp4 = {
873         /* PXA3xx SSP is basically equivalent to PXA27x */
874         .name           = "pxa27x-ssp",
875         .id             = 3,
876         .dev            = {
877                 .dma_mask = &pxa3xx_ssp4_dma_mask,
878                 .coherent_dma_mask = DMA_BIT_MASK(32),
879         },
880         .resource       = pxa3xx_resource_ssp4,
881         .num_resources  = ARRAY_SIZE(pxa3xx_resource_ssp4),
882 };
883
884 static struct resource pxa3xx_resources_mci2[] = {
885         [0] = {
886                 .start  = 0x42000000,
887                 .end    = 0x42000fff,
888                 .flags  = IORESOURCE_MEM,
889         },
890         [1] = {
891                 .start  = IRQ_MMC2,
892                 .end    = IRQ_MMC2,
893                 .flags  = IORESOURCE_IRQ,
894         },
895         [2] = {
896                 .start  = 93,
897                 .end    = 93,
898                 .flags  = IORESOURCE_DMA,
899         },
900         [3] = {
901                 .start  = 94,
902                 .end    = 94,
903                 .flags  = IORESOURCE_DMA,
904         },
905 };
906
907 struct platform_device pxa3xx_device_mci2 = {
908         .name           = "pxa2xx-mci",
909         .id             = 1,
910         .dev            = {
911                 .dma_mask = &pxamci_dmamask,
912                 .coherent_dma_mask =    0xffffffff,
913         },
914         .num_resources  = ARRAY_SIZE(pxa3xx_resources_mci2),
915         .resource       = pxa3xx_resources_mci2,
916 };
917
918 void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
919 {
920         pxa_register_device(&pxa3xx_device_mci2, info);
921 }
922
923 static struct resource pxa3xx_resources_mci3[] = {
924         [0] = {
925                 .start  = 0x42500000,
926                 .end    = 0x42500fff,
927                 .flags  = IORESOURCE_MEM,
928         },
929         [1] = {
930                 .start  = IRQ_MMC3,
931                 .end    = IRQ_MMC3,
932                 .flags  = IORESOURCE_IRQ,
933         },
934         [2] = {
935                 .start  = 100,
936                 .end    = 100,
937                 .flags  = IORESOURCE_DMA,
938         },
939         [3] = {
940                 .start  = 101,
941                 .end    = 101,
942                 .flags  = IORESOURCE_DMA,
943         },
944 };
945
946 struct platform_device pxa3xx_device_mci3 = {
947         .name           = "pxa2xx-mci",
948         .id             = 2,
949         .dev            = {
950                 .dma_mask = &pxamci_dmamask,
951                 .coherent_dma_mask = 0xffffffff,
952         },
953         .num_resources  = ARRAY_SIZE(pxa3xx_resources_mci3),
954         .resource       = pxa3xx_resources_mci3,
955 };
956
957 void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
958 {
959         pxa_register_device(&pxa3xx_device_mci3, info);
960 }
961
962 static struct resource pxa3xx_resources_nand[] = {
963         [0] = {
964                 .start  = 0x43100000,
965                 .end    = 0x43100053,
966                 .flags  = IORESOURCE_MEM,
967         },
968         [1] = {
969                 .start  = IRQ_NAND,
970                 .end    = IRQ_NAND,
971                 .flags  = IORESOURCE_IRQ,
972         },
973         [2] = {
974                 /* DRCMR for Data DMA */
975                 .start  = 97,
976                 .end    = 97,
977                 .flags  = IORESOURCE_DMA,
978         },
979         [3] = {
980                 /* DRCMR for Command DMA */
981                 .start  = 99,
982                 .end    = 99,
983                 .flags  = IORESOURCE_DMA,
984         },
985 };
986
987 static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
988
989 struct platform_device pxa3xx_device_nand = {
990         .name           = "pxa3xx-nand",
991         .id             = -1,
992         .dev            = {
993                 .dma_mask = &pxa3xx_nand_dma_mask,
994                 .coherent_dma_mask = DMA_BIT_MASK(32),
995         },
996         .num_resources  = ARRAY_SIZE(pxa3xx_resources_nand),
997         .resource       = pxa3xx_resources_nand,
998 };
999
1000 void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1001 {
1002         pxa_register_device(&pxa3xx_device_nand, info);
1003 }
1004
1005 static struct resource pxa3xx_resources_gcu[] = {
1006         {
1007                 .start  = 0x54000000,
1008                 .end    = 0x54000fff,
1009                 .flags  = IORESOURCE_MEM,
1010         },
1011         {
1012                 .start  = IRQ_GCU,
1013                 .end    = IRQ_GCU,
1014                 .flags  = IORESOURCE_IRQ,
1015         },
1016 };
1017
1018 static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
1019
1020 struct platform_device pxa3xx_device_gcu = {
1021         .name           = "pxa3xx-gcu",
1022         .id             = -1,
1023         .num_resources  = ARRAY_SIZE(pxa3xx_resources_gcu),
1024         .resource       = pxa3xx_resources_gcu,
1025         .dev            = {
1026                 .dma_mask = &pxa3xx_gcu_dmamask,
1027                 .coherent_dma_mask = 0xffffffff,
1028         },
1029 };
1030
1031 #endif /* CONFIG_PXA3xx */
1032
1033 /* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1034  * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1035 void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1036 {
1037         struct platform_device *pd;
1038
1039         pd = platform_device_alloc("pxa2xx-spi", id);
1040         if (pd == NULL) {
1041                 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1042                        id);
1043                 return;
1044         }
1045
1046         pd->dev.platform_data = info;
1047         platform_device_add(pd);
1048 }