arch/arm/mach-pxa/cm-x270.c

   1 /*
   2  * linux/arch/arm/mach-pxa/cm-x270.c
   3  *
   4  * Copyright (C) 2007 CompuLab, Ltd.
   5  * Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/pm.h>
  14 #include <linux/fb.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/irq.h>
  17 #include <linux/sysdev.h>
  18 #include <linux/io.h>
  19 #include <linux/delay.h>
  20
  21 #include <linux/dm9000.h>
  22 #include <linux/rtc-v3020.h>
  23 #include <linux/serial_8250.h>
  24
  25 #include <video/mbxfb.h>
  26
  27 #include <asm/mach/arch.h>
  28 #include <asm/mach-types.h>
  29 #include <asm/mach/map.h>
  30
  31 #include <asm/arch/pxa-regs.h>
  32 #include <asm/arch/pxa2xx-regs.h>
  33 #include <asm/arch/pxa2xx-gpio.h>
  34 #include <asm/arch/audio.h>
  35 #include <asm/arch/pxafb.h>
  36 #include <asm/arch/ohci.h>
  37 #include <asm/arch/mmc.h>
  38 #include <asm/arch/bitfield.h>
  39 #include <asm/arch/cm-x270.h>
  40
  41 #include <asm/hardware/it8152.h>
  42
  43 #include "generic.h"
  44 #include "cm-x270-pci.h"
  45
  46 #define RTC_PHYS_BASE           (PXA_CS1_PHYS + (5 << 22))
  47 #define DM9000_PHYS_BASE        (PXA_CS1_PHYS + (6 << 22))
  48
  49 static struct resource cmx270_dm9k_resource[] = {
  50         [0] = {
  51                 .start = DM9000_PHYS_BASE,
  52                 .end   = DM9000_PHYS_BASE + 4,
  53                 .flags = IORESOURCE_MEM,
  54         },
  55         [1] = {
  56                 .start = DM9000_PHYS_BASE + 8,
  57                 .end   = DM9000_PHYS_BASE + 8 + 500,
  58                 .flags = IORESOURCE_MEM,
  59         },
  60         [2] = {
  61                 .start = CMX270_ETHIRQ,
  62                 .end   = CMX270_ETHIRQ,
  63                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  64         }
  65 };
  66
  67 /* for the moment we limit ourselves to 32bit IO until some
  68  * better IO routines can be written and tested
  69  */
  70 static struct dm9000_plat_data cmx270_dm9k_platdata = {
  71         .flags          = DM9000_PLATF_32BITONLY,
  72 };
  73
  74 /* Ethernet device */
  75 static struct platform_device cmx270_device_dm9k = {
  76         .name           = "dm9000",
  77         .id             = 0,
  78         .num_resources  = ARRAY_SIZE(cmx270_dm9k_resource),
  79         .resource       = cmx270_dm9k_resource,
  80         .dev            = {
  81                 .platform_data = &cmx270_dm9k_platdata,
  82         }
  83 };
  84
  85 /* touchscreen controller */
  86 static struct platform_device cmx270_ts_device = {
  87         .name           = "ucb1400_ts",
  88         .id             = -1,
  89 };
  90
  91 /* RTC */
  92 static struct resource cmx270_v3020_resource[] = {
  93         [0] = {
  94                 .start = RTC_PHYS_BASE,
  95                 .end   = RTC_PHYS_BASE + 4,
  96                 .flags = IORESOURCE_MEM,
  97         },
  98 };
  99
 100 struct v3020_platform_data cmx270_v3020_pdata = {
 101         .leftshift = 16,
 102 };
 103
 104 static struct platform_device cmx270_rtc_device = {
 105         .name           = "v3020",
 106         .num_resources  = ARRAY_SIZE(cmx270_v3020_resource),
 107         .resource       = cmx270_v3020_resource,
 108         .id             = -1,
 109         .dev            = {
 110                 .platform_data = &cmx270_v3020_pdata,
 111         }
 112 };
 113
 114 /*
 115  * CM-X270 LEDs
 116  */
 117 static struct platform_device cmx270_led_device = {
 118         .name           = "cm-x270-led",
 119         .id             = -1,
 120 };
 121
 122 /* 2700G graphics */
 123 static u64 fb_dma_mask = ~(u64)0;
 124
 125 static struct resource cmx270_2700G_resource[] = {
 126         /* frame buffer memory including ODFB and External SDRAM */
 127         [0] = {
 128                 .start = MARATHON_PHYS,
 129                 .end   = MARATHON_PHYS + 0x02000000,
 130                 .flags = IORESOURCE_MEM,
 131         },
 132         /* Marathon registers */
 133         [1] = {
 134                 .start = MARATHON_PHYS + 0x03fe0000,
 135                 .end   = MARATHON_PHYS + 0x03ffffff,
 136                 .flags = IORESOURCE_MEM,
 137         },
 138 };
 139
 140 static unsigned long save_lcd_regs[10];
 141
 142 static int cmx270_marathon_probe(struct fb_info *fb)
 143 {
 144         /* save PXA-270 pin settings before enabling 2700G */
 145         save_lcd_regs[0] = GPDR1;
 146         save_lcd_regs[1] = GPDR2;
 147         save_lcd_regs[2] = GAFR1_U;
 148         save_lcd_regs[3] = GAFR2_L;
 149         save_lcd_regs[4] = GAFR2_U;
 150
 151         /* Disable PXA-270 on-chip controller driving pins */
 152         GPDR1 &= ~(0xfc000000);
 153         GPDR2 &= ~(0x00c03fff);
 154         GAFR1_U &= ~(0xfff00000);
 155         GAFR2_L &= ~(0x0fffffff);
 156         GAFR2_U &= ~(0x0000f000);
 157         return 0;
 158 }
 159
 160 static int cmx270_marathon_remove(struct fb_info *fb)
 161 {
 162         GPDR1 =   save_lcd_regs[0];
 163         GPDR2 =   save_lcd_regs[1];
 164         GAFR1_U = save_lcd_regs[2];
 165         GAFR2_L = save_lcd_regs[3];
 166         GAFR2_U = save_lcd_regs[4];
 167         return 0;
 168 }
 169
 170 static struct mbxfb_platform_data cmx270_2700G_data = {
 171         .xres = {
 172                 .min = 240,
 173                 .max = 1200,
 174                 .defval = 640,
 175         },
 176         .yres = {
 177                 .min = 240,
 178                 .max = 1200,
 179                 .defval = 480,
 180         },
 181         .bpp = {
 182                 .min = 16,
 183                 .max = 32,
 184                 .defval = 16,
 185         },
 186         .memsize = 8*1024*1024,
 187         .probe = cmx270_marathon_probe,
 188         .remove = cmx270_marathon_remove,
 189 };
 190
 191 static struct platform_device cmx270_2700G = {
 192         .name           = "mbx-fb",
 193         .dev            = {
 194                 .platform_data  = &cmx270_2700G_data,
 195                 .dma_mask       = &fb_dma_mask,
 196                 .coherent_dma_mask = 0xffffffff,
 197         },
 198         .num_resources  = ARRAY_SIZE(cmx270_2700G_resource),
 199         .resource       = cmx270_2700G_resource,
 200         .id             = -1,
 201 };
 202
 203 static u64 ata_dma_mask = ~(u64)0;
 204
 205 static struct platform_device cmx270_ata = {
 206         .name = "pata_cm_x270",
 207         .id = -1,
 208         .dev            = {
 209                 .dma_mask       = &ata_dma_mask,
 210                 .coherent_dma_mask = 0xffffffff,
 211         },
 212 };
 213
 214 /* platform devices */
 215 static struct platform_device *platform_devices[] __initdata = {
 216         &cmx270_device_dm9k,
 217         &cmx270_rtc_device,
 218         &cmx270_2700G,
 219         &cmx270_led_device,
 220         &cmx270_ts_device,
 221         &cmx270_ata,
 222 };
 223
 224 /* Map PCI companion and IDE/General Purpose CS statically */
 225 static struct map_desc cmx270_io_desc[] __initdata = {
 226         [0] = { /* IDE/general purpose space */
 227                 .virtual        = CMX270_IDE104_VIRT,
 228                 .pfn            = __phys_to_pfn(CMX270_IDE104_PHYS),
 229                 .length         = SZ_64M - SZ_8M,
 230                 .type           = MT_DEVICE
 231         },
 232         [1] = { /* PCI bridge */
 233                 .virtual        = CMX270_IT8152_VIRT,
 234                 .pfn            = __phys_to_pfn(CMX270_IT8152_PHYS),
 235                 .length         = SZ_64M,
 236                 .type           = MT_DEVICE
 237         },
 238 };
 239
 240 /*
 241   Display definitions
 242   keep these for backwards compatibility, although symbolic names (as
 243   e.g. in lpd270.c) looks better
 244 */
 245 #define MTYPE_STN320x240        0
 246 #define MTYPE_TFT640x480        1
 247 #define MTYPE_CRT640x480        2
 248 #define MTYPE_CRT800x600        3
 249 #define MTYPE_TFT320x240        6
 250 #define MTYPE_STN640x480        7
 251
 252 static struct pxafb_mode_info generic_stn_320x240_mode = {
 253         .pixclock       = 76923,
 254         .bpp            = 8,
 255         .xres           = 320,
 256         .yres           = 240,
 257         .hsync_len      = 3,
 258         .vsync_len      = 2,
 259         .left_margin    = 3,
 260         .upper_margin   = 0,
 261         .right_margin   = 3,
 262         .lower_margin   = 0,
 263         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 264                            FB_SYNC_VERT_HIGH_ACT),
 265         .cmap_greyscale = 0,
 266 };
 267
 268 static struct pxafb_mach_info generic_stn_320x240 = {
 269         .modes          = &generic_stn_320x240_mode,
 270         .num_modes      = 1,
 271         .lccr0          = 0,
 272         .lccr3          = (LCCR3_PixClkDiv(0x03) |
 273                            LCCR3_Acb(0xff) |
 274                            LCCR3_PCP),
 275         .cmap_inverse   = 0,
 276         .cmap_static    = 0,
 277 };
 278
 279 static struct pxafb_mode_info generic_tft_640x480_mode = {
 280         .pixclock       = 38461,
 281         .bpp            = 8,
 282         .xres           = 640,
 283         .yres           = 480,
 284         .hsync_len      = 60,
 285         .vsync_len      = 2,
 286         .left_margin    = 70,
 287         .upper_margin   = 10,
 288         .right_margin   = 70,
 289         .lower_margin   = 5,
 290         .sync           = 0,
 291         .cmap_greyscale = 0,
 292 };
 293
 294 static struct pxafb_mach_info generic_tft_640x480 = {
 295         .modes          = &generic_tft_640x480_mode,
 296         .num_modes      = 1,
 297         .lccr0          = (LCCR0_PAS),
 298         .lccr3          = (LCCR3_PixClkDiv(0x01) |
 299                            LCCR3_Acb(0xff) |
 300                            LCCR3_PCP),
 301         .cmap_inverse   = 0,
 302         .cmap_static    = 0,
 303 };
 304
 305 static struct pxafb_mode_info generic_crt_640x480_mode = {
 306         .pixclock       = 38461,
 307         .bpp            = 8,
 308         .xres           = 640,
 309         .yres           = 480,
 310         .hsync_len      = 63,
 311         .vsync_len      = 2,
 312         .left_margin    = 81,
 313         .upper_margin   = 33,
 314         .right_margin   = 16,
 315         .lower_margin   = 10,
 316         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 317                            FB_SYNC_VERT_HIGH_ACT),
 318         .cmap_greyscale = 0,
 319 };
 320
 321 static struct pxafb_mach_info generic_crt_640x480 = {
 322         .modes          = &generic_crt_640x480_mode,
 323         .num_modes      = 1,
 324         .lccr0          = (LCCR0_PAS),
 325         .lccr3          = (LCCR3_PixClkDiv(0x01) |
 326                            LCCR3_Acb(0xff)),
 327         .cmap_inverse   = 0,
 328         .cmap_static    = 0,
 329 };
 330
 331 static struct pxafb_mode_info generic_crt_800x600_mode = {
 332         .pixclock       = 28846,
 333         .bpp            = 8,
 334         .xres           = 800,
 335         .yres           = 600,
 336         .hsync_len      = 63,
 337         .vsync_len      = 2,
 338         .left_margin    = 26,
 339         .upper_margin   = 21,
 340         .right_margin   = 26,
 341         .lower_margin   = 11,
 342         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 343                            FB_SYNC_VERT_HIGH_ACT),
 344         .cmap_greyscale = 0,
 345 };
 346
 347 static struct pxafb_mach_info generic_crt_800x600 = {
 348         .modes          = &generic_crt_800x600_mode,
 349         .num_modes      = 1,
 350         .lccr0          = (LCCR0_PAS),
 351         .lccr3          = (LCCR3_PixClkDiv(0x02) |
 352                            LCCR3_Acb(0xff)),
 353         .cmap_inverse   = 0,
 354         .cmap_static    = 0,
 355 };
 356
 357 static struct pxafb_mode_info generic_tft_320x240_mode = {
 358         .pixclock       = 134615,
 359         .bpp            = 16,
 360         .xres           = 320,
 361         .yres           = 240,
 362         .hsync_len      = 63,
 363         .vsync_len      = 7,
 364         .left_margin    = 75,
 365         .upper_margin   = 0,
 366         .right_margin   = 15,
 367         .lower_margin   = 15,
 368         .sync           = 0,
 369         .cmap_greyscale = 0,
 370 };
 371
 372 static struct pxafb_mach_info generic_tft_320x240 = {
 373         .modes          = &generic_tft_320x240_mode,
 374         .num_modes      = 1,
 375         .lccr0          = (LCCR0_PAS),
 376         .lccr3          = (LCCR3_PixClkDiv(0x06) |
 377                            LCCR3_Acb(0xff) |
 378                            LCCR3_PCP),
 379         .cmap_inverse   = 0,
 380         .cmap_static    = 0,
 381 };
 382
 383 static struct pxafb_mode_info generic_stn_640x480_mode = {
 384         .pixclock       = 57692,
 385         .bpp            = 8,
 386         .xres           = 640,
 387         .yres           = 480,
 388         .hsync_len      = 4,
 389         .vsync_len      = 2,
 390         .left_margin    = 10,
 391         .upper_margin   = 5,
 392         .right_margin   = 10,
 393         .lower_margin   = 5,
 394         .sync           = (FB_SYNC_HOR_HIGH_ACT |
 395                            FB_SYNC_VERT_HIGH_ACT),
 396         .cmap_greyscale = 0,
 397 };
 398
 399 static struct pxafb_mach_info generic_stn_640x480 = {
 400         .modes          = &generic_stn_640x480_mode,
 401         .num_modes      = 1,
 402         .lccr0          = 0,
 403         .lccr3          = (LCCR3_PixClkDiv(0x02) |
 404                            LCCR3_Acb(0xff)),
 405         .cmap_inverse   = 0,
 406         .cmap_static    = 0,
 407 };
 408
 409 static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
 410
 411 static int __init cmx270_set_display(char *str)
 412 {
 413         int disp_type = simple_strtol(str, NULL, 0);
 414         switch (disp_type) {
 415         case MTYPE_STN320x240:
 416                 cmx270_display = &generic_stn_320x240;
 417                 break;
 418         case MTYPE_TFT640x480:
 419                 cmx270_display = &generic_tft_640x480;
 420                 break;
 421         case MTYPE_CRT640x480:
 422                 cmx270_display = &generic_crt_640x480;
 423                 break;
 424         case MTYPE_CRT800x600:
 425                 cmx270_display = &generic_crt_800x600;
 426                 break;
 427         case MTYPE_TFT320x240:
 428                 cmx270_display = &generic_tft_320x240;
 429                 break;
 430         case MTYPE_STN640x480:
 431                 cmx270_display = &generic_stn_640x480;
 432                 break;
 433         default: /* fallback to CRT 640x480 */
 434                 cmx270_display = &generic_crt_640x480;
 435                 break;
 436         }
 437         return 1;
 438 }
 439
 440 /*
 441    This should be done really early to get proper configuration for
 442    frame buffer.
 443    Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
 444    has limitied line length for kernel command line, and also it will
 445    break compatibitlty with proprietary releases already in field.
 446 */
 447 __setup("monitor=", cmx270_set_display);
 448
 449 /* PXA27x OHCI controller setup */
 450 static int cmx270_ohci_init(struct device *dev)
 451 {
 452         /* Set the Power Control Polarity Low */
 453         UHCHR = (UHCHR | UHCHR_PCPL) &
 454                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
 455
 456         return 0;
 457 }
 458
 459 static struct pxaohci_platform_data cmx270_ohci_platform_data = {
 460         .port_mode      = PMM_PERPORT_MODE,
 461         .init           = cmx270_ohci_init,
 462 };
 463
 464
 465 static int cmx270_mci_init(struct device *dev,
 466                            irq_handler_t cmx270_detect_int,
 467                            void *data)
 468 {
 469         int err;
 470
 471         /*
 472          * setup GPIO for PXA27x MMC controller
 473          */
 474         pxa_gpio_mode(GPIO32_MMCCLK_MD);
 475         pxa_gpio_mode(GPIO112_MMCCMD_MD);
 476         pxa_gpio_mode(GPIO92_MMCDAT0_MD);
 477         pxa_gpio_mode(GPIO109_MMCDAT1_MD);
 478         pxa_gpio_mode(GPIO110_MMCDAT2_MD);
 479         pxa_gpio_mode(GPIO111_MMCDAT3_MD);
 480
 481         /* SB-X270 uses GPIO105 as SD power enable */
 482         pxa_gpio_mode(105 | GPIO_OUT);
 483
 484         /* card detect IRQ on GPIO 83 */
 485         pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
 486
 487         err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
 488                           IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 489                           "MMC card detect", data);
 490         if (err)
 491                 printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
 492                        " request MMC card detect IRQ\n");
 493
 494         return err;
 495 }
 496
 497 static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
 498 {
 499         struct pxamci_platform_data *p_d = dev->platform_data;
 500
 501         if ((1 << vdd) & p_d->ocr_mask) {
 502                 printk(KERN_DEBUG "%s: on\n", __func__);
 503                 GPCR(105) = GPIO_bit(105);
 504         } else {
 505                 GPSR(105) = GPIO_bit(105);
 506                 printk(KERN_DEBUG "%s: off\n", __func__);
 507         }
 508 }
 509
 510 static void cmx270_mci_exit(struct device *dev, void *data)
 511 {
 512         free_irq(CMX270_MMC_IRQ, data);
 513 }
 514
 515 static struct pxamci_platform_data cmx270_mci_platform_data = {
 516         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
 517         .init           = cmx270_mci_init,
 518         .setpower       = cmx270_mci_setpower,
 519         .exit           = cmx270_mci_exit,
 520 };
 521
 522 #ifdef CONFIG_PM
 523 static unsigned long sleep_save_msc[10];
 524
 525 static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
 526 {
 527         cmx270_pci_suspend();
 528
 529         /* save MSC registers */
 530         sleep_save_msc[0] = MSC0;
 531         sleep_save_msc[1] = MSC1;
 532         sleep_save_msc[2] = MSC2;
 533
 534         /* setup power saving mode registers */
 535         PCFR = 0x0;
 536         PSLR = 0xff400000;
 537         PMCR  = 0x00000005;
 538         PWER  = 0x80000000;
 539         PFER  = 0x00000000;
 540         PRER  = 0x00000000;
 541         PGSR0 = 0xC0018800;
 542         PGSR1 = 0x004F0002;
 543         PGSR2 = 0x6021C000;
 544         PGSR3 = 0x00020000;
 545
 546         return 0;
 547 }
 548
 549 static int cmx270_resume(struct sys_device *dev)
 550 {
 551         cmx270_pci_resume();
 552
 553         /* restore MSC registers */
 554         MSC0 = sleep_save_msc[0];
 555         MSC1 = sleep_save_msc[1];
 556         MSC2 = sleep_save_msc[2];
 557
 558         return 0;
 559 }
 560
 561 static struct sysdev_class cmx270_pm_sysclass = {
 562         .name = "pm",
 563         .resume = cmx270_resume,
 564         .suspend = cmx270_suspend,
 565 };
 566
 567 static struct sys_device cmx270_pm_device = {
 568         .cls = &cmx270_pm_sysclass,
 569 };
 570
 571 static int __init cmx270_pm_init(void)
 572 {
 573         int error;
 574         error = sysdev_class_register(&cmx270_pm_sysclass);
 575         if (error == 0)
 576                 error = sysdev_register(&cmx270_pm_device);
 577         return error;
 578 }
 579 #else
 580 static int __init cmx270_pm_init(void) { return 0; }
 581 #endif
 582
 583 static void __init cmx270_init(void)
 584 {
 585         cmx270_pm_init();
 586
 587         set_pxa_fb_info(cmx270_display);
 588
 589         /* register CM-X270 platform devices */
 590         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 591         pxa_set_ac97_info(NULL);
 592
 593         /* set MCI and OHCI platform parameters */
 594         pxa_set_mci_info(&cmx270_mci_platform_data);
 595         pxa_set_ohci_info(&cmx270_ohci_platform_data);
 596
 597         /* This enables the STUART */
 598         pxa_gpio_mode(GPIO46_STRXD_MD);
 599         pxa_gpio_mode(GPIO47_STTXD_MD);
 600
 601         /* This enables the BTUART  */
 602         pxa_gpio_mode(GPIO42_BTRXD_MD);
 603         pxa_gpio_mode(GPIO43_BTTXD_MD);
 604         pxa_gpio_mode(GPIO44_BTCTS_MD);
 605         pxa_gpio_mode(GPIO45_BTRTS_MD);
 606 }
 607
 608 static void __init cmx270_init_irq(void)
 609 {
 610         pxa27x_init_irq();
 611
 612
 613         cmx270_pci_init_irq();
 614
 615         /* Setup interrupt for dm9000 */
 616         pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
 617         set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
 618
 619         /* Setup interrupt for 2700G */
 620         pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
 621         set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
 622 }
 623
 624 static void __init cmx270_map_io(void)
 625 {
 626         pxa_map_io();
 627         iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
 628 }
 629
 630
 631 MACHINE_START(ARMCORE, "Compulab CM-x270")
 632         .boot_params    = 0xa0000100,
 633         .phys_io        = 0x40000000,
 634         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
 635         .map_io         = cmx270_map_io,
 636         .init_irq       = cmx270_init_irq,
 637         .timer          = &pxa_timer,
 638         .init_machine   = cmx270_init,
 639 MACHINE_END