bq20z75: Fix time and temp units
[pandora-kernel.git] / arch / arm / mach-omap2 / usb-ehci.c
1 /*
2  * linux/arch/arm/mach-omap2/usb-ehci.c
3  *
4  * This file will contain the board specific details for the
5  * Synopsys EHCI host controller on OMAP3430
6  *
7  * Copyright (C) 2007 Texas Instruments
8  * Author: Vikram Pandita <vikram.pandita@ti.com>
9  *
10  * Generalization by:
11  * Felipe Balbi <felipe.balbi@nokia.com>
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/types.h>
19 #include <linux/errno.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23 #include <linux/dma-mapping.h>
24
25 #include <asm/io.h>
26
27 #include <mach/hardware.h>
28 #include <mach/irqs.h>
29 #include <plat/usb.h>
30
31 #include "mux.h"
32
33 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
34
35 static struct resource ehci_resources[] = {
36         {
37                 .flags  = IORESOURCE_MEM,
38         },
39         {
40                 .flags  = IORESOURCE_MEM,
41         },
42         {
43                 .flags  = IORESOURCE_MEM,
44         },
45         {         /* general IRQ */
46                 .flags   = IORESOURCE_IRQ,
47         }
48 };
49
50 static u64 ehci_dmamask = ~(u32)0;
51 static struct platform_device ehci_device = {
52         .name           = "ehci-omap",
53         .id             = 0,
54         .dev = {
55                 .dma_mask               = &ehci_dmamask,
56                 .coherent_dma_mask      = 0xffffffff,
57                 .platform_data          = NULL,
58         },
59         .num_resources  = ARRAY_SIZE(ehci_resources),
60         .resource       = ehci_resources,
61 };
62
63 /* MUX settings for EHCI pins */
64 /*
65  * setup_ehci_io_mux - initialize IO pad mux for USBHOST
66  */
67 static void setup_ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
68 {
69         switch (port_mode[0]) {
70         case EHCI_HCD_OMAP_MODE_PHY:
71                 omap_mux_init_signal("hsusb1_stp", OMAP_PIN_OUTPUT);
72                 omap_mux_init_signal("hsusb1_clk", OMAP_PIN_OUTPUT);
73                 omap_mux_init_signal("hsusb1_dir", OMAP_PIN_INPUT_PULLDOWN);
74                 omap_mux_init_signal("hsusb1_nxt", OMAP_PIN_INPUT_PULLDOWN);
75                 omap_mux_init_signal("hsusb1_data0", OMAP_PIN_INPUT_PULLDOWN);
76                 omap_mux_init_signal("hsusb1_data1", OMAP_PIN_INPUT_PULLDOWN);
77                 omap_mux_init_signal("hsusb1_data2", OMAP_PIN_INPUT_PULLDOWN);
78                 omap_mux_init_signal("hsusb1_data3", OMAP_PIN_INPUT_PULLDOWN);
79                 omap_mux_init_signal("hsusb1_data4", OMAP_PIN_INPUT_PULLDOWN);
80                 omap_mux_init_signal("hsusb1_data5", OMAP_PIN_INPUT_PULLDOWN);
81                 omap_mux_init_signal("hsusb1_data6", OMAP_PIN_INPUT_PULLDOWN);
82                 omap_mux_init_signal("hsusb1_data7", OMAP_PIN_INPUT_PULLDOWN);
83                 break;
84         case EHCI_HCD_OMAP_MODE_TLL:
85                 omap_mux_init_signal("hsusb1_tll_stp",
86                         OMAP_PIN_INPUT_PULLUP);
87                 omap_mux_init_signal("hsusb1_tll_clk",
88                         OMAP_PIN_INPUT_PULLDOWN);
89                 omap_mux_init_signal("hsusb1_tll_dir",
90                         OMAP_PIN_INPUT_PULLDOWN);
91                 omap_mux_init_signal("hsusb1_tll_nxt",
92                         OMAP_PIN_INPUT_PULLDOWN);
93                 omap_mux_init_signal("hsusb1_tll_data0",
94                         OMAP_PIN_INPUT_PULLDOWN);
95                 omap_mux_init_signal("hsusb1_tll_data1",
96                         OMAP_PIN_INPUT_PULLDOWN);
97                 omap_mux_init_signal("hsusb1_tll_data2",
98                         OMAP_PIN_INPUT_PULLDOWN);
99                 omap_mux_init_signal("hsusb1_tll_data3",
100                         OMAP_PIN_INPUT_PULLDOWN);
101                 omap_mux_init_signal("hsusb1_tll_data4",
102                         OMAP_PIN_INPUT_PULLDOWN);
103                 omap_mux_init_signal("hsusb1_tll_data5",
104                         OMAP_PIN_INPUT_PULLDOWN);
105                 omap_mux_init_signal("hsusb1_tll_data6",
106                         OMAP_PIN_INPUT_PULLDOWN);
107                 omap_mux_init_signal("hsusb1_tll_data7",
108                         OMAP_PIN_INPUT_PULLDOWN);
109                 break;
110         case EHCI_HCD_OMAP_MODE_UNKNOWN:
111                 /* FALLTHROUGH */
112         default:
113                 break;
114         }
115
116         switch (port_mode[1]) {
117         case EHCI_HCD_OMAP_MODE_PHY:
118                 omap_mux_init_signal("hsusb2_stp", OMAP_PIN_OUTPUT);
119                 omap_mux_init_signal("hsusb2_clk", OMAP_PIN_OUTPUT);
120                 omap_mux_init_signal("hsusb2_dir", OMAP_PIN_INPUT_PULLDOWN);
121                 omap_mux_init_signal("hsusb2_nxt", OMAP_PIN_INPUT_PULLDOWN);
122                 omap_mux_init_signal("hsusb2_data0",
123                         OMAP_PIN_INPUT_PULLDOWN);
124                 omap_mux_init_signal("hsusb2_data1",
125                         OMAP_PIN_INPUT_PULLDOWN);
126                 omap_mux_init_signal("hsusb2_data2",
127                         OMAP_PIN_INPUT_PULLDOWN);
128                 omap_mux_init_signal("hsusb2_data3",
129                         OMAP_PIN_INPUT_PULLDOWN);
130                 omap_mux_init_signal("hsusb2_data4",
131                         OMAP_PIN_INPUT_PULLDOWN);
132                 omap_mux_init_signal("hsusb2_data5",
133                         OMAP_PIN_INPUT_PULLDOWN);
134                 omap_mux_init_signal("hsusb2_data6",
135                         OMAP_PIN_INPUT_PULLDOWN);
136                 omap_mux_init_signal("hsusb2_data7",
137                         OMAP_PIN_INPUT_PULLDOWN);
138                 break;
139         case EHCI_HCD_OMAP_MODE_TLL:
140                 omap_mux_init_signal("hsusb2_tll_stp",
141                         OMAP_PIN_INPUT_PULLUP);
142                 omap_mux_init_signal("hsusb2_tll_clk",
143                         OMAP_PIN_INPUT_PULLDOWN);
144                 omap_mux_init_signal("hsusb2_tll_dir",
145                         OMAP_PIN_INPUT_PULLDOWN);
146                 omap_mux_init_signal("hsusb2_tll_nxt",
147                         OMAP_PIN_INPUT_PULLDOWN);
148                 omap_mux_init_signal("hsusb2_tll_data0",
149                         OMAP_PIN_INPUT_PULLDOWN);
150                 omap_mux_init_signal("hsusb2_tll_data1",
151                         OMAP_PIN_INPUT_PULLDOWN);
152                 omap_mux_init_signal("hsusb2_tll_data2",
153                         OMAP_PIN_INPUT_PULLDOWN);
154                 omap_mux_init_signal("hsusb2_tll_data3",
155                         OMAP_PIN_INPUT_PULLDOWN);
156                 omap_mux_init_signal("hsusb2_tll_data4",
157                         OMAP_PIN_INPUT_PULLDOWN);
158                 omap_mux_init_signal("hsusb2_tll_data5",
159                         OMAP_PIN_INPUT_PULLDOWN);
160                 omap_mux_init_signal("hsusb2_tll_data6",
161                         OMAP_PIN_INPUT_PULLDOWN);
162                 omap_mux_init_signal("hsusb2_tll_data7",
163                         OMAP_PIN_INPUT_PULLDOWN);
164                 break;
165         case EHCI_HCD_OMAP_MODE_UNKNOWN:
166                 /* FALLTHROUGH */
167         default:
168                 break;
169         }
170
171         switch (port_mode[2]) {
172         case EHCI_HCD_OMAP_MODE_PHY:
173                 printk(KERN_WARNING "Port3 can't be used in PHY mode\n");
174                 break;
175         case EHCI_HCD_OMAP_MODE_TLL:
176                 omap_mux_init_signal("hsusb3_tll_stp",
177                         OMAP_PIN_INPUT_PULLUP);
178                 omap_mux_init_signal("hsusb3_tll_clk",
179                         OMAP_PIN_INPUT_PULLDOWN);
180                 omap_mux_init_signal("hsusb3_tll_dir",
181                         OMAP_PIN_INPUT_PULLDOWN);
182                 omap_mux_init_signal("hsusb3_tll_nxt",
183                         OMAP_PIN_INPUT_PULLDOWN);
184                 omap_mux_init_signal("hsusb3_tll_data0",
185                         OMAP_PIN_INPUT_PULLDOWN);
186                 omap_mux_init_signal("hsusb3_tll_data1",
187                         OMAP_PIN_INPUT_PULLDOWN);
188                 omap_mux_init_signal("hsusb3_tll_data2",
189                         OMAP_PIN_INPUT_PULLDOWN);
190                 omap_mux_init_signal("hsusb3_tll_data3",
191                         OMAP_PIN_INPUT_PULLDOWN);
192                 omap_mux_init_signal("hsusb3_tll_data4",
193                         OMAP_PIN_INPUT_PULLDOWN);
194                 omap_mux_init_signal("hsusb3_tll_data5",
195                         OMAP_PIN_INPUT_PULLDOWN);
196                 omap_mux_init_signal("hsusb3_tll_data6",
197                         OMAP_PIN_INPUT_PULLDOWN);
198                 omap_mux_init_signal("hsusb3_tll_data7",
199                         OMAP_PIN_INPUT_PULLDOWN);
200                 break;
201         case EHCI_HCD_OMAP_MODE_UNKNOWN:
202                 /* FALLTHROUGH */
203         default:
204                 break;
205         }
206
207         return;
208 }
209
210 static void setup_4430ehci_io_mux(const enum ehci_hcd_omap_mode *port_mode)
211 {
212         switch (port_mode[0]) {
213         case EHCI_HCD_OMAP_MODE_PHY:
214                 omap_mux_init_signal("usbb1_ulpiphy_stp",
215                         OMAP_PIN_OUTPUT);
216                 omap_mux_init_signal("usbb1_ulpiphy_clk",
217                         OMAP_PIN_INPUT_PULLDOWN);
218                 omap_mux_init_signal("usbb1_ulpiphy_dir",
219                         OMAP_PIN_INPUT_PULLDOWN);
220                 omap_mux_init_signal("usbb1_ulpiphy_nxt",
221                         OMAP_PIN_INPUT_PULLDOWN);
222                 omap_mux_init_signal("usbb1_ulpiphy_dat0",
223                         OMAP_PIN_INPUT_PULLDOWN);
224                 omap_mux_init_signal("usbb1_ulpiphy_dat1",
225                         OMAP_PIN_INPUT_PULLDOWN);
226                 omap_mux_init_signal("usbb1_ulpiphy_dat2",
227                         OMAP_PIN_INPUT_PULLDOWN);
228                 omap_mux_init_signal("usbb1_ulpiphy_dat3",
229                         OMAP_PIN_INPUT_PULLDOWN);
230                 omap_mux_init_signal("usbb1_ulpiphy_dat4",
231                         OMAP_PIN_INPUT_PULLDOWN);
232                 omap_mux_init_signal("usbb1_ulpiphy_dat5",
233                         OMAP_PIN_INPUT_PULLDOWN);
234                 omap_mux_init_signal("usbb1_ulpiphy_dat6",
235                         OMAP_PIN_INPUT_PULLDOWN);
236                 omap_mux_init_signal("usbb1_ulpiphy_dat7",
237                         OMAP_PIN_INPUT_PULLDOWN);
238                         break;
239         case EHCI_HCD_OMAP_MODE_TLL:
240                 omap_mux_init_signal("usbb1_ulpitll_stp",
241                         OMAP_PIN_INPUT_PULLUP);
242                 omap_mux_init_signal("usbb1_ulpitll_clk",
243                         OMAP_PIN_INPUT_PULLDOWN);
244                 omap_mux_init_signal("usbb1_ulpitll_dir",
245                         OMAP_PIN_INPUT_PULLDOWN);
246                 omap_mux_init_signal("usbb1_ulpitll_nxt",
247                         OMAP_PIN_INPUT_PULLDOWN);
248                 omap_mux_init_signal("usbb1_ulpitll_dat0",
249                         OMAP_PIN_INPUT_PULLDOWN);
250                 omap_mux_init_signal("usbb1_ulpitll_dat1",
251                         OMAP_PIN_INPUT_PULLDOWN);
252                 omap_mux_init_signal("usbb1_ulpitll_dat2",
253                         OMAP_PIN_INPUT_PULLDOWN);
254                 omap_mux_init_signal("usbb1_ulpitll_dat3",
255                         OMAP_PIN_INPUT_PULLDOWN);
256                 omap_mux_init_signal("usbb1_ulpitll_dat4",
257                         OMAP_PIN_INPUT_PULLDOWN);
258                 omap_mux_init_signal("usbb1_ulpitll_dat5",
259                         OMAP_PIN_INPUT_PULLDOWN);
260                 omap_mux_init_signal("usbb1_ulpitll_dat6",
261                         OMAP_PIN_INPUT_PULLDOWN);
262                 omap_mux_init_signal("usbb1_ulpitll_dat7",
263                         OMAP_PIN_INPUT_PULLDOWN);
264                         break;
265         case EHCI_HCD_OMAP_MODE_UNKNOWN:
266         default:
267                         break;
268         }
269         switch (port_mode[1]) {
270         case EHCI_HCD_OMAP_MODE_PHY:
271                 omap_mux_init_signal("usbb2_ulpiphy_stp",
272                         OMAP_PIN_OUTPUT);
273                 omap_mux_init_signal("usbb2_ulpiphy_clk",
274                         OMAP_PIN_INPUT_PULLDOWN);
275                 omap_mux_init_signal("usbb2_ulpiphy_dir",
276                         OMAP_PIN_INPUT_PULLDOWN);
277                 omap_mux_init_signal("usbb2_ulpiphy_nxt",
278                         OMAP_PIN_INPUT_PULLDOWN);
279                 omap_mux_init_signal("usbb2_ulpiphy_dat0",
280                         OMAP_PIN_INPUT_PULLDOWN);
281                 omap_mux_init_signal("usbb2_ulpiphy_dat1",
282                         OMAP_PIN_INPUT_PULLDOWN);
283                 omap_mux_init_signal("usbb2_ulpiphy_dat2",
284                         OMAP_PIN_INPUT_PULLDOWN);
285                 omap_mux_init_signal("usbb2_ulpiphy_dat3",
286                         OMAP_PIN_INPUT_PULLDOWN);
287                 omap_mux_init_signal("usbb2_ulpiphy_dat4",
288                         OMAP_PIN_INPUT_PULLDOWN);
289                 omap_mux_init_signal("usbb2_ulpiphy_dat5",
290                         OMAP_PIN_INPUT_PULLDOWN);
291                 omap_mux_init_signal("usbb2_ulpiphy_dat6",
292                         OMAP_PIN_INPUT_PULLDOWN);
293                 omap_mux_init_signal("usbb2_ulpiphy_dat7",
294                         OMAP_PIN_INPUT_PULLDOWN);
295                         break;
296         case EHCI_HCD_OMAP_MODE_TLL:
297                 omap_mux_init_signal("usbb2_ulpitll_stp",
298                         OMAP_PIN_INPUT_PULLUP);
299                 omap_mux_init_signal("usbb2_ulpitll_clk",
300                         OMAP_PIN_INPUT_PULLDOWN);
301                 omap_mux_init_signal("usbb2_ulpitll_dir",
302                         OMAP_PIN_INPUT_PULLDOWN);
303                 omap_mux_init_signal("usbb2_ulpitll_nxt",
304                         OMAP_PIN_INPUT_PULLDOWN);
305                 omap_mux_init_signal("usbb2_ulpitll_dat0",
306                         OMAP_PIN_INPUT_PULLDOWN);
307                 omap_mux_init_signal("usbb2_ulpitll_dat1",
308                         OMAP_PIN_INPUT_PULLDOWN);
309                 omap_mux_init_signal("usbb2_ulpitll_dat2",
310                         OMAP_PIN_INPUT_PULLDOWN);
311                 omap_mux_init_signal("usbb2_ulpitll_dat3",
312                         OMAP_PIN_INPUT_PULLDOWN);
313                 omap_mux_init_signal("usbb2_ulpitll_dat4",
314                         OMAP_PIN_INPUT_PULLDOWN);
315                 omap_mux_init_signal("usbb2_ulpitll_dat5",
316                         OMAP_PIN_INPUT_PULLDOWN);
317                 omap_mux_init_signal("usbb2_ulpitll_dat6",
318                         OMAP_PIN_INPUT_PULLDOWN);
319                 omap_mux_init_signal("usbb2_ulpitll_dat7",
320                         OMAP_PIN_INPUT_PULLDOWN);
321                         break;
322         case EHCI_HCD_OMAP_MODE_UNKNOWN:
323         default:
324                         break;
325         }
326 }
327
328 void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
329 {
330         platform_device_add_data(&ehci_device, pdata, sizeof(*pdata));
331
332         /* Setup Pin IO MUX for EHCI */
333         if (cpu_is_omap34xx()) {
334                 ehci_resources[0].start = OMAP34XX_EHCI_BASE;
335                 ehci_resources[0].end   = OMAP34XX_EHCI_BASE + SZ_1K - 1;
336                 ehci_resources[1].start = OMAP34XX_UHH_CONFIG_BASE;
337                 ehci_resources[1].end   = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
338                 ehci_resources[2].start = OMAP34XX_USBTLL_BASE;
339                 ehci_resources[2].end   = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
340                 ehci_resources[3].start = INT_34XX_EHCI_IRQ;
341                 setup_ehci_io_mux(pdata->port_mode);
342         } else if (cpu_is_omap44xx()) {
343                 ehci_resources[0].start = OMAP44XX_HSUSB_EHCI_BASE;
344                 ehci_resources[0].end   = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
345                 ehci_resources[1].start = OMAP44XX_UHH_CONFIG_BASE;
346                 ehci_resources[1].end   = OMAP44XX_UHH_CONFIG_BASE + SZ_2K - 1;
347                 ehci_resources[2].start = OMAP44XX_USBTLL_BASE;
348                 ehci_resources[2].end   = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
349                 ehci_resources[3].start = OMAP44XX_IRQ_EHCI;
350                 setup_4430ehci_io_mux(pdata->port_mode);
351         }
352
353         if (platform_device_register(&ehci_device) < 0) {
354                 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
355                 return;
356         }
357 }
358
359 #else
360
361 void __init usb_ehci_init(const struct ehci_hcd_omap_platform_data *pdata)
362
363 {
364 }
365
366 #endif /* CONFIG_USB_EHCI_HCD */
367
368 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
369
370 static struct resource ohci_resources[] = {
371         {
372                 .start  = OMAP34XX_OHCI_BASE,
373                 .end    = OMAP34XX_OHCI_BASE + SZ_1K - 1,
374                 .flags  = IORESOURCE_MEM,
375         },
376         {
377                 .start  = OMAP34XX_UHH_CONFIG_BASE,
378                 .end    = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1,
379                 .flags  = IORESOURCE_MEM,
380         },
381         {
382                 .start  = OMAP34XX_USBTLL_BASE,
383                 .end    = OMAP34XX_USBTLL_BASE + SZ_4K - 1,
384                 .flags  = IORESOURCE_MEM,
385         },
386         {       /* general IRQ */
387                 .start  = INT_34XX_OHCI_IRQ,
388                 .flags  = IORESOURCE_IRQ,
389         }
390 };
391
392 static u64 ohci_dmamask = DMA_BIT_MASK(32);
393
394 static struct platform_device ohci_device = {
395         .name           = "ohci-omap3",
396         .id             = 0,
397         .dev = {
398                 .dma_mask               = &ohci_dmamask,
399                 .coherent_dma_mask      = 0xffffffff,
400         },
401         .num_resources  = ARRAY_SIZE(ohci_resources),
402         .resource       = ohci_resources,
403 };
404
405 static void setup_ohci_io_mux(const enum ohci_omap3_port_mode *port_mode)
406 {
407         switch (port_mode[0]) {
408         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
409         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
410         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
411         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
412                 omap_mux_init_signal("mm1_rxdp",
413                         OMAP_PIN_INPUT_PULLDOWN);
414                 omap_mux_init_signal("mm1_rxdm",
415                         OMAP_PIN_INPUT_PULLDOWN);
416                 /* FALLTHROUGH */
417         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
418         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
419                 omap_mux_init_signal("mm1_rxrcv",
420                         OMAP_PIN_INPUT_PULLDOWN);
421                 /* FALLTHROUGH */
422         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
423         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
424                 omap_mux_init_signal("mm1_txen_n", OMAP_PIN_OUTPUT);
425                 /* FALLTHROUGH */
426         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
427         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
428                 omap_mux_init_signal("mm1_txse0",
429                         OMAP_PIN_INPUT_PULLDOWN);
430                 omap_mux_init_signal("mm1_txdat",
431                         OMAP_PIN_INPUT_PULLDOWN);
432                 break;
433         case OMAP_OHCI_PORT_MODE_UNUSED:
434                 /* FALLTHROUGH */
435         default:
436                 break;
437         }
438         switch (port_mode[1]) {
439         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
440         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
441         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
442         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
443                 omap_mux_init_signal("mm2_rxdp",
444                         OMAP_PIN_INPUT_PULLDOWN);
445                 omap_mux_init_signal("mm2_rxdm",
446                         OMAP_PIN_INPUT_PULLDOWN);
447                 /* FALLTHROUGH */
448         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
449         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
450                 omap_mux_init_signal("mm2_rxrcv",
451                         OMAP_PIN_INPUT_PULLDOWN);
452                 /* FALLTHROUGH */
453         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
454         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
455                 omap_mux_init_signal("mm2_txen_n", OMAP_PIN_OUTPUT);
456                 /* FALLTHROUGH */
457         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
458         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
459                 omap_mux_init_signal("mm2_txse0",
460                         OMAP_PIN_INPUT_PULLDOWN);
461                 omap_mux_init_signal("mm2_txdat",
462                         OMAP_PIN_INPUT_PULLDOWN);
463                 break;
464         case OMAP_OHCI_PORT_MODE_UNUSED:
465                 /* FALLTHROUGH */
466         default:
467                 break;
468         }
469         switch (port_mode[2]) {
470         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
471         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
472         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
473         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
474                 omap_mux_init_signal("mm3_rxdp",
475                         OMAP_PIN_INPUT_PULLDOWN);
476                 omap_mux_init_signal("mm3_rxdm",
477                         OMAP_PIN_INPUT_PULLDOWN);
478                 /* FALLTHROUGH */
479         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
480         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
481                 omap_mux_init_signal("mm3_rxrcv",
482                         OMAP_PIN_INPUT_PULLDOWN);
483                 /* FALLTHROUGH */
484         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
485         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
486                 omap_mux_init_signal("mm3_txen_n", OMAP_PIN_OUTPUT);
487                 /* FALLTHROUGH */
488         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
489         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
490                 omap_mux_init_signal("mm3_txse0",
491                         OMAP_PIN_INPUT_PULLDOWN);
492                 omap_mux_init_signal("mm3_txdat",
493                         OMAP_PIN_INPUT_PULLDOWN);
494                 break;
495         case OMAP_OHCI_PORT_MODE_UNUSED:
496                 /* FALLTHROUGH */
497         default:
498                 break;
499         }
500 }
501
502 void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
503 {
504         platform_device_add_data(&ohci_device, pdata, sizeof(*pdata));
505
506         /* Setup Pin IO MUX for OHCI */
507         if (cpu_is_omap34xx())
508                 setup_ohci_io_mux(pdata->port_mode);
509
510         if (platform_device_register(&ohci_device) < 0) {
511                 pr_err("Unable to register FS-USB (OHCI) device\n");
512                 return;
513         }
514 }
515
516 #else
517
518 void __init usb_ohci_init(const struct ohci_hcd_omap_platform_data *pdata)
519 {
520 }
521
522 #endif /* CONFIG_USB_OHCI_HCD */