arch/arm/mach-omap2/sdram-micron-mt29c4g96mazapcjg-5.h

   1 /*
   2  * SDRC register values for the Micron mt29c4g96mazapcjg-5
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_mt29c4g96mazapcjg5
  10 #define ARCH_ARM_MACH_OMAP2_SDRAM_MICRON_mt29c4g96mazapcjg5
  11
  12 #include <plat/sdrc.h>
  13
  14 static struct omap_sdrc_params mt29c4g96mazapcjg5_sdrc_params[] = {
  15         [0] = {
  16                 .rate        = 200000000,
  17                 .actim_ctrla = 0x7ae1b4c6,
  18                 .actim_ctrlb = 0x00021217,
  19                 .rfr_ctrl    = 0x0005e601,
  20                 .mr          = 0x00000032,
  21         },
  22         [1] = {
  23                 .rate        = 166000000,
  24                 .actim_ctrla = 0x629db4c6,
  25                 .actim_ctrlb = 0x00011113,
  26                 .rfr_ctrl    = 0x0004e201,
  27                 .mr          = 0x00000032,
  28         },
  29         /* ??? */
  30         [2] = {
  31                 .rate        = 83000000,
  32                 .actim_ctrla = 0x51512283,
  33                 .actim_ctrlb = 0x0001120c,
  34                 .rfr_ctrl    = 0x00025501,
  35                 .mr          = 0x00000032,
  36         },
  37         [4] = {
  38                 .rate        = 0
  39         },
  40 };
  41
  42 #endif