2 * OMAP44xx PRM instance offset macros
4 * Copyright (C) 2009-2010 Texas Instruments, Inc.
5 * Copyright (C) 2009-2010 Nokia Corporation
7 * Paul Walmsley (paul@pwsan.com)
8 * Rajendra Nayak (rnayak@ti.com)
9 * Benoit Cousson (b-cousson@ti.com)
11 * This file is automatically generated from the OMAP hardware databases.
12 * We respectfully ask that any modifications to this file be coordinated
13 * with the public linux-omap@vger.kernel.org mailing list and the
14 * authors above to ensure that the autogeneration scripts are kept
15 * up-to-date with the file contents.
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
21 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
25 #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H
26 #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H
28 #include "prcm-common.h"
31 #define OMAP4430_PRM_BASE 0x4a306000
33 #define OMAP44XX_PRM_REGADDR(inst, reg) \
34 OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg))
38 #define OMAP4430_PRM_OCP_SOCKET_INST 0x0000
39 #define OMAP4430_PRM_CKGEN_INST 0x0100
40 #define OMAP4430_PRM_MPU_INST 0x0300
41 #define OMAP4430_PRM_TESLA_INST 0x0400
42 #define OMAP4430_PRM_ABE_INST 0x0500
43 #define OMAP4430_PRM_ALWAYS_ON_INST 0x0600
44 #define OMAP4430_PRM_CORE_INST 0x0700
45 #define OMAP4430_PRM_IVAHD_INST 0x0f00
46 #define OMAP4430_PRM_CAM_INST 0x1000
47 #define OMAP4430_PRM_DSS_INST 0x1100
48 #define OMAP4430_PRM_GFX_INST 0x1200
49 #define OMAP4430_PRM_L3INIT_INST 0x1300
50 #define OMAP4430_PRM_L4PER_INST 0x1400
51 #define OMAP4430_PRM_CEFUSE_INST 0x1600
52 #define OMAP4430_PRM_WKUP_INST 0x1700
53 #define OMAP4430_PRM_WKUP_CM_INST 0x1800
54 #define OMAP4430_PRM_EMU_INST 0x1900
55 #define OMAP4430_PRM_EMU_CM_INST 0x1a00
56 #define OMAP4430_PRM_DEVICE_INST 0x1b00
57 #define OMAP4430_PRM_INSTR_INST 0x1f00
59 /* PRM clockdomain register offsets (from instance start) */
60 #define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000
61 #define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000
62 #define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000
63 #define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000
64 #define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000
65 #define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000
66 #define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000
67 #define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000
68 #define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000
69 #define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000
70 #define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000
71 #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000
72 #define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000
73 #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000
75 /* OMAP4 specific register offsets */
76 #define OMAP4_RM_RSTCTRL 0x0000
77 #define OMAP4_RM_RSTTIME 0x0004
78 #define OMAP4_RM_RSTST 0x0008
79 #define OMAP4_PM_PWSTCTRL 0x0000
80 #define OMAP4_PM_PWSTST 0x0004
85 /* PRM.OCP_SOCKET_PRM register offsets */
86 #define OMAP4_REVISION_PRM_OFFSET 0x0000
87 #define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000)
88 #define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010
89 #define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010)
90 #define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014
91 #define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014)
92 #define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018
93 #define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018)
94 #define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c
95 #define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c)
96 #define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020
97 #define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020)
98 #define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028
99 #define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028)
100 #define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030
101 #define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030)
102 #define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038
103 #define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038)
104 #define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040
105 #define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040)
107 /* PRM.CKGEN_PRM register offsets */
108 #define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000
109 #define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000)
110 #define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008
111 #define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008)
112 #define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c
113 #define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c)
114 #define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010
115 #define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010)
117 /* PRM.MPU_PRM register offsets */
118 #define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000
119 #define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000)
120 #define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004
121 #define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004)
122 #define OMAP4_RM_MPU_RSTST_OFFSET 0x0014
123 #define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014)
124 #define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024
125 #define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024)
127 /* PRM.TESLA_PRM register offsets */
128 #define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000
129 #define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000)
130 #define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004
131 #define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004)
132 #define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010
133 #define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010)
134 #define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014
135 #define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014)
136 #define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024
137 #define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024)
139 /* PRM.ABE_PRM register offsets */
140 #define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000
141 #define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000)
142 #define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004
143 #define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004)
144 #define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c
145 #define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c)
146 #define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030
147 #define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030)
148 #define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034
149 #define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034)
150 #define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038
151 #define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038)
152 #define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c
153 #define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c)
154 #define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040
155 #define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040)
156 #define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044
157 #define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044)
158 #define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048
159 #define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048)
160 #define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c
161 #define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c)
162 #define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050
163 #define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050)
164 #define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054
165 #define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054)
166 #define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058
167 #define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058)
168 #define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c
169 #define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c)
170 #define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060
171 #define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060)
172 #define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064
173 #define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064)
174 #define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068
175 #define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068)
176 #define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c
177 #define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c)
178 #define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070
179 #define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070)
180 #define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074
181 #define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074)
182 #define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078
183 #define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078)
184 #define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c
185 #define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c)
186 #define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080
187 #define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080)
188 #define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084
189 #define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084)
190 #define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088
191 #define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088)
192 #define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c
193 #define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c)
195 /* PRM.ALWAYS_ON_PRM register offsets */
196 #define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024
197 #define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024)
198 #define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028
199 #define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028)
200 #define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c
201 #define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c)
202 #define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030
203 #define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030)
204 #define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034
205 #define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034)
206 #define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038
207 #define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038)
208 #define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c
209 #define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c)
211 /* PRM.CORE_PRM register offsets */
212 #define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000
213 #define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000)
214 #define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004
215 #define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004)
216 #define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024
217 #define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024)
218 #define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124
219 #define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124)
220 #define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c
221 #define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c)
222 #define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134
223 #define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134)
224 #define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210
225 #define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210)
226 #define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214
227 #define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214)
228 #define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224
229 #define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224)
230 #define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324
231 #define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324)
232 #define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424
233 #define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424)
234 #define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c
235 #define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c)
236 #define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434
237 #define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434)
238 #define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c
239 #define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c)
240 #define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444
241 #define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444)
242 #define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454
243 #define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454)
244 #define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c
245 #define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c)
246 #define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464
247 #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464)
248 #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524
249 #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524)
250 #define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c
251 #define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c)
252 #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534
253 #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534)
254 #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624
255 #define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624)
256 #define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c
257 #define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c)
258 #define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634
259 #define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634)
260 #define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c
261 #define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c)
262 #define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724
263 #define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724)
264 #define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c
265 #define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c)
266 #define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744
267 #define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744)
269 /* PRM.IVAHD_PRM register offsets */
270 #define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000
271 #define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000)
272 #define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004
273 #define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004)
274 #define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010
275 #define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010)
276 #define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014
277 #define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014)
278 #define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024
279 #define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024)
280 #define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c
281 #define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c)
283 /* PRM.CAM_PRM register offsets */
284 #define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000
285 #define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000)
286 #define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004
287 #define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004)
288 #define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024
289 #define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024)
290 #define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c
291 #define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c)
293 /* PRM.DSS_PRM register offsets */
294 #define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000
295 #define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000)
296 #define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004
297 #define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004)
298 #define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020
299 #define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020)
300 #define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024
301 #define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024)
302 #define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c
303 #define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c)
305 /* PRM.GFX_PRM register offsets */
306 #define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000
307 #define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000)
308 #define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004
309 #define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004)
310 #define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024
311 #define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024)
313 /* PRM.L3INIT_PRM register offsets */
314 #define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000
315 #define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000)
316 #define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004
317 #define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004)
318 #define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028
319 #define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028)
320 #define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c
321 #define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c)
322 #define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030
323 #define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030)
324 #define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034
325 #define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034)
326 #define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038
327 #define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038)
328 #define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c
329 #define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c)
330 #define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040
331 #define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040)
332 #define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044
333 #define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044)
334 #define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058
335 #define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058)
336 #define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c
337 #define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c)
338 #define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060
339 #define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060)
340 #define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064
341 #define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064)
342 #define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068
343 #define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068)
344 #define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c
345 #define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c)
346 #define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c
347 #define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c)
348 #define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084
349 #define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084)
350 #define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088
351 #define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088)
352 #define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c
353 #define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c)
354 #define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094
355 #define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094)
356 #define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098
357 #define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098)
358 #define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c
359 #define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c)
360 #define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac
361 #define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac)
362 #define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0
363 #define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0)
364 #define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4
365 #define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4)
366 #define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8
367 #define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8)
368 #define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc
369 #define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc)
370 #define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0
371 #define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0)
372 #define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4
373 #define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4)
374 #define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4
375 #define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4)
377 /* PRM.L4PER_PRM register offsets */
378 #define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000
379 #define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000)
380 #define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004
381 #define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004)
382 #define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024
383 #define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024)
384 #define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028
385 #define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028)
386 #define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c
387 #define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c)
388 #define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030
389 #define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030)
390 #define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034
391 #define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034)
392 #define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038
393 #define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038)
394 #define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c
395 #define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c)
396 #define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040
397 #define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040)
398 #define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044
399 #define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044)
400 #define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048
401 #define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048)
402 #define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c
403 #define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c)
404 #define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050
405 #define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050)
406 #define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054
407 #define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054)
408 #define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c
409 #define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c)
410 #define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060
411 #define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060)
412 #define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064
413 #define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064)
414 #define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068
415 #define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068)
416 #define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c
417 #define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c)
418 #define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070
419 #define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070)
420 #define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074
421 #define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074)
422 #define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078
423 #define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078)
424 #define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c
425 #define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c)
426 #define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080
427 #define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080)
428 #define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084
429 #define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084)
430 #define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c
431 #define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c)
432 #define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090
433 #define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090)
434 #define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094
435 #define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094)
436 #define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098
437 #define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098)
438 #define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c
439 #define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c)
440 #define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0
441 #define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0)
442 #define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4
443 #define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4)
444 #define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8
445 #define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8)
446 #define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac
447 #define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac)
448 #define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0
449 #define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0)
450 #define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4
451 #define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4)
452 #define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8
453 #define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8)
454 #define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc
455 #define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc)
456 #define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0
457 #define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0)
458 #define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0
459 #define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0)
460 #define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4
461 #define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4)
462 #define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8
463 #define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8)
464 #define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc
465 #define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc)
466 #define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0
467 #define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0)
468 #define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4
469 #define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4)
470 #define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec
471 #define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec)
472 #define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0
473 #define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0)
474 #define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4
475 #define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4)
476 #define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8
477 #define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8)
478 #define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc
479 #define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc)
480 #define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100
481 #define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100)
482 #define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104
483 #define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104)
484 #define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108
485 #define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108)
486 #define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c
487 #define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c)
488 #define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120
489 #define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120)
490 #define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124
491 #define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124)
492 #define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128
493 #define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128)
494 #define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c
495 #define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c)
496 #define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134
497 #define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134)
498 #define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138
499 #define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138)
500 #define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c
501 #define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c)
502 #define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140
503 #define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140)
504 #define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144
505 #define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144)
506 #define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148
507 #define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148)
508 #define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c
509 #define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c)
510 #define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150
511 #define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150)
512 #define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154
513 #define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154)
514 #define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158
515 #define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158)
516 #define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c
517 #define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c)
518 #define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160
519 #define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160)
520 #define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164
521 #define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164)
522 #define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168
523 #define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168)
524 #define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c
525 #define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c)
526 #define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4
527 #define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4)
528 #define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac
529 #define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac)
530 #define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4
531 #define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4)
532 #define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc
533 #define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc)
534 #define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4
535 #define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4)
536 #define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc
537 #define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc)
538 #define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc
539 #define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc)
541 /* PRM.CEFUSE_PRM register offsets */
542 #define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000
543 #define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000)
544 #define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004
545 #define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004)
546 #define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024
547 #define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024)
549 /* PRM.WKUP_PRM register offsets */
550 #define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024
551 #define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024)
552 #define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c
553 #define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c)
554 #define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030
555 #define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030)
556 #define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034
557 #define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034)
558 #define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038
559 #define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038)
560 #define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c
561 #define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c)
562 #define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040
563 #define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040)
564 #define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044
565 #define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044)
566 #define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048
567 #define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048)
568 #define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c
569 #define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c)
570 #define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054
571 #define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054)
572 #define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058
573 #define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058)
574 #define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c
575 #define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c)
576 #define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064
577 #define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064)
578 #define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078
579 #define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078)
580 #define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c
581 #define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c)
582 #define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080
583 #define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080)
584 #define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084
585 #define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084)
587 /* PRM.WKUP_CM register offsets */
588 #define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000
589 #define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000)
590 #define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020
591 #define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020)
592 #define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028
593 #define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028)
594 #define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030
595 #define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030)
596 #define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038
597 #define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038)
598 #define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040
599 #define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040)
600 #define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048
601 #define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048)
602 #define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050
603 #define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050)
604 #define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058
605 #define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058)
606 #define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060
607 #define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060)
608 #define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078
609 #define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078)
610 #define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080
611 #define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080)
612 #define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088
613 #define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088)
615 /* PRM.EMU_PRM register offsets */
616 #define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000
617 #define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000)
618 #define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004
619 #define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004)
620 #define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024
621 #define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024)
623 /* PRM.EMU_CM register offsets */
624 #define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000
625 #define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000)
626 #define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008
627 #define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008)
628 #define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020
629 #define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020)
631 /* PRM.DEVICE_PRM register offsets */
632 #define OMAP4_PRM_RSTCTRL_OFFSET 0x0000
633 #define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000)
634 #define OMAP4_PRM_RSTST_OFFSET 0x0004
635 #define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004)
636 #define OMAP4_PRM_RSTTIME_OFFSET 0x0008
637 #define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008)
638 #define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c
639 #define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c)
640 #define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010
641 #define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010)
642 #define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014
643 #define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014)
644 #define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018
645 #define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018)
646 #define OMAP4_PRM_IO_COUNT_OFFSET 0x001c
647 #define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c)
648 #define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020
649 #define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020)
650 #define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024
651 #define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024)
652 #define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028
653 #define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028)
654 #define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c
655 #define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c)
656 #define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030
657 #define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030)
658 #define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034
659 #define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034)
660 #define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038
661 #define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038)
662 #define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c
663 #define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c)
664 #define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040
665 #define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040)
666 #define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044
667 #define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044)
668 #define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048
669 #define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048)
670 #define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c
671 #define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c)
672 #define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050
673 #define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050)
674 #define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054
675 #define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054)
676 #define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058
677 #define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058)
678 #define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c
679 #define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c)
680 #define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060
681 #define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060)
682 #define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064
683 #define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064)
684 #define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068
685 #define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068)
686 #define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c
687 #define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c)
688 #define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070
689 #define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070)
690 #define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074
691 #define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074)
692 #define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078
693 #define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078)
694 #define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c
695 #define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c)
696 #define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080
697 #define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080)
698 #define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084
699 #define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084)
700 #define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088
701 #define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088)
702 #define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c
703 #define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c)
704 #define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090
705 #define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090)
706 #define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094
707 #define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094)
708 #define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098
709 #define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098)
710 #define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c
711 #define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c)
712 #define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0
713 #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
714 #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4
715 #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
716 #define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8
717 #define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
718 #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac
719 #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
720 #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0
721 #define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0)
722 #define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4
723 #define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4)
724 #define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8
725 #define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8)
726 #define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc
727 #define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc)
728 #define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0
729 #define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0)
730 #define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4
731 #define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4)
732 #define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8
733 #define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8)
734 #define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc
735 #define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc)
736 #define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0
737 #define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0)
738 #define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4
739 #define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4)
740 #define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8
741 #define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8)
742 #define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc
743 #define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc)
744 #define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0
745 #define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0)
746 #define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4
747 #define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4)
748 #define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8
749 #define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8)
750 #define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec
751 #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec)
752 #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0
753 #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0)
754 #define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4
755 #define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4)
756 #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8
757 #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8)
759 /* Function prototypes */
760 # ifndef __ASSEMBLER__
762 extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
763 extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
764 extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
765 extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg);
766 extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx);
767 extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx);
768 extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask);
770 extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift);
771 extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift);
772 extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
774 extern void omap4_prm_global_warm_sw_reset(void);
git.openpandora.org / pandora-kernel.git / blob