arch/arm/mach-omap2/prm-regbits-44xx.h

   1 /*
   2  * OMAP44xx Power Management register bits
   3  *
   4  * Copyright (C) 2009 Texas Instruments, Inc.
   5  * Copyright (C) 2009 Nokia Corporation
   6  *
   7  * Paul Walmsley (paul@pwsan.com)
   8  * Rajendra Nayak (rnayak@ti.com)
   9  * Benoit Cousson (b-cousson@ti.com)
  10  *
  11  * This file is automatically generated from the OMAP hardware databases.
  12  * We respectfully ask that any modifications to this file be coordinated
  13  * with the public linux-omap@vger.kernel.org mailing list and the
  14  * authors above to ensure that the autogeneration scripts are kept
  15  * up-to-date with the file contents.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H
  23 #define __ARCH_ARM_MACH_OMAP2_PRM_REGBITS_44XX_H
  24
  25 #include "prm.h"
  26
  27
  28 /*
  29  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
  30  * PRM_LDO_SRAM_MPU_SETUP
  31  */
  32 #define OMAP4430_ABBOFF_ACT_EXPORT_SHIFT                                1
  33 #define OMAP4430_ABBOFF_ACT_EXPORT_MASK                                 BITFIELD(1, 1)
  34
  35 /*
  36  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
  37  * PRM_LDO_SRAM_MPU_SETUP
  38  */
  39 #define OMAP4430_ABBOFF_SLEEP_EXPORT_SHIFT                              2
  40 #define OMAP4430_ABBOFF_SLEEP_EXPORT_MASK                               BITFIELD(2, 2)
  41
  42 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
  43 #define OMAP4430_ABB_IVA_DONE_EN_SHIFT                                  31
  44 #define OMAP4430_ABB_IVA_DONE_EN_MASK                                   BITFIELD(31, 31)
  45
  46 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
  47 #define OMAP4430_ABB_IVA_DONE_ST_SHIFT                                  31
  48 #define OMAP4430_ABB_IVA_DONE_ST_MASK                                   BITFIELD(31, 31)
  49
  50 /* Used by PRM_IRQENABLE_MPU_2 */
  51 #define OMAP4430_ABB_MPU_DONE_EN_SHIFT                                  7
  52 #define OMAP4430_ABB_MPU_DONE_EN_MASK                                   BITFIELD(7, 7)
  53
  54 /* Used by PRM_IRQSTATUS_MPU_2 */
  55 #define OMAP4430_ABB_MPU_DONE_ST_SHIFT                                  7
  56 #define OMAP4430_ABB_MPU_DONE_ST_MASK                                   BITFIELD(7, 7)
  57
  58 /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */
  59 #define OMAP4430_ACTIVE_FBB_SEL_SHIFT                                   2
  60 #define OMAP4430_ACTIVE_FBB_SEL_MASK                                    BITFIELD(2, 2)
  61
  62 /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */
  63 #define OMAP4430_ACTIVE_RBB_SEL_SHIFT                                   1
  64 #define OMAP4430_ACTIVE_RBB_SEL_MASK                                    BITFIELD(1, 1)
  65
  66 /* Used by PM_ABE_PWRSTCTRL */
  67 #define OMAP4430_AESSMEM_ONSTATE_SHIFT                                  16
  68 #define OMAP4430_AESSMEM_ONSTATE_MASK                                   BITFIELD(16, 17)
  69
  70 /* Used by PM_ABE_PWRSTCTRL */
  71 #define OMAP4430_AESSMEM_RETSTATE_SHIFT                                 8
  72 #define OMAP4430_AESSMEM_RETSTATE_MASK                                  BITFIELD(8, 8)
  73
  74 /* Used by PM_ABE_PWRSTST */
  75 #define OMAP4430_AESSMEM_STATEST_SHIFT                                  4
  76 #define OMAP4430_AESSMEM_STATEST_MASK                                   BITFIELD(4, 5)
  77
  78 /*
  79  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
  80  * PRM_LDO_SRAM_MPU_SETUP
  81  */
  82 #define OMAP4430_AIPOFF_SHIFT                                           8
  83 #define OMAP4430_AIPOFF_MASK                                            BITFIELD(8, 8)
  84
  85 /* Used by PRM_VOLTCTRL */
  86 #define OMAP4430_AUTO_CTRL_VDD_CORE_L_SHIFT                             0
  87 #define OMAP4430_AUTO_CTRL_VDD_CORE_L_MASK                              BITFIELD(0, 1)
  88
  89 /* Used by PRM_VOLTCTRL */
  90 #define OMAP4430_AUTO_CTRL_VDD_IVA_L_SHIFT                              4
  91 #define OMAP4430_AUTO_CTRL_VDD_IVA_L_MASK                               BITFIELD(4, 5)
  92
  93 /* Used by PRM_VOLTCTRL */
  94 #define OMAP4430_AUTO_CTRL_VDD_MPU_L_SHIFT                              2
  95 #define OMAP4430_AUTO_CTRL_VDD_MPU_L_MASK                               BITFIELD(2, 3)
  96
  97 /* Used by PM_CAM_PWRSTCTRL */
  98 #define OMAP4430_CAM_MEM_ONSTATE_SHIFT                                  16
  99 #define OMAP4430_CAM_MEM_ONSTATE_MASK                                   BITFIELD(16, 17)
 100
 101 /* Used by PM_CAM_PWRSTST */
 102 #define OMAP4430_CAM_MEM_STATEST_SHIFT                                  4
 103 #define OMAP4430_CAM_MEM_STATEST_MASK                                   BITFIELD(4, 5)
 104
 105 /* Used by PRM_CLKREQCTRL */
 106 #define OMAP4430_CLKREQ_COND_SHIFT                                      0
 107 #define OMAP4430_CLKREQ_COND_MASK                                       BITFIELD(0, 2)
 108
 109 /* Used by PRM_VC_VAL_SMPS_RA_CMD */
 110 #define OMAP4430_CMDRA_VDD_CORE_L_SHIFT                                 0
 111 #define OMAP4430_CMDRA_VDD_CORE_L_MASK                                  BITFIELD(0, 7)
 112
 113 /* Used by PRM_VC_VAL_SMPS_RA_CMD */
 114 #define OMAP4430_CMDRA_VDD_IVA_L_SHIFT                                  8
 115 #define OMAP4430_CMDRA_VDD_IVA_L_MASK                                   BITFIELD(8, 15)
 116
 117 /* Used by PRM_VC_VAL_SMPS_RA_CMD */
 118 #define OMAP4430_CMDRA_VDD_MPU_L_SHIFT                                  16
 119 #define OMAP4430_CMDRA_VDD_MPU_L_MASK                                   BITFIELD(16, 23)
 120
 121 /* Used by PRM_VC_CFG_CHANNEL */
 122 #define OMAP4430_CMD_VDD_CORE_L_SHIFT                                   4
 123 #define OMAP4430_CMD_VDD_CORE_L_MASK                                    BITFIELD(4, 4)
 124
 125 /* Used by PRM_VC_CFG_CHANNEL */
 126 #define OMAP4430_CMD_VDD_IVA_L_SHIFT                                    12
 127 #define OMAP4430_CMD_VDD_IVA_L_MASK                                     BITFIELD(12, 12)
 128
 129 /* Used by PRM_VC_CFG_CHANNEL */
 130 #define OMAP4430_CMD_VDD_MPU_L_SHIFT                                    17
 131 #define OMAP4430_CMD_VDD_MPU_L_MASK                                     BITFIELD(17, 17)
 132
 133 /* Used by PM_CORE_PWRSTCTRL */
 134 #define OMAP4430_CORE_OCMRAM_ONSTATE_SHIFT                              18
 135 #define OMAP4430_CORE_OCMRAM_ONSTATE_MASK                               BITFIELD(18, 19)
 136
 137 /* Used by PM_CORE_PWRSTCTRL */
 138 #define OMAP4430_CORE_OCMRAM_RETSTATE_SHIFT                             9
 139 #define OMAP4430_CORE_OCMRAM_RETSTATE_MASK                              BITFIELD(9, 9)
 140
 141 /* Used by PM_CORE_PWRSTST */
 142 #define OMAP4430_CORE_OCMRAM_STATEST_SHIFT                              6
 143 #define OMAP4430_CORE_OCMRAM_STATEST_MASK                               BITFIELD(6, 7)
 144
 145 /* Used by PM_CORE_PWRSTCTRL */
 146 #define OMAP4430_CORE_OTHER_BANK_ONSTATE_SHIFT                          16
 147 #define OMAP4430_CORE_OTHER_BANK_ONSTATE_MASK                           BITFIELD(16, 17)
 148
 149 /* Used by PM_CORE_PWRSTCTRL */
 150 #define OMAP4430_CORE_OTHER_BANK_RETSTATE_SHIFT                         8
 151 #define OMAP4430_CORE_OTHER_BANK_RETSTATE_MASK                          BITFIELD(8, 8)
 152
 153 /* Used by PM_CORE_PWRSTST */
 154 #define OMAP4430_CORE_OTHER_BANK_STATEST_SHIFT                          4
 155 #define OMAP4430_CORE_OTHER_BANK_STATEST_MASK                           BITFIELD(4, 5)
 156
 157 /* Used by PRM_VC_VAL_BYPASS */
 158 #define OMAP4430_DATA_SHIFT                                             16
 159 #define OMAP4430_DATA_MASK                                              BITFIELD(16, 23)
 160
 161 /* Used by PRM_DEVICE_OFF_CTRL */
 162 #define OMAP4430_DEVICE_OFF_ENABLE_SHIFT                                0
 163 #define OMAP4430_DEVICE_OFF_ENABLE_MASK                                 BITFIELD(0, 0)
 164
 165 /* Used by PRM_VC_CFG_I2C_MODE */
 166 #define OMAP4430_DFILTEREN_SHIFT                                        6
 167 #define OMAP4430_DFILTEREN_MASK                                         BITFIELD(6, 6)
 168
 169 /* Used by PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */
 170 #define OMAP4430_DPLL_ABE_RECAL_EN_SHIFT                                4
 171 #define OMAP4430_DPLL_ABE_RECAL_EN_MASK                                 BITFIELD(4, 4)
 172
 173 /* Used by PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */
 174 #define OMAP4430_DPLL_ABE_RECAL_ST_SHIFT                                4
 175 #define OMAP4430_DPLL_ABE_RECAL_ST_MASK                                 BITFIELD(4, 4)
 176
 177 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
 178 #define OMAP4430_DPLL_CORE_RECAL_EN_SHIFT                               0
 179 #define OMAP4430_DPLL_CORE_RECAL_EN_MASK                                BITFIELD(0, 0)
 180
 181 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
 182 #define OMAP4430_DPLL_CORE_RECAL_ST_SHIFT                               0
 183 #define OMAP4430_DPLL_CORE_RECAL_ST_MASK                                BITFIELD(0, 0)
 184
 185 /* Used by PRM_IRQENABLE_MPU */
 186 #define OMAP4430_DPLL_DDRPHY_RECAL_EN_SHIFT                             6
 187 #define OMAP4430_DPLL_DDRPHY_RECAL_EN_MASK                              BITFIELD(6, 6)
 188
 189 /* Used by PRM_IRQSTATUS_MPU */
 190 #define OMAP4430_DPLL_DDRPHY_RECAL_ST_SHIFT                             6
 191 #define OMAP4430_DPLL_DDRPHY_RECAL_ST_MASK                              BITFIELD(6, 6)
 192
 193 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */
 194 #define OMAP4430_DPLL_IVA_RECAL_EN_SHIFT                                2
 195 #define OMAP4430_DPLL_IVA_RECAL_EN_MASK                                 BITFIELD(2, 2)
 196
 197 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */
 198 #define OMAP4430_DPLL_IVA_RECAL_ST_SHIFT                                2
 199 #define OMAP4430_DPLL_IVA_RECAL_ST_MASK                                 BITFIELD(2, 2)
 200
 201 /* Used by PRM_IRQENABLE_MPU */
 202 #define OMAP4430_DPLL_MPU_RECAL_EN_SHIFT                                1
 203 #define OMAP4430_DPLL_MPU_RECAL_EN_MASK                                 BITFIELD(1, 1)
 204
 205 /* Used by PRM_IRQSTATUS_MPU */
 206 #define OMAP4430_DPLL_MPU_RECAL_ST_SHIFT                                1
 207 #define OMAP4430_DPLL_MPU_RECAL_ST_MASK                                 BITFIELD(1, 1)
 208
 209 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
 210 #define OMAP4430_DPLL_PER_RECAL_EN_SHIFT                                3
 211 #define OMAP4430_DPLL_PER_RECAL_EN_MASK                                 BITFIELD(3, 3)
 212
 213 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
 214 #define OMAP4430_DPLL_PER_RECAL_ST_SHIFT                                3
 215 #define OMAP4430_DPLL_PER_RECAL_ST_MASK                                 BITFIELD(3, 3)
 216
 217 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
 218 #define OMAP4430_DPLL_UNIPRO_RECAL_EN_SHIFT                             7
 219 #define OMAP4430_DPLL_UNIPRO_RECAL_EN_MASK                              BITFIELD(7, 7)
 220
 221 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
 222 #define OMAP4430_DPLL_UNIPRO_RECAL_ST_SHIFT                             7
 223 #define OMAP4430_DPLL_UNIPRO_RECAL_ST_MASK                              BITFIELD(7, 7)
 224
 225 /* Used by PRM_IRQENABLE_MPU */
 226 #define OMAP4430_DPLL_USB_RECAL_EN_SHIFT                                5
 227 #define OMAP4430_DPLL_USB_RECAL_EN_MASK                                 BITFIELD(5, 5)
 228
 229 /* Used by PRM_IRQSTATUS_MPU */
 230 #define OMAP4430_DPLL_USB_RECAL_ST_SHIFT                                5
 231 #define OMAP4430_DPLL_USB_RECAL_ST_MASK                                 BITFIELD(5, 5)
 232
 233 /* Used by PM_DSS_PWRSTCTRL */
 234 #define OMAP4430_DSS_MEM_ONSTATE_SHIFT                                  16
 235 #define OMAP4430_DSS_MEM_ONSTATE_MASK                                   BITFIELD(16, 17)
 236
 237 /* Used by PM_DSS_PWRSTCTRL */
 238 #define OMAP4430_DSS_MEM_RETSTATE_SHIFT                                 8
 239 #define OMAP4430_DSS_MEM_RETSTATE_MASK                                  BITFIELD(8, 8)
 240
 241 /* Used by PM_DSS_PWRSTST */
 242 #define OMAP4430_DSS_MEM_STATEST_SHIFT                                  4
 243 #define OMAP4430_DSS_MEM_STATEST_MASK                                   BITFIELD(4, 5)
 244
 245 /* Used by PM_CORE_PWRSTCTRL */
 246 #define OMAP4430_DUCATI_L2RAM_ONSTATE_SHIFT                             20
 247 #define OMAP4430_DUCATI_L2RAM_ONSTATE_MASK                              BITFIELD(20, 21)
 248
 249 /* Used by PM_CORE_PWRSTCTRL */
 250 #define OMAP4430_DUCATI_L2RAM_RETSTATE_SHIFT                            10
 251 #define OMAP4430_DUCATI_L2RAM_RETSTATE_MASK                             BITFIELD(10, 10)
 252
 253 /* Used by PM_CORE_PWRSTST */
 254 #define OMAP4430_DUCATI_L2RAM_STATEST_SHIFT                             8
 255 #define OMAP4430_DUCATI_L2RAM_STATEST_MASK                              BITFIELD(8, 9)
 256
 257 /* Used by PM_CORE_PWRSTCTRL */
 258 #define OMAP4430_DUCATI_UNICACHE_ONSTATE_SHIFT                          22
 259 #define OMAP4430_DUCATI_UNICACHE_ONSTATE_MASK                           BITFIELD(22, 23)
 260
 261 /* Used by PM_CORE_PWRSTCTRL */
 262 #define OMAP4430_DUCATI_UNICACHE_RETSTATE_SHIFT                         11
 263 #define OMAP4430_DUCATI_UNICACHE_RETSTATE_MASK                          BITFIELD(11, 11)
 264
 265 /* Used by PM_CORE_PWRSTST */
 266 #define OMAP4430_DUCATI_UNICACHE_STATEST_SHIFT                          10
 267 #define OMAP4430_DUCATI_UNICACHE_STATEST_MASK                           BITFIELD(10, 11)
 268
 269 /* Used by RM_MPU_RSTST */
 270 #define OMAP4430_EMULATION_RST_SHIFT                                    0
 271 #define OMAP4430_EMULATION_RST_MASK                                     BITFIELD(0, 0)
 272
 273 /* Used by RM_DUCATI_RSTST */
 274 #define OMAP4430_EMULATION_RST1ST_SHIFT                                 3
 275 #define OMAP4430_EMULATION_RST1ST_MASK                                  BITFIELD(3, 3)
 276
 277 /* Used by RM_DUCATI_RSTST */
 278 #define OMAP4430_EMULATION_RST2ST_SHIFT                                 4
 279 #define OMAP4430_EMULATION_RST2ST_MASK                                  BITFIELD(4, 4)
 280
 281 /* Used by RM_IVAHD_RSTST */
 282 #define OMAP4430_EMULATION_SEQ1_RST1ST_SHIFT                            3
 283 #define OMAP4430_EMULATION_SEQ1_RST1ST_MASK                             BITFIELD(3, 3)
 284
 285 /* Used by RM_IVAHD_RSTST */
 286 #define OMAP4430_EMULATION_SEQ2_RST2ST_SHIFT                            4
 287 #define OMAP4430_EMULATION_SEQ2_RST2ST_MASK                             BITFIELD(4, 4)
 288
 289 /* Used by PM_EMU_PWRSTCTRL */
 290 #define OMAP4430_EMU_BANK_ONSTATE_SHIFT                                 16
 291 #define OMAP4430_EMU_BANK_ONSTATE_MASK                                  BITFIELD(16, 17)
 292
 293 /* Used by PM_EMU_PWRSTST */
 294 #define OMAP4430_EMU_BANK_STATEST_SHIFT                                 4
 295 #define OMAP4430_EMU_BANK_STATEST_MASK                                  BITFIELD(4, 5)
 296
 297 /*
 298  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
 299  * PRM_LDO_SRAM_MPU_SETUP, PRM_SRAM_WKUP_SETUP
 300  */
 301 #define OMAP4430_ENABLE_RTA_EXPORT_SHIFT                                0
 302 #define OMAP4430_ENABLE_RTA_EXPORT_MASK                                 BITFIELD(0, 0)
 303
 304 /*
 305  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
 306  * PRM_LDO_SRAM_MPU_SETUP
 307  */
 308 #define OMAP4430_ENFUNC1_SHIFT                                          3
 309 #define OMAP4430_ENFUNC1_MASK                                           BITFIELD(3, 3)
 310
 311 /*
 312  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
 313  * PRM_LDO_SRAM_MPU_SETUP
 314  */
 315 #define OMAP4430_ENFUNC3_SHIFT                                          5
 316 #define OMAP4430_ENFUNC3_MASK                                           BITFIELD(5, 5)
 317
 318 /*
 319  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
 320  * PRM_LDO_SRAM_MPU_SETUP
 321  */
 322 #define OMAP4430_ENFUNC4_SHIFT                                          6
 323 #define OMAP4430_ENFUNC4_MASK                                           BITFIELD(6, 6)
 324
 325 /*
 326  * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
 327  * PRM_LDO_SRAM_MPU_SETUP
 328  */
 329 #define OMAP4430_ENFUNC5_SHIFT                                          7
 330 #define OMAP4430_ENFUNC5_MASK                                           BITFIELD(7, 7)
 331
 332 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
 333 #define OMAP4430_ERRORGAIN_SHIFT                                        16
 334 #define OMAP4430_ERRORGAIN_MASK                                         BITFIELD(16, 23)
 335
 336 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
 337 #define OMAP4430_ERROROFFSET_SHIFT                                      24
 338 #define OMAP4430_ERROROFFSET_MASK                                       BITFIELD(24, 31)
 339
 340 /* Used by PRM_RSTST */
 341 #define OMAP4430_EXTERNAL_WARM_RST_SHIFT                                5
 342 #define OMAP4430_EXTERNAL_WARM_RST_MASK                                 BITFIELD(5, 5)
 343
 344 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
 345 #define OMAP4430_FORCEUPDATE_SHIFT                                      1
 346 #define OMAP4430_FORCEUPDATE_MASK                                       BITFIELD(1, 1)
 347
 348 /* Used by PRM_VP_CORE_VOLTAGE, PRM_VP_IVA_VOLTAGE, PRM_VP_MPU_VOLTAGE */
 349 #define OMAP4430_FORCEUPDATEWAIT_SHIFT                                  8
 350 #define OMAP4430_FORCEUPDATEWAIT_MASK                                   BITFIELD(8, 31)
 351
 352 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_TESLA */
 353 #define OMAP4430_FORCEWKUP_EN_SHIFT                                     10
 354 #define OMAP4430_FORCEWKUP_EN_MASK                                      BITFIELD(10, 10)
 355
 356 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_TESLA */
 357 #define OMAP4430_FORCEWKUP_ST_SHIFT                                     10
 358 #define OMAP4430_FORCEWKUP_ST_MASK                                      BITFIELD(10, 10)
 359
 360 /* Used by PM_GFX_PWRSTCTRL */
 361 #define OMAP4430_GFX_MEM_ONSTATE_SHIFT                                  16
 362 #define OMAP4430_GFX_MEM_ONSTATE_MASK                                   BITFIELD(16, 17)
 363
 364 /* Used by PM_GFX_PWRSTST */
 365 #define OMAP4430_GFX_MEM_STATEST_SHIFT                                  4
 366 #define OMAP4430_GFX_MEM_STATEST_MASK                                   BITFIELD(4, 5)
 367
 368 /* Used by PRM_RSTST */
 369 #define OMAP4430_GLOBAL_COLD_RST_SHIFT                                  0
 370 #define OMAP4430_GLOBAL_COLD_RST_MASK                                   BITFIELD(0, 0)
 371
 372 /* Used by PRM_RSTST */
 373 #define OMAP4430_GLOBAL_WARM_SW_RST_SHIFT                               1
 374 #define OMAP4430_GLOBAL_WARM_SW_RST_MASK                                BITFIELD(1, 1)
 375
 376 /* Used by PRM_IO_PMCTRL */
 377 #define OMAP4430_GLOBAL_WUEN_SHIFT                                      16
 378 #define OMAP4430_GLOBAL_WUEN_MASK                                       BITFIELD(16, 16)
 379
 380 /* Used by PRM_VC_CFG_I2C_MODE */
 381 #define OMAP4430_HSMCODE_SHIFT                                          0
 382 #define OMAP4430_HSMCODE_MASK                                           BITFIELD(0, 2)
 383
 384 /* Used by PRM_VC_CFG_I2C_MODE */
 385 #define OMAP4430_HSMODEEN_SHIFT                                         3
 386 #define OMAP4430_HSMODEEN_MASK                                          BITFIELD(3, 3)
 387
 388 /* Used by PRM_VC_CFG_I2C_CLK */
 389 #define OMAP4430_HSSCLH_SHIFT                                           16
 390 #define OMAP4430_HSSCLH_MASK                                            BITFIELD(16, 23)
 391
 392 /* Used by PRM_VC_CFG_I2C_CLK */
 393 #define OMAP4430_HSSCLL_SHIFT                                           24
 394 #define OMAP4430_HSSCLL_MASK                                            BITFIELD(24, 31)
 395
 396 /* Used by PM_IVAHD_PWRSTCTRL */
 397 #define OMAP4430_HWA_MEM_ONSTATE_SHIFT                                  16
 398 #define OMAP4430_HWA_MEM_ONSTATE_MASK                                   BITFIELD(16, 17)
 399
 400 /* Used by PM_IVAHD_PWRSTCTRL */
 401 #define OMAP4430_HWA_MEM_RETSTATE_SHIFT                                 8
 402 #define OMAP4430_HWA_MEM_RETSTATE_MASK                                  BITFIELD(8, 8)
 403
 404 /* Used by PM_IVAHD_PWRSTST */
 405 #define OMAP4430_HWA_MEM_STATEST_SHIFT                                  4
 406 #define OMAP4430_HWA_MEM_STATEST_MASK                                   BITFIELD(4, 5)
 407
 408 /* Used by RM_MPU_RSTST */
 409 #define OMAP4430_ICECRUSHER_MPU_RST_SHIFT                               1
 410 #define OMAP4430_ICECRUSHER_MPU_RST_MASK                                BITFIELD(1, 1)
 411
 412 /* Used by RM_DUCATI_RSTST */
 413 #define OMAP4430_ICECRUSHER_RST1ST_SHIFT                                5
 414 #define OMAP4430_ICECRUSHER_RST1ST_MASK                                 BITFIELD(5, 5)
 415
 416 /* Used by RM_DUCATI_RSTST */
 417 #define OMAP4430_ICECRUSHER_RST2ST_SHIFT                                6
 418 #define OMAP4430_ICECRUSHER_RST2ST_MASK                                 BITFIELD(6, 6)
 419
 420 /* Used by RM_IVAHD_RSTST */
 421 #define OMAP4430_ICECRUSHER_SEQ1_RST1ST_SHIFT                           5
 422 #define OMAP4430_ICECRUSHER_SEQ1_RST1ST_MASK                            BITFIELD(5, 5)
 423
 424 /* Used by RM_IVAHD_RSTST */
 425 #define OMAP4430_ICECRUSHER_SEQ2_RST2ST_SHIFT                           6
 426 #define OMAP4430_ICECRUSHER_SEQ2_RST2ST_MASK                            BITFIELD(6, 6)
 427
 428 /* Used by PRM_RSTST */
 429 #define OMAP4430_ICEPICK_RST_SHIFT                                      9
 430 #define OMAP4430_ICEPICK_RST_MASK                                       BITFIELD(9, 9)
 431
 432 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
 433 #define OMAP4430_INITVDD_SHIFT                                          2
 434 #define OMAP4430_INITVDD_MASK                                           BITFIELD(2, 2)
 435
 436 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
 437 #define OMAP4430_INITVOLTAGE_SHIFT                                      8
 438 #define OMAP4430_INITVOLTAGE_MASK                                       BITFIELD(8, 15)
 439
 440 /*
 441  * Used by PM_EMU_PWRSTST, PM_CORE_PWRSTST, PM_CAM_PWRSTST, PM_L3INIT_PWRSTST,
 442  * PM_ABE_PWRSTST, PM_GFX_PWRSTST, PM_MPU_PWRSTST, PM_CEFUSE_PWRSTST,
 443  * PM_DSS_PWRSTST, PM_L4PER_PWRSTST, PM_TESLA_PWRSTST, PM_IVAHD_PWRSTST
 444  */
 445 #define OMAP4430_INTRANSITION_SHIFT                                     20
 446 #define OMAP4430_INTRANSITION_MASK                                      BITFIELD(20, 20)
 447
 448 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
 449 #define OMAP4430_IO_EN_SHIFT                                            9
 450 #define OMAP4430_IO_EN_MASK                                             BITFIELD(9, 9)
 451
 452 /* Used by PRM_IO_PMCTRL */
 453 #define OMAP4430_IO_ON_STATUS_SHIFT                                     5
 454 #define OMAP4430_IO_ON_STATUS_MASK                                      BITFIELD(5, 5)
 455
 456 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
 457 #define OMAP4430_IO_ST_SHIFT                                            9
 458 #define OMAP4430_IO_ST_MASK                                             BITFIELD(9, 9)
 459
 460 /* Used by PRM_IO_PMCTRL */
 461 #define OMAP4430_ISOCLK_OVERRIDE_SHIFT                                  0
 462 #define OMAP4430_ISOCLK_OVERRIDE_MASK                                   BITFIELD(0, 0)
 463
 464 /* Used by PRM_IO_PMCTRL */
 465 #define OMAP4430_ISOCLK_STATUS_SHIFT                                    1
 466 #define OMAP4430_ISOCLK_STATUS_MASK                                     BITFIELD(1, 1)
 467
 468 /* Used by PRM_IO_PMCTRL */
 469 #define OMAP4430_ISOOVR_EXTEND_SHIFT                                    4
 470 #define OMAP4430_ISOOVR_EXTEND_MASK                                     BITFIELD(4, 4)
 471
 472 /* Used by PRM_IO_COUNT */
 473 #define OMAP4430_ISO_2_ON_TIME_SHIFT                                    0
 474 #define OMAP4430_ISO_2_ON_TIME_MASK                                     BITFIELD(0, 7)
 475
 476 /* Used by PM_L3INIT_PWRSTCTRL */
 477 #define OMAP4430_L3INIT_BANK1_ONSTATE_SHIFT                             16
 478 #define OMAP4430_L3INIT_BANK1_ONSTATE_MASK                              BITFIELD(16, 17)
 479
 480 /* Used by PM_L3INIT_PWRSTCTRL */
 481 #define OMAP4430_L3INIT_BANK1_RETSTATE_SHIFT                            8
 482 #define OMAP4430_L3INIT_BANK1_RETSTATE_MASK                             BITFIELD(8, 8)
 483
 484 /* Used by PM_L3INIT_PWRSTST */
 485 #define OMAP4430_L3INIT_BANK1_STATEST_SHIFT                             4
 486 #define OMAP4430_L3INIT_BANK1_STATEST_MASK                              BITFIELD(4, 5)
 487
 488 /*
 489  * Used by PM_CORE_PWRSTCTRL, PM_L3INIT_PWRSTCTRL, PM_ABE_PWRSTCTRL,
 490  * PM_MPU_PWRSTCTRL, PM_DSS_PWRSTCTRL, PM_L4PER_PWRSTCTRL, PM_TESLA_PWRSTCTRL,
 491  * PM_IVAHD_PWRSTCTRL
 492  */
 493 #define OMAP4430_LOGICRETSTATE_SHIFT                                    2
 494 #define OMAP4430_LOGICRETSTATE_MASK                                     BITFIELD(2, 2)
 495
 496 /*
 497  * Used by PM_EMU_PWRSTST, PM_CORE_PWRSTST, PM_CAM_PWRSTST, PM_L3INIT_PWRSTST,
 498  * PM_ABE_PWRSTST, PM_GFX_PWRSTST, PM_MPU_PWRSTST, PM_CEFUSE_PWRSTST,
 499  * PM_DSS_PWRSTST, PM_L4PER_PWRSTST, PM_TESLA_PWRSTST, PM_IVAHD_PWRSTST
 500  */
 501 #define OMAP4430_LOGICSTATEST_SHIFT                                     2
 502 #define OMAP4430_LOGICSTATEST_MASK                                      BITFIELD(2, 2)
 503
 504 /*
 505  * Used by RM_WKUP_GPIO1_CONTEXT, RM_WKUP_KEYBOARD_CONTEXT,
 506  * RM_WKUP_L4WKUP_CONTEXT, RM_WKUP_RTC_CONTEXT, RM_WKUP_SARRAM_CONTEXT,
 507  * RM_WKUP_SYNCTIMER_CONTEXT, RM_WKUP_TIMER12_CONTEXT, RM_WKUP_TIMER1_CONTEXT,
 508  * RM_WKUP_USIM_CONTEXT, RM_WKUP_WDT1_CONTEXT, RM_WKUP_WDT2_CONTEXT,
 509  * RM_EMU_DEBUGSS_CONTEXT, RM_D2D_SAD2D_CONTEXT, RM_D2D_SAD2D_FW_CONTEXT,
 510  * RM_DUCATI_DUCATI_CONTEXT, RM_L3INSTR_L3_3_CONTEXT,
 511  * RM_L3INSTR_L3_INSTR_CONTEXT, RM_L3INSTR_OCP_WP1_CONTEXT,
 512  * RM_L3_1_L3_1_CONTEXT, RM_L3_2_L3_2_CONTEXT, RM_L3_2_OCMC_RAM_CONTEXT,
 513  * RM_L4CFG_L4_CFG_CONTEXT, RM_L4CFG_SAR_ROM_CONTEXT, RM_MEMIF_DLL_CONTEXT,
 514  * RM_MEMIF_DLL_H_CONTEXT, RM_MEMIF_DMM_CONTEXT, RM_MEMIF_EMIF_FW_CONTEXT,
 515  * RM_CAM_FDIF_CONTEXT, RM_CAM_ISS_CONTEXT, RM_L3INIT_CCPTX_CONTEXT,
 516  * RM_L3INIT_EMAC_CONTEXT, RM_L3INIT_P1500_CONTEXT, RM_L3INIT_PCIESS_CONTEXT,
 517  * RM_L3INIT_SATA_CONTEXT, RM_L3INIT_TPPSS_CONTEXT, RM_L3INIT_UNIPRO1_CONTEXT,
 518  * RM_L3INIT_USBPHYOCP2SCP_CONTEXT, RM_L3INIT_XHPI_CONTEXT,
 519  * RM_ABE_AESS_CONTEXT, RM_ABE_DMIC_CONTEXT, RM_ABE_MCASP_CONTEXT,
 520  * RM_ABE_MCBSP1_CONTEXT, RM_ABE_MCBSP2_CONTEXT, RM_ABE_MCBSP3_CONTEXT,
 521  * RM_ABE_PDM_CONTEXT, RM_ABE_SLIMBUS_CONTEXT, RM_ABE_TIMER5_CONTEXT,
 522  * RM_ABE_TIMER6_CONTEXT, RM_ABE_TIMER7_CONTEXT, RM_ABE_TIMER8_CONTEXT,
 523  * RM_ABE_WDT3_CONTEXT, RM_GFX_GFX_CONTEXT, RM_MPU_MPU_CONTEXT,
 524  * RM_CEFUSE_CEFUSE_CONTEXT, RM_ALWON_MDMINTC_CONTEXT,
 525  * RM_ALWON_SR_CORE_CONTEXT, RM_ALWON_SR_IVA_CONTEXT, RM_ALWON_SR_MPU_CONTEXT,
 526  * RM_DSS_DEISS_CONTEXT, RM_DSS_DSS_CONTEXT, RM_L4PER_ADC_CONTEXT,
 527  * RM_L4PER_DMTIMER10_CONTEXT, RM_L4PER_DMTIMER11_CONTEXT,
 528  * RM_L4PER_DMTIMER2_CONTEXT, RM_L4PER_DMTIMER3_CONTEXT,
 529  * RM_L4PER_DMTIMER4_CONTEXT, RM_L4PER_DMTIMER9_CONTEXT, RM_L4PER_ELM_CONTEXT,
 530  * RM_L4PER_HDQ1W_CONTEXT, RM_L4PER_HECC1_CONTEXT, RM_L4PER_HECC2_CONTEXT,
 531  * RM_L4PER_I2C2_CONTEXT, RM_L4PER_I2C3_CONTEXT, RM_L4PER_I2C4_CONTEXT,
 532  * RM_L4PER_I2C5_CONTEXT, RM_L4PER_L4_PER_CONTEXT, RM_L4PER_MCASP2_CONTEXT,
 533  * RM_L4PER_MCASP3_CONTEXT, RM_L4PER_MCBSP4_CONTEXT, RM_L4PER_MCSPI1_CONTEXT,
 534  * RM_L4PER_MCSPI2_CONTEXT, RM_L4PER_MCSPI3_CONTEXT, RM_L4PER_MCSPI4_CONTEXT,
 535  * RM_L4PER_MGATE_CONTEXT, RM_L4PER_MMCSD3_CONTEXT, RM_L4PER_MMCSD4_CONTEXT,
 536  * RM_L4PER_MMCSD5_CONTEXT, RM_L4PER_MSPROHG_CONTEXT,
 537  * RM_L4PER_SLIMBUS2_CONTEXT, RM_L4SEC_PKAEIP29_CONTEXT,
 538  * RM_TESLA_TESLA_CONTEXT, RM_IVAHD_IVAHD_CONTEXT, RM_IVAHD_SL2_CONTEXT
 539  */
 540 #define OMAP4430_LOSTCONTEXT_DFF_SHIFT                                  0
 541 #define OMAP4430_LOSTCONTEXT_DFF_MASK                                   BITFIELD(0, 0)
 542
 543 /*
 544  * Used by RM_D2D_MODEM_ICR_CONTEXT, RM_D2D_SAD2D_CONTEXT,
 545  * RM_D2D_SAD2D_FW_CONTEXT, RM_DUCATI_DUCATI_CONTEXT, RM_L3INSTR_L3_3_CONTEXT,
 546  * RM_L3INSTR_OCP_WP1_CONTEXT, RM_L3_1_L3_1_CONTEXT, RM_L3_2_GPMC_CONTEXT,
 547  * RM_L3_2_L3_2_CONTEXT, RM_L4CFG_HW_SEM_CONTEXT, RM_L4CFG_L4_CFG_CONTEXT,
 548  * RM_L4CFG_MAILBOX_CONTEXT, RM_MEMIF_DMM_CONTEXT, RM_MEMIF_EMIF_1_CONTEXT,
 549  * RM_MEMIF_EMIF_2_CONTEXT, RM_MEMIF_EMIF_FW_CONTEXT, RM_MEMIF_EMIF_H1_CONTEXT,
 550  * RM_MEMIF_EMIF_H2_CONTEXT, RM_SDMA_SDMA_CONTEXT, RM_L3INIT_HSI_CONTEXT,
 551  * RM_L3INIT_MMC1_CONTEXT, RM_L3INIT_MMC2_CONTEXT, RM_L3INIT_MMC6_CONTEXT,
 552  * RM_L3INIT_USB_HOST_CONTEXT, RM_L3INIT_USB_HOST_FS_CONTEXT,
 553  * RM_L3INIT_USB_OTG_CONTEXT, RM_L3INIT_USB_TLL_CONTEXT, RM_DSS_DSS_CONTEXT,
 554  * RM_L4PER_GPIO2_CONTEXT, RM_L4PER_GPIO3_CONTEXT, RM_L4PER_GPIO4_CONTEXT,
 555  * RM_L4PER_GPIO5_CONTEXT, RM_L4PER_GPIO6_CONTEXT, RM_L4PER_I2C1_CONTEXT,
 556  * RM_L4PER_L4_PER_CONTEXT, RM_L4PER_UART1_CONTEXT, RM_L4PER_UART2_CONTEXT,
 557  * RM_L4PER_UART3_CONTEXT, RM_L4PER_UART4_CONTEXT, RM_L4SEC_AES1_CONTEXT,
 558  * RM_L4SEC_AES2_CONTEXT, RM_L4SEC_CRYPTODMA_CONTEXT, RM_L4SEC_DES3DES_CONTEXT,
 559  * RM_L4SEC_RNG_CONTEXT, RM_L4SEC_SHA2MD51_CONTEXT, RM_TESLA_TESLA_CONTEXT
 560  */
 561 #define OMAP4430_LOSTCONTEXT_RFF_SHIFT                                  1
 562 #define OMAP4430_LOSTCONTEXT_RFF_MASK                                   BITFIELD(1, 1)
 563
 564 /* Used by RM_ABE_AESS_CONTEXT */
 565 #define OMAP4430_LOSTMEM_AESSMEM_SHIFT                                  8
 566 #define OMAP4430_LOSTMEM_AESSMEM_MASK                                   BITFIELD(8, 8)
 567
 568 /* Used by RM_CAM_FDIF_CONTEXT, RM_CAM_ISS_CONTEXT */
 569 #define OMAP4430_LOSTMEM_CAM_MEM_SHIFT                                  8
 570 #define OMAP4430_LOSTMEM_CAM_MEM_MASK                                   BITFIELD(8, 8)
 571
 572 /* Used by RM_L3INSTR_OCP_WP1_CONTEXT */
 573 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_SHIFT                           8
 574 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_MASK                            BITFIELD(8, 8)
 575
 576 /* Renamed from LOSTMEM_CORE_NRET_BANK Used by RM_MEMIF_DMM_CONTEXT */
 577 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_9_9_SHIFT                       9
 578 #define OMAP4430_LOSTMEM_CORE_NRET_BANK_9_9_MASK                        BITFIELD(9, 9)
 579
 580 /* Used by RM_L3_2_OCMC_RAM_CONTEXT */
 581 #define OMAP4430_LOSTMEM_CORE_OCMRAM_SHIFT                              8
 582 #define OMAP4430_LOSTMEM_CORE_OCMRAM_MASK                               BITFIELD(8, 8)
 583
 584 /*
 585  * Used by RM_D2D_MODEM_ICR_CONTEXT, RM_MEMIF_DMM_CONTEXT,
 586  * RM_SDMA_SDMA_CONTEXT
 587  */
 588 #define OMAP4430_LOSTMEM_CORE_OTHER_BANK_SHIFT                          8
 589 #define OMAP4430_LOSTMEM_CORE_OTHER_BANK_MASK                           BITFIELD(8, 8)
 590
 591 /* Used by RM_DSS_DEISS_CONTEXT, RM_DSS_DSS_CONTEXT */
 592 #define OMAP4430_LOSTMEM_DSS_MEM_SHIFT                                  8
 593 #define OMAP4430_LOSTMEM_DSS_MEM_MASK                                   BITFIELD(8, 8)
 594
 595 /* Used by RM_DUCATI_DUCATI_CONTEXT */
 596 #define OMAP4430_LOSTMEM_DUCATI_L2RAM_SHIFT                             9
 597 #define OMAP4430_LOSTMEM_DUCATI_L2RAM_MASK                              BITFIELD(9, 9)
 598
 599 /* Used by RM_DUCATI_DUCATI_CONTEXT */
 600 #define OMAP4430_LOSTMEM_DUCATI_UNICACHE_SHIFT                          8
 601 #define OMAP4430_LOSTMEM_DUCATI_UNICACHE_MASK                           BITFIELD(8, 8)
 602
 603 /* Used by RM_EMU_DEBUGSS_CONTEXT */
 604 #define OMAP4430_LOSTMEM_EMU_BANK_SHIFT                                 8
 605 #define OMAP4430_LOSTMEM_EMU_BANK_MASK                                  BITFIELD(8, 8)
 606
 607 /* Used by RM_GFX_GFX_CONTEXT */
 608 #define OMAP4430_LOSTMEM_GFX_MEM_SHIFT                                  8
 609 #define OMAP4430_LOSTMEM_GFX_MEM_MASK                                   BITFIELD(8, 8)
 610
 611 /* Used by RM_IVAHD_IVAHD_CONTEXT */
 612 #define OMAP4430_LOSTMEM_HWA_MEM_SHIFT                                  10
 613 #define OMAP4430_LOSTMEM_HWA_MEM_MASK                                   BITFIELD(10, 10)
 614
 615 /*
 616  * Used by RM_L3INIT_CCPTX_CONTEXT, RM_L3INIT_EMAC_CONTEXT,
 617  * RM_L3INIT_HSI_CONTEXT, RM_L3INIT_MMC1_CONTEXT, RM_L3INIT_MMC2_CONTEXT,
 618  * RM_L3INIT_MMC6_CONTEXT, RM_L3INIT_PCIESS_CONTEXT, RM_L3INIT_SATA_CONTEXT,
 619  * RM_L3INIT_TPPSS_CONTEXT, RM_L3INIT_UNIPRO1_CONTEXT,
 620  * RM_L3INIT_USB_OTG_CONTEXT, RM_L3INIT_XHPI_CONTEXT
 621  */
 622 #define OMAP4430_LOSTMEM_L3INIT_BANK1_SHIFT                             8
 623 #define OMAP4430_LOSTMEM_L3INIT_BANK1_MASK                              BITFIELD(8, 8)
 624
 625 /* Used by RM_MPU_MPU_CONTEXT */
 626 #define OMAP4430_LOSTMEM_MPU_L1_SHIFT                                   8
 627 #define OMAP4430_LOSTMEM_MPU_L1_MASK                                    BITFIELD(8, 8)
 628
 629 /* Used by RM_MPU_MPU_CONTEXT */
 630 #define OMAP4430_LOSTMEM_MPU_L2_SHIFT                                   9
 631 #define OMAP4430_LOSTMEM_MPU_L2_MASK                                    BITFIELD(9, 9)
 632
 633 /* Used by RM_MPU_MPU_CONTEXT */
 634 #define OMAP4430_LOSTMEM_MPU_RAM_SHIFT                                  10
 635 #define OMAP4430_LOSTMEM_MPU_RAM_MASK                                   BITFIELD(10, 10)
 636
 637 /*
 638  * Used by RM_L4PER_HECC1_CONTEXT, RM_L4PER_HECC2_CONTEXT,
 639  * RM_L4PER_MCBSP4_CONTEXT, RM_L4PER_MMCSD3_CONTEXT, RM_L4PER_MMCSD4_CONTEXT,
 640  * RM_L4PER_MMCSD5_CONTEXT, RM_L4PER_SLIMBUS2_CONTEXT, RM_L4SEC_PKAEIP29_CONTEXT
 641  */
 642 #define OMAP4430_LOSTMEM_NONRETAINED_BANK_SHIFT                         8
 643 #define OMAP4430_LOSTMEM_NONRETAINED_BANK_MASK                          BITFIELD(8, 8)
 644
 645 /*
 646  * Used by RM_ABE_DMIC_CONTEXT, RM_ABE_MCBSP1_CONTEXT, RM_ABE_MCBSP2_CONTEXT,
 647  * RM_ABE_MCBSP3_CONTEXT, RM_ABE_PDM_CONTEXT, RM_ABE_SLIMBUS_CONTEXT
 648  */
 649 #define OMAP4430_LOSTMEM_PERIHPMEM_SHIFT                                8
 650 #define OMAP4430_LOSTMEM_PERIHPMEM_MASK                                 BITFIELD(8, 8)
 651
 652 /*
 653  * Used by RM_L4PER_MSPROHG_CONTEXT, RM_L4PER_UART1_CONTEXT,
 654  * RM_L4PER_UART2_CONTEXT, RM_L4PER_UART3_CONTEXT, RM_L4PER_UART4_CONTEXT,
 655  * RM_L4SEC_CRYPTODMA_CONTEXT
 656  */
 657 #define OMAP4430_LOSTMEM_RETAINED_BANK_SHIFT                            8
 658 #define OMAP4430_LOSTMEM_RETAINED_BANK_MASK                             BITFIELD(8, 8)
 659
 660 /* Used by RM_IVAHD_SL2_CONTEXT */
 661 #define OMAP4430_LOSTMEM_SL2_MEM_SHIFT                                  8
 662 #define OMAP4430_LOSTMEM_SL2_MEM_MASK                                   BITFIELD(8, 8)
 663
 664 /* Used by RM_IVAHD_IVAHD_CONTEXT */
 665 #define OMAP4430_LOSTMEM_TCM1_MEM_SHIFT                                 8
 666 #define OMAP4430_LOSTMEM_TCM1_MEM_MASK                                  BITFIELD(8, 8)
 667
 668 /* Used by RM_IVAHD_IVAHD_CONTEXT */
 669 #define OMAP4430_LOSTMEM_TCM2_MEM_SHIFT                                 9
 670 #define OMAP4430_LOSTMEM_TCM2_MEM_MASK                                  BITFIELD(9, 9)
 671
 672 /* Used by RM_TESLA_TESLA_CONTEXT */
 673 #define OMAP4430_LOSTMEM_TESLA_EDMA_SHIFT                               10
 674 #define OMAP4430_LOSTMEM_TESLA_EDMA_MASK                                BITFIELD(10, 10)
 675
 676 /* Used by RM_TESLA_TESLA_CONTEXT */
 677 #define OMAP4430_LOSTMEM_TESLA_L1_SHIFT                                 8
 678 #define OMAP4430_LOSTMEM_TESLA_L1_MASK                                  BITFIELD(8, 8)
 679
 680 /* Used by RM_TESLA_TESLA_CONTEXT */
 681 #define OMAP4430_LOSTMEM_TESLA_L2_SHIFT                                 9
 682 #define OMAP4430_LOSTMEM_TESLA_L2_MASK                                  BITFIELD(9, 9)
 683
 684 /* Used by RM_WKUP_SARRAM_CONTEXT */
 685 #define OMAP4430_LOSTMEM_WKUP_BANK_SHIFT                                8
 686 #define OMAP4430_LOSTMEM_WKUP_BANK_MASK                                 BITFIELD(8, 8)
 687
 688 /*
 689  * Used by PM_CORE_PWRSTCTRL, PM_CAM_PWRSTCTRL, PM_L3INIT_PWRSTCTRL,
 690  * PM_ABE_PWRSTCTRL, PM_GFX_PWRSTCTRL, PM_MPU_PWRSTCTRL, PM_CEFUSE_PWRSTCTRL,
 691  * PM_DSS_PWRSTCTRL, PM_L4PER_PWRSTCTRL, PM_TESLA_PWRSTCTRL, PM_IVAHD_PWRSTCTRL
 692  */
 693 #define OMAP4430_LOWPOWERSTATECHANGE_SHIFT                              4
 694 #define OMAP4430_LOWPOWERSTATECHANGE_MASK                               BITFIELD(4, 4)
 695
 696 /* Used by PM_CORE_PWRSTCTRL */
 697 #define OMAP4430_MEMORYCHANGE_SHIFT                                     3
 698 #define OMAP4430_MEMORYCHANGE_MASK                                      BITFIELD(3, 3)
 699
 700 /* Used by PRM_MODEM_IF_CTRL */
 701 #define OMAP4430_MODEM_READY_SHIFT                                      1
 702 #define OMAP4430_MODEM_READY_MASK                                       BITFIELD(1, 1)
 703
 704 /* Used by PRM_MODEM_IF_CTRL */
 705 #define OMAP4430_MODEM_SHUTDOWN_IRQ_SHIFT                               9
 706 #define OMAP4430_MODEM_SHUTDOWN_IRQ_MASK                                BITFIELD(9, 9)
 707
 708 /* Used by PRM_MODEM_IF_CTRL */
 709 #define OMAP4430_MODEM_SLEEP_ST_SHIFT                                   16
 710 #define OMAP4430_MODEM_SLEEP_ST_MASK                                    BITFIELD(16, 16)
 711
 712 /* Used by PRM_MODEM_IF_CTRL */
 713 #define OMAP4430_MODEM_WAKE_IRQ_SHIFT                                   8
 714 #define OMAP4430_MODEM_WAKE_IRQ_MASK                                    BITFIELD(8, 8)
 715
 716 /* Used by PM_MPU_PWRSTCTRL */
 717 #define OMAP4430_MPU_L1_ONSTATE_SHIFT                                   16
 718 #define OMAP4430_MPU_L1_ONSTATE_MASK                                    BITFIELD(16, 17)
 719
 720 /* Used by PM_MPU_PWRSTCTRL */
 721 #define OMAP4430_MPU_L1_RETSTATE_SHIFT                                  8
 722 #define OMAP4430_MPU_L1_RETSTATE_MASK                                   BITFIELD(8, 8)
 723
 724 /* Used by PM_MPU_PWRSTST */
 725 #define OMAP4430_MPU_L1_STATEST_SHIFT                                   4
 726 #define OMAP4430_MPU_L1_STATEST_MASK                                    BITFIELD(4, 5)
 727
 728 /* Used by PM_MPU_PWRSTCTRL */
 729 #define OMAP4430_MPU_L2_ONSTATE_SHIFT                                   18
 730 #define OMAP4430_MPU_L2_ONSTATE_MASK                                    BITFIELD(18, 19)
 731
 732 /* Used by PM_MPU_PWRSTCTRL */
 733 #define OMAP4430_MPU_L2_RETSTATE_SHIFT                                  9
 734 #define OMAP4430_MPU_L2_RETSTATE_MASK                                   BITFIELD(9, 9)
 735
 736 /* Used by PM_MPU_PWRSTST */
 737 #define OMAP4430_MPU_L2_STATEST_SHIFT                                   6
 738 #define OMAP4430_MPU_L2_STATEST_MASK                                    BITFIELD(6, 7)
 739
 740 /* Used by PM_MPU_PWRSTCTRL */
 741 #define OMAP4430_MPU_RAM_ONSTATE_SHIFT                                  20
 742 #define OMAP4430_MPU_RAM_ONSTATE_MASK                                   BITFIELD(20, 21)
 743
 744 /* Used by PM_MPU_PWRSTCTRL */
 745 #define OMAP4430_MPU_RAM_RETSTATE_SHIFT                                 10
 746 #define OMAP4430_MPU_RAM_RETSTATE_MASK                                  BITFIELD(10, 10)
 747
 748 /* Used by PM_MPU_PWRSTST */
 749 #define OMAP4430_MPU_RAM_STATEST_SHIFT                                  8
 750 #define OMAP4430_MPU_RAM_STATEST_MASK                                   BITFIELD(8, 9)
 751
 752 /* Used by PRM_RSTST */
 753 #define OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT                            2
 754 #define OMAP4430_MPU_SECURITY_VIOL_RST_MASK                             BITFIELD(2, 2)
 755
 756 /* Used by PRM_RSTST */
 757 #define OMAP4430_MPU_WDT_RST_SHIFT                                      3
 758 #define OMAP4430_MPU_WDT_RST_MASK                                       BITFIELD(3, 3)
 759
 760 /* Used by PM_L4PER_PWRSTCTRL */
 761 #define OMAP4430_NONRETAINED_BANK_ONSTATE_SHIFT                         18
 762 #define OMAP4430_NONRETAINED_BANK_ONSTATE_MASK                          BITFIELD(18, 19)
 763
 764 /* Used by PM_L4PER_PWRSTCTRL */
 765 #define OMAP4430_NONRETAINED_BANK_RETSTATE_SHIFT                        9
 766 #define OMAP4430_NONRETAINED_BANK_RETSTATE_MASK                         BITFIELD(9, 9)
 767
 768 /* Used by PM_L4PER_PWRSTST */
 769 #define OMAP4430_NONRETAINED_BANK_STATEST_SHIFT                         6
 770 #define OMAP4430_NONRETAINED_BANK_STATEST_MASK                          BITFIELD(6, 7)
 771
 772 /* Used by PM_CORE_PWRSTCTRL */
 773 #define OMAP4430_OCP_NRET_BANK_ONSTATE_SHIFT                            24
 774 #define OMAP4430_OCP_NRET_BANK_ONSTATE_MASK                             BITFIELD(24, 25)
 775
 776 /* Used by PM_CORE_PWRSTCTRL */
 777 #define OMAP4430_OCP_NRET_BANK_RETSTATE_SHIFT                           12
 778 #define OMAP4430_OCP_NRET_BANK_RETSTATE_MASK                            BITFIELD(12, 12)
 779
 780 /* Used by PM_CORE_PWRSTST */
 781 #define OMAP4430_OCP_NRET_BANK_STATEST_SHIFT                            12
 782 #define OMAP4430_OCP_NRET_BANK_STATEST_MASK                             BITFIELD(12, 13)
 783
 784 /*
 785  * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L,
 786  * PRM_VC_VAL_CMD_VDD_MPU_L
 787  */
 788 #define OMAP4430_OFF_SHIFT                                              0
 789 #define OMAP4430_OFF_MASK                                               BITFIELD(0, 7)
 790
 791 /* Used by PRM_LDO_BANDGAP_CTRL */
 792 #define OMAP4430_OFF_ENABLE_SHIFT                                       0
 793 #define OMAP4430_OFF_ENABLE_MASK                                        BITFIELD(0, 0)
 794
 795 /*
 796  * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L,
 797  * PRM_VC_VAL_CMD_VDD_MPU_L
 798  */
 799 #define OMAP4430_ON_SHIFT                                               24
 800 #define OMAP4430_ON_MASK                                                BITFIELD(24, 31)
 801
 802 /*
 803  * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L,
 804  * PRM_VC_VAL_CMD_VDD_MPU_L
 805  */
 806 #define OMAP4430_ONLP_SHIFT                                             16
 807 #define OMAP4430_ONLP_MASK                                              BITFIELD(16, 23)
 808
 809 /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */
 810 #define OMAP4430_OPP_CHANGE_SHIFT                                       2
 811 #define OMAP4430_OPP_CHANGE_MASK                                        BITFIELD(2, 2)
 812
 813 /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */
 814 #define OMAP4430_OPP_SEL_SHIFT                                          0
 815 #define OMAP4430_OPP_SEL_MASK                                           BITFIELD(0, 1)
 816
 817 /* Used by PRM_SRAM_COUNT */
 818 #define OMAP4430_PCHARGECNT_VALUE_SHIFT                                 0
 819 #define OMAP4430_PCHARGECNT_VALUE_MASK                                  BITFIELD(0, 5)
 820
 821 /* Used by PRM_PSCON_COUNT */
 822 #define OMAP4430_PCHARGE_TIME_SHIFT                                     0
 823 #define OMAP4430_PCHARGE_TIME_MASK                                      BITFIELD(0, 7)
 824
 825 /* Used by PM_ABE_PWRSTCTRL */
 826 #define OMAP4430_PERIPHMEM_ONSTATE_SHIFT                                20
 827 #define OMAP4430_PERIPHMEM_ONSTATE_MASK                                 BITFIELD(20, 21)
 828
 829 /* Used by PM_ABE_PWRSTCTRL */
 830 #define OMAP4430_PERIPHMEM_RETSTATE_SHIFT                               10
 831 #define OMAP4430_PERIPHMEM_RETSTATE_MASK                                BITFIELD(10, 10)
 832
 833 /* Used by PM_ABE_PWRSTST */
 834 #define OMAP4430_PERIPHMEM_STATEST_SHIFT                                8
 835 #define OMAP4430_PERIPHMEM_STATEST_MASK                                 BITFIELD(8, 9)
 836
 837 /* Used by PRM_PHASE1_CNDP */
 838 #define OMAP4430_PHASE1_CNDP_SHIFT                                      0
 839 #define OMAP4430_PHASE1_CNDP_MASK                                       BITFIELD(0, 31)
 840
 841 /* Used by PRM_PHASE2A_CNDP */
 842 #define OMAP4430_PHASE2A_CNDP_SHIFT                                     0
 843 #define OMAP4430_PHASE2A_CNDP_MASK                                      BITFIELD(0, 31)
 844
 845 /* Used by PRM_PHASE2B_CNDP */
 846 #define OMAP4430_PHASE2B_CNDP_SHIFT                                     0
 847 #define OMAP4430_PHASE2B_CNDP_MASK                                      BITFIELD(0, 31)
 848
 849 /* Used by PRM_PSCON_COUNT */
 850 #define OMAP4430_PONOUT_2_PGOODIN_TIME_SHIFT                            8
 851 #define OMAP4430_PONOUT_2_PGOODIN_TIME_MASK                             BITFIELD(8, 15)
 852
 853 /*
 854  * Used by PM_EMU_PWRSTCTRL, PM_CORE_PWRSTCTRL, PM_CAM_PWRSTCTRL,
 855  * PM_L3INIT_PWRSTCTRL, PM_ABE_PWRSTCTRL, PM_GFX_PWRSTCTRL, PM_MPU_PWRSTCTRL,
 856  * PM_CEFUSE_PWRSTCTRL, PM_DSS_PWRSTCTRL, PM_L4PER_PWRSTCTRL,
 857  * PM_TESLA_PWRSTCTRL, PM_IVAHD_PWRSTCTRL
 858  */
 859 #define OMAP4430_POWERSTATE_SHIFT                                       0
 860 #define OMAP4430_POWERSTATE_MASK                                        BITFIELD(0, 1)
 861
 862 /*
 863  * Used by PM_EMU_PWRSTST, PM_CORE_PWRSTST, PM_CAM_PWRSTST, PM_L3INIT_PWRSTST,
 864  * PM_ABE_PWRSTST, PM_GFX_PWRSTST, PM_MPU_PWRSTST, PM_CEFUSE_PWRSTST,
 865  * PM_DSS_PWRSTST, PM_L4PER_PWRSTST, PM_TESLA_PWRSTST, PM_IVAHD_PWRSTST
 866  */
 867 #define OMAP4430_POWERSTATEST_SHIFT                                     0
 868 #define OMAP4430_POWERSTATEST_MASK                                      BITFIELD(0, 1)
 869
 870 /* Used by PRM_PWRREQCTRL */
 871 #define OMAP4430_PWRREQ_COND_SHIFT                                      0
 872 #define OMAP4430_PWRREQ_COND_MASK                                       BITFIELD(0, 1)
 873
 874 /* Used by PRM_VC_CFG_CHANNEL */
 875 #define OMAP4430_RACEN_VDD_CORE_L_SHIFT                                 3
 876 #define OMAP4430_RACEN_VDD_CORE_L_MASK                                  BITFIELD(3, 3)
 877
 878 /* Used by PRM_VC_CFG_CHANNEL */
 879 #define OMAP4430_RACEN_VDD_IVA_L_SHIFT                                  11
 880 #define OMAP4430_RACEN_VDD_IVA_L_MASK                                   BITFIELD(11, 11)
 881
 882 /* Used by PRM_VC_CFG_CHANNEL */
 883 #define OMAP4430_RACEN_VDD_MPU_L_SHIFT                                  20
 884 #define OMAP4430_RACEN_VDD_MPU_L_MASK                                   BITFIELD(20, 20)
 885
 886 /* Used by PRM_VC_CFG_CHANNEL */
 887 #define OMAP4430_RAC_VDD_CORE_L_SHIFT                                   2
 888 #define OMAP4430_RAC_VDD_CORE_L_MASK                                    BITFIELD(2, 2)
 889
 890 /* Used by PRM_VC_CFG_CHANNEL */
 891 #define OMAP4430_RAC_VDD_IVA_L_SHIFT                                    10
 892 #define OMAP4430_RAC_VDD_IVA_L_MASK                                     BITFIELD(10, 10)
 893
 894 /* Used by PRM_VC_CFG_CHANNEL */
 895 #define OMAP4430_RAC_VDD_MPU_L_SHIFT                                    19
 896 #define OMAP4430_RAC_VDD_MPU_L_MASK                                     BITFIELD(19, 19)
 897
 898 /*
 899  * Used by PRM_VOLTSETUP_CORE_OFF, PRM_VOLTSETUP_CORE_RET_SLEEP,
 900  * PRM_VOLTSETUP_IVA_OFF, PRM_VOLTSETUP_IVA_RET_SLEEP, PRM_VOLTSETUP_MPU_OFF,
 901  * PRM_VOLTSETUP_MPU_RET_SLEEP
 902  */
 903 #define OMAP4430_RAMP_DOWN_COUNT_SHIFT                                  16
 904 #define OMAP4430_RAMP_DOWN_COUNT_MASK                                   BITFIELD(16, 21)
 905
 906 /*
 907  * Used by PRM_VOLTSETUP_CORE_OFF, PRM_VOLTSETUP_CORE_RET_SLEEP,
 908  * PRM_VOLTSETUP_IVA_OFF, PRM_VOLTSETUP_IVA_RET_SLEEP, PRM_VOLTSETUP_MPU_OFF,
 909  * PRM_VOLTSETUP_MPU_RET_SLEEP
 910  */
 911 #define OMAP4430_RAMP_DOWN_PRESCAL_SHIFT                                24
 912 #define OMAP4430_RAMP_DOWN_PRESCAL_MASK                                 BITFIELD(24, 25)
 913
 914 /*
 915  * Used by PRM_VOLTSETUP_CORE_OFF, PRM_VOLTSETUP_CORE_RET_SLEEP,
 916  * PRM_VOLTSETUP_IVA_OFF, PRM_VOLTSETUP_IVA_RET_SLEEP, PRM_VOLTSETUP_MPU_OFF,
 917  * PRM_VOLTSETUP_MPU_RET_SLEEP
 918  */
 919 #define OMAP4430_RAMP_UP_COUNT_SHIFT                                    0
 920 #define OMAP4430_RAMP_UP_COUNT_MASK                                     BITFIELD(0, 5)
 921
 922 /*
 923  * Used by PRM_VOLTSETUP_CORE_OFF, PRM_VOLTSETUP_CORE_RET_SLEEP,
 924  * PRM_VOLTSETUP_IVA_OFF, PRM_VOLTSETUP_IVA_RET_SLEEP, PRM_VOLTSETUP_MPU_OFF,
 925  * PRM_VOLTSETUP_MPU_RET_SLEEP
 926  */
 927 #define OMAP4430_RAMP_UP_PRESCAL_SHIFT                                  8
 928 #define OMAP4430_RAMP_UP_PRESCAL_MASK                                   BITFIELD(8, 9)
 929
 930 /* Used by PRM_VC_CFG_CHANNEL */
 931 #define OMAP4430_RAV_VDD_CORE_L_SHIFT                                   1
 932 #define OMAP4430_RAV_VDD_CORE_L_MASK                                    BITFIELD(1, 1)
 933
 934 /* Used by PRM_VC_CFG_CHANNEL */
 935 #define OMAP4430_RAV_VDD_IVA_L_SHIFT                                    9
 936 #define OMAP4430_RAV_VDD_IVA_L_MASK                                     BITFIELD(9, 9)
 937
 938 /* Used by PRM_VC_CFG_CHANNEL */
 939 #define OMAP4430_RAV_VDD_MPU_L_SHIFT                                    18
 940 #define OMAP4430_RAV_VDD_MPU_L_MASK                                     BITFIELD(18, 18)
 941
 942 /* Used by PRM_VC_VAL_BYPASS */
 943 #define OMAP4430_REGADDR_SHIFT                                          8
 944 #define OMAP4430_REGADDR_MASK                                           BITFIELD(8, 15)
 945
 946 /*
 947  * Used by PRM_VC_VAL_CMD_VDD_CORE_L, PRM_VC_VAL_CMD_VDD_IVA_L,
 948  * PRM_VC_VAL_CMD_VDD_MPU_L
 949  */
 950 #define OMAP4430_RET_SHIFT                                              8
 951 #define OMAP4430_RET_MASK                                               BITFIELD(8, 15)
 952
 953 /* Used by PM_L4PER_PWRSTCTRL */
 954 #define OMAP4430_RETAINED_BANK_ONSTATE_SHIFT                            16
 955 #define OMAP4430_RETAINED_BANK_ONSTATE_MASK                             BITFIELD(16, 17)
 956
 957 /* Used by PM_L4PER_PWRSTCTRL */
 958 #define OMAP4430_RETAINED_BANK_RETSTATE_SHIFT                           8
 959 #define OMAP4430_RETAINED_BANK_RETSTATE_MASK                            BITFIELD(8, 8)
 960
 961 /* Used by PM_L4PER_PWRSTST */
 962 #define OMAP4430_RETAINED_BANK_STATEST_SHIFT                            4
 963 #define OMAP4430_RETAINED_BANK_STATEST_MASK                             BITFIELD(4, 5)
 964
 965 /*
 966  * Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_IVA_CTRL,
 967  * PRM_LDO_SRAM_MPU_CTRL
 968  */
 969 #define OMAP4430_RETMODE_ENABLE_SHIFT                                   0
 970 #define OMAP4430_RETMODE_ENABLE_MASK                                    BITFIELD(0, 0)
 971
 972 /* Used by REVISION_PRM */
 973 #define OMAP4430_REV_SHIFT                                              0
 974 #define OMAP4430_REV_MASK                                               BITFIELD(0, 7)
 975
 976 /* Used by RM_DUCATI_RSTCTRL, RM_TESLA_RSTCTRL, RM_IVAHD_RSTCTRL */
 977 #define OMAP4430_RST1_SHIFT                                             0
 978 #define OMAP4430_RST1_MASK                                              BITFIELD(0, 0)
 979
 980 /* Used by RM_DUCATI_RSTST, RM_TESLA_RSTST, RM_IVAHD_RSTST */
 981 #define OMAP4430_RST1ST_SHIFT                                           0
 982 #define OMAP4430_RST1ST_MASK                                            BITFIELD(0, 0)
 983
 984 /* Used by RM_DUCATI_RSTCTRL, RM_TESLA_RSTCTRL, RM_IVAHD_RSTCTRL */
 985 #define OMAP4430_RST2_SHIFT                                             1
 986 #define OMAP4430_RST2_MASK                                              BITFIELD(1, 1)
 987
 988 /* Used by RM_DUCATI_RSTST, RM_TESLA_RSTST, RM_IVAHD_RSTST */
 989 #define OMAP4430_RST2ST_SHIFT                                           1
 990 #define OMAP4430_RST2ST_MASK                                            BITFIELD(1, 1)
 991
 992 /* Used by RM_DUCATI_RSTCTRL, RM_IVAHD_RSTCTRL */
 993 #define OMAP4430_RST3_SHIFT                                             2
 994 #define OMAP4430_RST3_MASK                                              BITFIELD(2, 2)
 995
 996 /* Used by RM_DUCATI_RSTST, RM_IVAHD_RSTST */
 997 #define OMAP4430_RST3ST_SHIFT                                           2
 998 #define OMAP4430_RST3ST_MASK                                            BITFIELD(2, 2)
 999
1000 /* Used by PRM_RSTTIME */
1001 #define OMAP4430_RSTTIME1_SHIFT                                         0
1002 #define OMAP4430_RSTTIME1_MASK                                          BITFIELD(0, 9)
1003
1004 /* Used by PRM_RSTTIME */
1005 #define OMAP4430_RSTTIME2_SHIFT                                         10
1006 #define OMAP4430_RSTTIME2_MASK                                          BITFIELD(10, 14)
1007
1008 /* Used by PRM_RSTCTRL */
1009 #define OMAP4430_RST_GLOBAL_COLD_SW_SHIFT                               1
1010 #define OMAP4430_RST_GLOBAL_COLD_SW_MASK                                BITFIELD(1, 1)
1011
1012 /* Used by PRM_RSTCTRL */
1013 #define OMAP4430_RST_GLOBAL_WARM_SW_SHIFT                               0
1014 #define OMAP4430_RST_GLOBAL_WARM_SW_MASK                                BITFIELD(0, 0)
1015
1016 /* Used by PRM_VC_CFG_CHANNEL */
1017 #define OMAP4430_SA_VDD_CORE_L_SHIFT                                    0
1018 #define OMAP4430_SA_VDD_CORE_L_MASK                                     BITFIELD(0, 0)
1019
1020 /* Renamed from SA_VDD_CORE_L Used by PRM_VC_SMPS_SA */
1021 #define OMAP4430_SA_VDD_CORE_L_0_6_SHIFT                                0
1022 #define OMAP4430_SA_VDD_CORE_L_0_6_MASK                                 BITFIELD(0, 6)
1023
1024 /* Used by PRM_VC_CFG_CHANNEL */
1025 #define OMAP4430_SA_VDD_IVA_L_SHIFT                                     8
1026 #define OMAP4430_SA_VDD_IVA_L_MASK                                      BITFIELD(8, 8)
1027
1028 /* Renamed from SA_VDD_IVA_L Used by PRM_VC_SMPS_SA */
1029 #define OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT                      8
1030 #define OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK                       BITFIELD(8, 14)
1031
1032 /* Used by PRM_VC_CFG_CHANNEL */
1033 #define OMAP4430_SA_VDD_MPU_L_SHIFT                                     16
1034 #define OMAP4430_SA_VDD_MPU_L_MASK                                      BITFIELD(16, 16)
1035
1036 /* Renamed from SA_VDD_MPU_L Used by PRM_VC_SMPS_SA */
1037 #define OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT                      16
1038 #define OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK                       BITFIELD(16, 22)
1039
1040 /* Used by PRM_VC_CFG_I2C_CLK */
1041 #define OMAP4430_SCLH_SHIFT                                             0
1042 #define OMAP4430_SCLH_MASK                                              BITFIELD(0, 7)
1043
1044 /* Used by PRM_VC_CFG_I2C_CLK */
1045 #define OMAP4430_SCLL_SHIFT                                             8
1046 #define OMAP4430_SCLL_MASK                                              BITFIELD(8, 15)
1047
1048 /* Used by PRM_RSTST */
1049 #define OMAP4430_SECURE_WDT_RST_SHIFT                                   4
1050 #define OMAP4430_SECURE_WDT_RST_MASK                                    BITFIELD(4, 4)
1051
1052 /* Used by PM_IVAHD_PWRSTCTRL */
1053 #define OMAP4430_SL2_MEM_ONSTATE_SHIFT                                  18
1054 #define OMAP4430_SL2_MEM_ONSTATE_MASK                                   BITFIELD(18, 19)
1055
1056 /* Used by PM_IVAHD_PWRSTCTRL */
1057 #define OMAP4430_SL2_MEM_RETSTATE_SHIFT                                 9
1058 #define OMAP4430_SL2_MEM_RETSTATE_MASK                                  BITFIELD(9, 9)
1059
1060 /* Used by PM_IVAHD_PWRSTST */
1061 #define OMAP4430_SL2_MEM_STATEST_SHIFT                                  6
1062 #define OMAP4430_SL2_MEM_STATEST_MASK                                   BITFIELD(6, 7)
1063
1064 /* Used by PRM_VC_VAL_BYPASS */
1065 #define OMAP4430_SLAVEADDR_SHIFT                                        0
1066 #define OMAP4430_SLAVEADDR_MASK                                         BITFIELD(0, 6)
1067
1068 /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */
1069 #define OMAP4430_SLEEP_RBB_SEL_SHIFT                                    3
1070 #define OMAP4430_SLEEP_RBB_SEL_MASK                                     BITFIELD(3, 3)
1071
1072 /* Used by PRM_SRAM_COUNT */
1073 #define OMAP4430_SLPCNT_VALUE_SHIFT                                     16
1074 #define OMAP4430_SLPCNT_VALUE_MASK                                      BITFIELD(16, 23)
1075
1076 /* Used by PRM_VP_CORE_VSTEPMAX, PRM_VP_IVA_VSTEPMAX, PRM_VP_MPU_VSTEPMAX */
1077 #define OMAP4430_SMPSWAITTIMEMAX_SHIFT                                  8
1078 #define OMAP4430_SMPSWAITTIMEMAX_MASK                                   BITFIELD(8, 23)
1079
1080 /* Used by PRM_VP_CORE_VSTEPMIN, PRM_VP_IVA_VSTEPMIN, PRM_VP_MPU_VSTEPMIN */
1081 #define OMAP4430_SMPSWAITTIMEMIN_SHIFT                                  8
1082 #define OMAP4430_SMPSWAITTIMEMIN_MASK                                   BITFIELD(8, 23)
1083
1084 /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */
1085 #define OMAP4430_SR2EN_SHIFT                                            0
1086 #define OMAP4430_SR2EN_MASK                                             BITFIELD(0, 0)
1087
1088 /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */
1089 #define OMAP4430_SR2_IN_TRANSITION_SHIFT                                6
1090 #define OMAP4430_SR2_IN_TRANSITION_MASK                                 BITFIELD(6, 6)
1091
1092 /* Used by PRM_LDO_ABB_IVA_CTRL, PRM_LDO_ABB_MPU_CTRL */
1093 #define OMAP4430_SR2_STATUS_SHIFT                                       3
1094 #define OMAP4430_SR2_STATUS_MASK                                        BITFIELD(3, 4)
1095
1096 /* Used by PRM_LDO_ABB_IVA_SETUP, PRM_LDO_ABB_MPU_SETUP */
1097 #define OMAP4430_SR2_WTCNT_VALUE_SHIFT                                  8
1098 #define OMAP4430_SR2_WTCNT_VALUE_MASK                                   BITFIELD(8, 15)
1099
1100 /*
1101  * Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_IVA_CTRL,
1102  * PRM_LDO_SRAM_MPU_CTRL
1103  */
1104 #define OMAP4430_SRAMLDO_STATUS_SHIFT                                   8
1105 #define OMAP4430_SRAMLDO_STATUS_MASK                                    BITFIELD(8, 8)
1106
1107 /*
1108  * Used by PRM_LDO_SRAM_CORE_CTRL, PRM_LDO_SRAM_IVA_CTRL,
1109  * PRM_LDO_SRAM_MPU_CTRL
1110  */
1111 #define OMAP4430_SRAM_IN_TRANSITION_SHIFT                               9
1112 #define OMAP4430_SRAM_IN_TRANSITION_MASK                                BITFIELD(9, 9)
1113
1114 /* Used by PRM_VC_CFG_I2C_MODE */
1115 #define OMAP4430_SRMODEEN_SHIFT                                         4
1116 #define OMAP4430_SRMODEEN_MASK                                          BITFIELD(4, 4)
1117
1118 /* Used by PRM_VOLTSETUP_WARMRESET */
1119 #define OMAP4430_STABLE_COUNT_SHIFT                                     0
1120 #define OMAP4430_STABLE_COUNT_MASK                                      BITFIELD(0, 5)
1121
1122 /* Used by PRM_VOLTSETUP_WARMRESET */
1123 #define OMAP4430_STABLE_PRESCAL_SHIFT                                   8
1124 #define OMAP4430_STABLE_PRESCAL_MASK                                    BITFIELD(8, 9)
1125
1126 /* Used by PM_IVAHD_PWRSTCTRL */
1127 #define OMAP4430_TCM1_MEM_ONSTATE_SHIFT                                 20
1128 #define OMAP4430_TCM1_MEM_ONSTATE_MASK                                  BITFIELD(20, 21)
1129
1130 /* Used by PM_IVAHD_PWRSTCTRL */
1131 #define OMAP4430_TCM1_MEM_RETSTATE_SHIFT                                10
1132 #define OMAP4430_TCM1_MEM_RETSTATE_MASK                                 BITFIELD(10, 10)
1133
1134 /* Used by PM_IVAHD_PWRSTST */
1135 #define OMAP4430_TCM1_MEM_STATEST_SHIFT                                 8
1136 #define OMAP4430_TCM1_MEM_STATEST_MASK                                  BITFIELD(8, 9)
1137
1138 /* Used by PM_IVAHD_PWRSTCTRL */
1139 #define OMAP4430_TCM2_MEM_ONSTATE_SHIFT                                 22
1140 #define OMAP4430_TCM2_MEM_ONSTATE_MASK                                  BITFIELD(22, 23)
1141
1142 /* Used by PM_IVAHD_PWRSTCTRL */
1143 #define OMAP4430_TCM2_MEM_RETSTATE_SHIFT                                11
1144 #define OMAP4430_TCM2_MEM_RETSTATE_MASK                                 BITFIELD(11, 11)
1145
1146 /* Used by PM_IVAHD_PWRSTST */
1147 #define OMAP4430_TCM2_MEM_STATEST_SHIFT                                 10
1148 #define OMAP4430_TCM2_MEM_STATEST_MASK                                  BITFIELD(10, 11)
1149
1150 /* Used by RM_TESLA_RSTST */
1151 #define OMAP4430_TESLASS_EMU_RSTST_SHIFT                                2
1152 #define OMAP4430_TESLASS_EMU_RSTST_MASK                                 BITFIELD(2, 2)
1153
1154 /* Used by RM_TESLA_RSTST */
1155 #define OMAP4430_TESLA_DSP_EMU_REQ_RSTST_SHIFT                          3
1156 #define OMAP4430_TESLA_DSP_EMU_REQ_RSTST_MASK                           BITFIELD(3, 3)
1157
1158 /* Used by PM_TESLA_PWRSTCTRL */
1159 #define OMAP4430_TESLA_EDMA_ONSTATE_SHIFT                               20
1160 #define OMAP4430_TESLA_EDMA_ONSTATE_MASK                                BITFIELD(20, 21)
1161
1162 /* Used by PM_TESLA_PWRSTCTRL */
1163 #define OMAP4430_TESLA_EDMA_RETSTATE_SHIFT                              10
1164 #define OMAP4430_TESLA_EDMA_RETSTATE_MASK                               BITFIELD(10, 10)
1165
1166 /* Used by PM_TESLA_PWRSTST */
1167 #define OMAP4430_TESLA_EDMA_STATEST_SHIFT                               8
1168 #define OMAP4430_TESLA_EDMA_STATEST_MASK                                BITFIELD(8, 9)
1169
1170 /* Used by PM_TESLA_PWRSTCTRL */
1171 #define OMAP4430_TESLA_L1_ONSTATE_SHIFT                                 16
1172 #define OMAP4430_TESLA_L1_ONSTATE_MASK                                  BITFIELD(16, 17)
1173
1174 /* Used by PM_TESLA_PWRSTCTRL */
1175 #define OMAP4430_TESLA_L1_RETSTATE_SHIFT                                8
1176 #define OMAP4430_TESLA_L1_RETSTATE_MASK                                 BITFIELD(8, 8)
1177
1178 /* Used by PM_TESLA_PWRSTST */
1179 #define OMAP4430_TESLA_L1_STATEST_SHIFT                                 4
1180 #define OMAP4430_TESLA_L1_STATEST_MASK                                  BITFIELD(4, 5)
1181
1182 /* Used by PM_TESLA_PWRSTCTRL */
1183 #define OMAP4430_TESLA_L2_ONSTATE_SHIFT                                 18
1184 #define OMAP4430_TESLA_L2_ONSTATE_MASK                                  BITFIELD(18, 19)
1185
1186 /* Used by PM_TESLA_PWRSTCTRL */
1187 #define OMAP4430_TESLA_L2_RETSTATE_SHIFT                                9
1188 #define OMAP4430_TESLA_L2_RETSTATE_MASK                                 BITFIELD(9, 9)
1189
1190 /* Used by PM_TESLA_PWRSTST */
1191 #define OMAP4430_TESLA_L2_STATEST_SHIFT                                 6
1192 #define OMAP4430_TESLA_L2_STATEST_MASK                                  BITFIELD(6, 7)
1193
1194 /* Used by PRM_VP_CORE_VLIMITTO, PRM_VP_IVA_VLIMITTO, PRM_VP_MPU_VLIMITTO */
1195 #define OMAP4430_TIMEOUT_SHIFT                                          0
1196 #define OMAP4430_TIMEOUT_MASK                                           BITFIELD(0, 15)
1197
1198 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
1199 #define OMAP4430_TIMEOUTEN_SHIFT                                        3
1200 #define OMAP4430_TIMEOUTEN_MASK                                         BITFIELD(3, 3)
1201
1202 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1203 #define OMAP4430_TRANSITION_EN_SHIFT                                    8
1204 #define OMAP4430_TRANSITION_EN_MASK                                     BITFIELD(8, 8)
1205
1206 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1207 #define OMAP4430_TRANSITION_ST_SHIFT                                    8
1208 #define OMAP4430_TRANSITION_ST_MASK                                     BITFIELD(8, 8)
1209
1210 /* Used by PRM_VC_VAL_BYPASS */
1211 #define OMAP4430_VALID_SHIFT                                            24
1212 #define OMAP4430_VALID_MASK                                             BITFIELD(24, 24)
1213
1214 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1215 #define OMAP4430_VC_BYPASSACK_EN_SHIFT                                  14
1216 #define OMAP4430_VC_BYPASSACK_EN_MASK                                   BITFIELD(14, 14)
1217
1218 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1219 #define OMAP4430_VC_BYPASSACK_ST_SHIFT                                  14
1220 #define OMAP4430_VC_BYPASSACK_ST_MASK                                   BITFIELD(14, 14)
1221
1222 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1223 #define OMAP4430_VC_IVA_VPACK_EN_SHIFT                                  30
1224 #define OMAP4430_VC_IVA_VPACK_EN_MASK                                   BITFIELD(30, 30)
1225
1226 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1227 #define OMAP4430_VC_IVA_VPACK_ST_SHIFT                                  30
1228 #define OMAP4430_VC_IVA_VPACK_ST_MASK                                   BITFIELD(30, 30)
1229
1230 /* Used by PRM_IRQENABLE_MPU_2 */
1231 #define OMAP4430_VC_MPU_VPACK_EN_SHIFT                                  6
1232 #define OMAP4430_VC_MPU_VPACK_EN_MASK                                   BITFIELD(6, 6)
1233
1234 /* Used by PRM_IRQSTATUS_MPU_2 */
1235 #define OMAP4430_VC_MPU_VPACK_ST_SHIFT                                  6
1236 #define OMAP4430_VC_MPU_VPACK_ST_MASK                                   BITFIELD(6, 6)
1237
1238 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1239 #define OMAP4430_VC_RAERR_EN_SHIFT                                      12
1240 #define OMAP4430_VC_RAERR_EN_MASK                                       BITFIELD(12, 12)
1241
1242 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1243 #define OMAP4430_VC_RAERR_ST_SHIFT                                      12
1244 #define OMAP4430_VC_RAERR_ST_MASK                                       BITFIELD(12, 12)
1245
1246 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1247 #define OMAP4430_VC_SAERR_EN_SHIFT                                      11
1248 #define OMAP4430_VC_SAERR_EN_MASK                                       BITFIELD(11, 11)
1249
1250 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1251 #define OMAP4430_VC_SAERR_ST_SHIFT                                      11
1252 #define OMAP4430_VC_SAERR_ST_MASK                                       BITFIELD(11, 11)
1253
1254 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1255 #define OMAP4430_VC_TOERR_EN_SHIFT                                      13
1256 #define OMAP4430_VC_TOERR_EN_MASK                                       BITFIELD(13, 13)
1257
1258 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1259 #define OMAP4430_VC_TOERR_ST_SHIFT                                      13
1260 #define OMAP4430_VC_TOERR_ST_MASK                                       BITFIELD(13, 13)
1261
1262 /* Used by PRM_VP_CORE_VLIMITTO, PRM_VP_IVA_VLIMITTO, PRM_VP_MPU_VLIMITTO */
1263 #define OMAP4430_VDDMAX_SHIFT                                           24
1264 #define OMAP4430_VDDMAX_MASK                                            BITFIELD(24, 31)
1265
1266 /* Used by PRM_VP_CORE_VLIMITTO, PRM_VP_IVA_VLIMITTO, PRM_VP_MPU_VLIMITTO */
1267 #define OMAP4430_VDDMIN_SHIFT                                           16
1268 #define OMAP4430_VDDMIN_MASK                                            BITFIELD(16, 23)
1269
1270 /* Used by PRM_VOLTCTRL */
1271 #define OMAP4430_VDD_CORE_I2C_DISABLE_SHIFT                             12
1272 #define OMAP4430_VDD_CORE_I2C_DISABLE_MASK                              BITFIELD(12, 12)
1273
1274 /* Used by PRM_RSTST */
1275 #define OMAP4430_VDD_CORE_VOLT_MGR_RST_SHIFT                            8
1276 #define OMAP4430_VDD_CORE_VOLT_MGR_RST_MASK                             BITFIELD(8, 8)
1277
1278 /* Used by PRM_VOLTCTRL */
1279 #define OMAP4430_VDD_IVA_I2C_DISABLE_SHIFT                              14
1280 #define OMAP4430_VDD_IVA_I2C_DISABLE_MASK                               BITFIELD(14, 14)
1281
1282 /* Used by PRM_VOLTCTRL */
1283 #define OMAP4430_VDD_IVA_PRESENCE_SHIFT                                 9
1284 #define OMAP4430_VDD_IVA_PRESENCE_MASK                                  BITFIELD(9, 9)
1285
1286 /* Used by PRM_RSTST */
1287 #define OMAP4430_VDD_IVA_VOLT_MGR_RST_SHIFT                             7
1288 #define OMAP4430_VDD_IVA_VOLT_MGR_RST_MASK                              BITFIELD(7, 7)
1289
1290 /* Used by PRM_VOLTCTRL */
1291 #define OMAP4430_VDD_MPU_I2C_DISABLE_SHIFT                              13
1292 #define OMAP4430_VDD_MPU_I2C_DISABLE_MASK                               BITFIELD(13, 13)
1293
1294 /* Used by PRM_VOLTCTRL */
1295 #define OMAP4430_VDD_MPU_PRESENCE_SHIFT                                 8
1296 #define OMAP4430_VDD_MPU_PRESENCE_MASK                                  BITFIELD(8, 8)
1297
1298 /* Used by PRM_RSTST */
1299 #define OMAP4430_VDD_MPU_VOLT_MGR_RST_SHIFT                             6
1300 #define OMAP4430_VDD_MPU_VOLT_MGR_RST_MASK                              BITFIELD(6, 6)
1301
1302 /* Used by PRM_VC_VAL_SMPS_RA_VOL */
1303 #define OMAP4430_VOLRA_VDD_CORE_L_SHIFT                                 0
1304 #define OMAP4430_VOLRA_VDD_CORE_L_MASK                                  BITFIELD(0, 7)
1305
1306 /* Used by PRM_VC_VAL_SMPS_RA_VOL */
1307 #define OMAP4430_VOLRA_VDD_IVA_L_SHIFT                                  8
1308 #define OMAP4430_VOLRA_VDD_IVA_L_MASK                                   BITFIELD(8, 15)
1309
1310 /* Used by PRM_VC_VAL_SMPS_RA_VOL */
1311 #define OMAP4430_VOLRA_VDD_MPU_L_SHIFT                                  16
1312 #define OMAP4430_VOLRA_VDD_MPU_L_MASK                                   BITFIELD(16, 23)
1313
1314 /* Used by PRM_VP_CORE_CONFIG, PRM_VP_IVA_CONFIG, PRM_VP_MPU_CONFIG */
1315 #define OMAP4430_VPENABLE_SHIFT                                         0
1316 #define OMAP4430_VPENABLE_MASK                                          BITFIELD(0, 0)
1317
1318 /* Used by PRM_VP_CORE_STATUS, PRM_VP_IVA_STATUS, PRM_VP_MPU_STATUS */
1319 #define OMAP4430_VPINIDLE_SHIFT                                         0
1320 #define OMAP4430_VPINIDLE_MASK                                          BITFIELD(0, 0)
1321
1322 /* Used by PRM_VP_CORE_VOLTAGE, PRM_VP_IVA_VOLTAGE, PRM_VP_MPU_VOLTAGE */
1323 #define OMAP4430_VPVOLTAGE_SHIFT                                        0
1324 #define OMAP4430_VPVOLTAGE_MASK                                         BITFIELD(0, 7)
1325
1326 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1327 #define OMAP4430_VP_CORE_EQVALUE_EN_SHIFT                               20
1328 #define OMAP4430_VP_CORE_EQVALUE_EN_MASK                                BITFIELD(20, 20)
1329
1330 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1331 #define OMAP4430_VP_CORE_EQVALUE_ST_SHIFT                               20
1332 #define OMAP4430_VP_CORE_EQVALUE_ST_MASK                                BITFIELD(20, 20)
1333
1334 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1335 #define OMAP4430_VP_CORE_MAXVDD_EN_SHIFT                                18
1336 #define OMAP4430_VP_CORE_MAXVDD_EN_MASK                                 BITFIELD(18, 18)
1337
1338 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1339 #define OMAP4430_VP_CORE_MAXVDD_ST_SHIFT                                18
1340 #define OMAP4430_VP_CORE_MAXVDD_ST_MASK                                 BITFIELD(18, 18)
1341
1342 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1343 #define OMAP4430_VP_CORE_MINVDD_EN_SHIFT                                17
1344 #define OMAP4430_VP_CORE_MINVDD_EN_MASK                                 BITFIELD(17, 17)
1345
1346 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1347 #define OMAP4430_VP_CORE_MINVDD_ST_SHIFT                                17
1348 #define OMAP4430_VP_CORE_MINVDD_ST_MASK                                 BITFIELD(17, 17)
1349
1350 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1351 #define OMAP4430_VP_CORE_NOSMPSACK_EN_SHIFT                             19
1352 #define OMAP4430_VP_CORE_NOSMPSACK_EN_MASK                              BITFIELD(19, 19)
1353
1354 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1355 #define OMAP4430_VP_CORE_NOSMPSACK_ST_SHIFT                             19
1356 #define OMAP4430_VP_CORE_NOSMPSACK_ST_MASK                              BITFIELD(19, 19)
1357
1358 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1359 #define OMAP4430_VP_CORE_OPPCHANGEDONE_EN_SHIFT                         16
1360 #define OMAP4430_VP_CORE_OPPCHANGEDONE_EN_MASK                          BITFIELD(16, 16)
1361
1362 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1363 #define OMAP4430_VP_CORE_OPPCHANGEDONE_ST_SHIFT                         16
1364 #define OMAP4430_VP_CORE_OPPCHANGEDONE_ST_MASK                          BITFIELD(16, 16)
1365
1366 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1367 #define OMAP4430_VP_CORE_TRANXDONE_EN_SHIFT                             21
1368 #define OMAP4430_VP_CORE_TRANXDONE_EN_MASK                              BITFIELD(21, 21)
1369
1370 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1371 #define OMAP4430_VP_CORE_TRANXDONE_ST_SHIFT                             21
1372 #define OMAP4430_VP_CORE_TRANXDONE_ST_MASK                              BITFIELD(21, 21)
1373
1374 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1375 #define OMAP4430_VP_IVA_EQVALUE_EN_SHIFT                                28
1376 #define OMAP4430_VP_IVA_EQVALUE_EN_MASK                                 BITFIELD(28, 28)
1377
1378 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1379 #define OMAP4430_VP_IVA_EQVALUE_ST_SHIFT                                28
1380 #define OMAP4430_VP_IVA_EQVALUE_ST_MASK                                 BITFIELD(28, 28)
1381
1382 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1383 #define OMAP4430_VP_IVA_MAXVDD_EN_SHIFT                                 26
1384 #define OMAP4430_VP_IVA_MAXVDD_EN_MASK                                  BITFIELD(26, 26)
1385
1386 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1387 #define OMAP4430_VP_IVA_MAXVDD_ST_SHIFT                                 26
1388 #define OMAP4430_VP_IVA_MAXVDD_ST_MASK                                  BITFIELD(26, 26)
1389
1390 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1391 #define OMAP4430_VP_IVA_MINVDD_EN_SHIFT                                 25
1392 #define OMAP4430_VP_IVA_MINVDD_EN_MASK                                  BITFIELD(25, 25)
1393
1394 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1395 #define OMAP4430_VP_IVA_MINVDD_ST_SHIFT                                 25
1396 #define OMAP4430_VP_IVA_MINVDD_ST_MASK                                  BITFIELD(25, 25)
1397
1398 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1399 #define OMAP4430_VP_IVA_NOSMPSACK_EN_SHIFT                              27
1400 #define OMAP4430_VP_IVA_NOSMPSACK_EN_MASK                               BITFIELD(27, 27)
1401
1402 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1403 #define OMAP4430_VP_IVA_NOSMPSACK_ST_SHIFT                              27
1404 #define OMAP4430_VP_IVA_NOSMPSACK_ST_MASK                               BITFIELD(27, 27)
1405
1406 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1407 #define OMAP4430_VP_IVA_OPPCHANGEDONE_EN_SHIFT                          24
1408 #define OMAP4430_VP_IVA_OPPCHANGEDONE_EN_MASK                           BITFIELD(24, 24)
1409
1410 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1411 #define OMAP4430_VP_IVA_OPPCHANGEDONE_ST_SHIFT                          24
1412 #define OMAP4430_VP_IVA_OPPCHANGEDONE_ST_MASK                           BITFIELD(24, 24)
1413
1414 /* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
1415 #define OMAP4430_VP_IVA_TRANXDONE_EN_SHIFT                              29
1416 #define OMAP4430_VP_IVA_TRANXDONE_EN_MASK                               BITFIELD(29, 29)
1417
1418 /* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
1419 #define OMAP4430_VP_IVA_TRANXDONE_ST_SHIFT                              29
1420 #define OMAP4430_VP_IVA_TRANXDONE_ST_MASK                               BITFIELD(29, 29)
1421
1422 /* Used by PRM_IRQENABLE_MPU_2 */
1423 #define OMAP4430_VP_MPU_EQVALUE_EN_SHIFT                                4
1424 #define OMAP4430_VP_MPU_EQVALUE_EN_MASK                                 BITFIELD(4, 4)
1425
1426 /* Used by PRM_IRQSTATUS_MPU_2 */
1427 #define OMAP4430_VP_MPU_EQVALUE_ST_SHIFT                                4
1428 #define OMAP4430_VP_MPU_EQVALUE_ST_MASK                                 BITFIELD(4, 4)
1429
1430 /* Used by PRM_IRQENABLE_MPU_2 */
1431 #define OMAP4430_VP_MPU_MAXVDD_EN_SHIFT                                 2
1432 #define OMAP4430_VP_MPU_MAXVDD_EN_MASK                                  BITFIELD(2, 2)
1433
1434 /* Used by PRM_IRQSTATUS_MPU_2 */
1435 #define OMAP4430_VP_MPU_MAXVDD_ST_SHIFT                                 2
1436 #define OMAP4430_VP_MPU_MAXVDD_ST_MASK                                  BITFIELD(2, 2)
1437
1438 /* Used by PRM_IRQENABLE_MPU_2 */
1439 #define OMAP4430_VP_MPU_MINVDD_EN_SHIFT                                 1
1440 #define OMAP4430_VP_MPU_MINVDD_EN_MASK                                  BITFIELD(1, 1)
1441
1442 /* Used by PRM_IRQSTATUS_MPU_2 */
1443 #define OMAP4430_VP_MPU_MINVDD_ST_SHIFT                                 1
1444 #define OMAP4430_VP_MPU_MINVDD_ST_MASK                                  BITFIELD(1, 1)
1445
1446 /* Used by PRM_IRQENABLE_MPU_2 */
1447 #define OMAP4430_VP_MPU_NOSMPSACK_EN_SHIFT                              3
1448 #define OMAP4430_VP_MPU_NOSMPSACK_EN_MASK                               BITFIELD(3, 3)
1449
1450 /* Used by PRM_IRQSTATUS_MPU_2 */
1451 #define OMAP4430_VP_MPU_NOSMPSACK_ST_SHIFT                              3
1452 #define OMAP4430_VP_MPU_NOSMPSACK_ST_MASK                               BITFIELD(3, 3)
1453
1454 /* Used by PRM_IRQENABLE_MPU_2 */
1455 #define OMAP4430_VP_MPU_OPPCHANGEDONE_EN_SHIFT                          0
1456 #define OMAP4430_VP_MPU_OPPCHANGEDONE_EN_MASK                           BITFIELD(0, 0)
1457
1458 /* Used by PRM_IRQSTATUS_MPU_2 */
1459 #define OMAP4430_VP_MPU_OPPCHANGEDONE_ST_SHIFT                          0
1460 #define OMAP4430_VP_MPU_OPPCHANGEDONE_ST_MASK                           BITFIELD(0, 0)
1461
1462 /* Used by PRM_IRQENABLE_MPU_2 */
1463 #define OMAP4430_VP_MPU_TRANXDONE_EN_SHIFT                              5
1464 #define OMAP4430_VP_MPU_TRANXDONE_EN_MASK                               BITFIELD(5, 5)
1465
1466 /* Used by PRM_IRQSTATUS_MPU_2 */
1467 #define OMAP4430_VP_MPU_TRANXDONE_ST_SHIFT                              5
1468 #define OMAP4430_VP_MPU_TRANXDONE_ST_MASK                               BITFIELD(5, 5)
1469
1470 /* Used by PRM_SRAM_COUNT */
1471 #define OMAP4430_VSETUPCNT_VALUE_SHIFT                                  8
1472 #define OMAP4430_VSETUPCNT_VALUE_MASK                                   BITFIELD(8, 15)
1473
1474 /* Used by PRM_VP_CORE_VSTEPMAX, PRM_VP_IVA_VSTEPMAX, PRM_VP_MPU_VSTEPMAX */
1475 #define OMAP4430_VSTEPMAX_SHIFT                                         0
1476 #define OMAP4430_VSTEPMAX_MASK                                          BITFIELD(0, 7)
1477
1478 /* Used by PRM_VP_CORE_VSTEPMIN, PRM_VP_IVA_VSTEPMIN, PRM_VP_MPU_VSTEPMIN */
1479 #define OMAP4430_VSTEPMIN_SHIFT                                         0
1480 #define OMAP4430_VSTEPMIN_MASK                                          BITFIELD(0, 7)
1481
1482 /* Used by PRM_MODEM_IF_CTRL */
1483 #define OMAP4430_WAKE_MODEM_SHIFT                                       0
1484 #define OMAP4430_WAKE_MODEM_MASK                                        BITFIELD(0, 0)
1485
1486 /* Used by PM_DSS_DSS_WKDEP */
1487 #define OMAP4430_WKUPDEP_DISPC_DUCATI_SHIFT                             1
1488 #define OMAP4430_WKUPDEP_DISPC_DUCATI_MASK                              BITFIELD(1, 1)
1489
1490 /* Used by PM_DSS_DSS_WKDEP */
1491 #define OMAP4430_WKUPDEP_DISPC_MPU_SHIFT                                0
1492 #define OMAP4430_WKUPDEP_DISPC_MPU_MASK                                 BITFIELD(0, 0)
1493
1494 /* Used by PM_DSS_DSS_WKDEP */
1495 #define OMAP4430_WKUPDEP_DISPC_SDMA_SHIFT                               3
1496 #define OMAP4430_WKUPDEP_DISPC_SDMA_MASK                                BITFIELD(3, 3)
1497
1498 /* Used by PM_DSS_DSS_WKDEP */
1499 #define OMAP4430_WKUPDEP_DISPC_TESLA_SHIFT                              2
1500 #define OMAP4430_WKUPDEP_DISPC_TESLA_MASK                               BITFIELD(2, 2)
1501
1502 /* Used by PM_ABE_DMIC_WKDEP */
1503 #define OMAP4430_WKUPDEP_DMIC_DMA_SDMA_SHIFT                            7
1504 #define OMAP4430_WKUPDEP_DMIC_DMA_SDMA_MASK                             BITFIELD(7, 7)
1505
1506 /* Used by PM_ABE_DMIC_WKDEP */
1507 #define OMAP4430_WKUPDEP_DMIC_DMA_TESLA_SHIFT                           6
1508 #define OMAP4430_WKUPDEP_DMIC_DMA_TESLA_MASK                            BITFIELD(6, 6)
1509
1510 /* Used by PM_ABE_DMIC_WKDEP */
1511 #define OMAP4430_WKUPDEP_DMIC_IRQ_MPU_SHIFT                             0
1512 #define OMAP4430_WKUPDEP_DMIC_IRQ_MPU_MASK                              BITFIELD(0, 0)
1513
1514 /* Used by PM_ABE_DMIC_WKDEP */
1515 #define OMAP4430_WKUPDEP_DMIC_IRQ_TESLA_SHIFT                           2
1516 #define OMAP4430_WKUPDEP_DMIC_IRQ_TESLA_MASK                            BITFIELD(2, 2)
1517
1518 /* Used by PM_L4PER_DMTIMER10_WKDEP */
1519 #define OMAP4430_WKUPDEP_DMTIMER10_MPU_SHIFT                            0
1520 #define OMAP4430_WKUPDEP_DMTIMER10_MPU_MASK                             BITFIELD(0, 0)
1521
1522 /* Used by PM_L4PER_DMTIMER11_WKDEP */
1523 #define OMAP4430_WKUPDEP_DMTIMER11_DUCATI_SHIFT                         1
1524 #define OMAP4430_WKUPDEP_DMTIMER11_DUCATI_MASK                          BITFIELD(1, 1)
1525
1526 /* Used by PM_L4PER_DMTIMER11_WKDEP */
1527 #define OMAP4430_WKUPDEP_DMTIMER11_MPU_SHIFT                            0
1528 #define OMAP4430_WKUPDEP_DMTIMER11_MPU_MASK                             BITFIELD(0, 0)
1529
1530 /* Used by PM_L4PER_DMTIMER2_WKDEP */
1531 #define OMAP4430_WKUPDEP_DMTIMER2_MPU_SHIFT                             0
1532 #define OMAP4430_WKUPDEP_DMTIMER2_MPU_MASK                              BITFIELD(0, 0)
1533
1534 /* Used by PM_L4PER_DMTIMER3_WKDEP */
1535 #define OMAP4430_WKUPDEP_DMTIMER3_DUCATI_SHIFT                          1
1536 #define OMAP4430_WKUPDEP_DMTIMER3_DUCATI_MASK                           BITFIELD(1, 1)
1537
1538 /* Used by PM_L4PER_DMTIMER3_WKDEP */
1539 #define OMAP4430_WKUPDEP_DMTIMER3_MPU_SHIFT                             0
1540 #define OMAP4430_WKUPDEP_DMTIMER3_MPU_MASK                              BITFIELD(0, 0)
1541
1542 /* Used by PM_L4PER_DMTIMER4_WKDEP */
1543 #define OMAP4430_WKUPDEP_DMTIMER4_DUCATI_SHIFT                          1
1544 #define OMAP4430_WKUPDEP_DMTIMER4_DUCATI_MASK                           BITFIELD(1, 1)
1545
1546 /* Used by PM_L4PER_DMTIMER4_WKDEP */
1547 #define OMAP4430_WKUPDEP_DMTIMER4_MPU_SHIFT                             0
1548 #define OMAP4430_WKUPDEP_DMTIMER4_MPU_MASK                              BITFIELD(0, 0)
1549
1550 /* Used by PM_L4PER_DMTIMER9_WKDEP */
1551 #define OMAP4430_WKUPDEP_DMTIMER9_DUCATI_SHIFT                          1
1552 #define OMAP4430_WKUPDEP_DMTIMER9_DUCATI_MASK                           BITFIELD(1, 1)
1553
1554 /* Used by PM_L4PER_DMTIMER9_WKDEP */
1555 #define OMAP4430_WKUPDEP_DMTIMER9_MPU_SHIFT                             0
1556 #define OMAP4430_WKUPDEP_DMTIMER9_MPU_MASK                              BITFIELD(0, 0)
1557
1558 /* Used by PM_DSS_DSS_WKDEP */
1559 #define OMAP4430_WKUPDEP_DSI1_DUCATI_SHIFT                              5
1560 #define OMAP4430_WKUPDEP_DSI1_DUCATI_MASK                               BITFIELD(5, 5)
1561
1562 /* Used by PM_DSS_DSS_WKDEP */
1563 #define OMAP4430_WKUPDEP_DSI1_MPU_SHIFT                                 4
1564 #define OMAP4430_WKUPDEP_DSI1_MPU_MASK                                  BITFIELD(4, 4)
1565
1566 /* Used by PM_DSS_DSS_WKDEP */
1567 #define OMAP4430_WKUPDEP_DSI1_SDMA_SHIFT                                7
1568 #define OMAP4430_WKUPDEP_DSI1_SDMA_MASK                                 BITFIELD(7, 7)
1569
1570 /* Used by PM_DSS_DSS_WKDEP */
1571 #define OMAP4430_WKUPDEP_DSI1_TESLA_SHIFT                               6
1572 #define OMAP4430_WKUPDEP_DSI1_TESLA_MASK                                BITFIELD(6, 6)
1573
1574 /* Used by PM_DSS_DSS_WKDEP */
1575 #define OMAP4430_WKUPDEP_DSI2_DUCATI_SHIFT                              9
1576 #define OMAP4430_WKUPDEP_DSI2_DUCATI_MASK                               BITFIELD(9, 9)
1577
1578 /* Used by PM_DSS_DSS_WKDEP */
1579 #define OMAP4430_WKUPDEP_DSI2_MPU_SHIFT                                 8
1580 #define OMAP4430_WKUPDEP_DSI2_MPU_MASK                                  BITFIELD(8, 8)
1581
1582 /* Used by PM_DSS_DSS_WKDEP */
1583 #define OMAP4430_WKUPDEP_DSI2_SDMA_SHIFT                                11
1584 #define OMAP4430_WKUPDEP_DSI2_SDMA_MASK                                 BITFIELD(11, 11)
1585
1586 /* Used by PM_DSS_DSS_WKDEP */
1587 #define OMAP4430_WKUPDEP_DSI2_TESLA_SHIFT                               10
1588 #define OMAP4430_WKUPDEP_DSI2_TESLA_MASK                                BITFIELD(10, 10)
1589
1590 /* Used by PM_WKUP_GPIO1_WKDEP */
1591 #define OMAP4430_WKUPDEP_GPIO1_IRQ1_DUCATI_SHIFT                        1
1592 #define OMAP4430_WKUPDEP_GPIO1_IRQ1_DUCATI_MASK                         BITFIELD(1, 1)
1593
1594 /* Used by PM_WKUP_GPIO1_WKDEP */
1595 #define OMAP4430_WKUPDEP_GPIO1_IRQ1_MPU_SHIFT                           0
1596 #define OMAP4430_WKUPDEP_GPIO1_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1597
1598 /* Used by PM_WKUP_GPIO1_WKDEP */
1599 #define OMAP4430_WKUPDEP_GPIO1_IRQ2_TESLA_SHIFT                         6
1600 #define OMAP4430_WKUPDEP_GPIO1_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1601
1602 /* Used by PM_L4PER_GPIO2_WKDEP */
1603 #define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI_SHIFT                        1
1604 #define OMAP4430_WKUPDEP_GPIO2_IRQ1_DUCATI_MASK                         BITFIELD(1, 1)
1605
1606 /* Used by PM_L4PER_GPIO2_WKDEP */
1607 #define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU_SHIFT                           0
1608 #define OMAP4430_WKUPDEP_GPIO2_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1609
1610 /* Used by PM_L4PER_GPIO2_WKDEP */
1611 #define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA_SHIFT                         6
1612 #define OMAP4430_WKUPDEP_GPIO2_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1613
1614 /* Used by PM_L4PER_GPIO3_WKDEP */
1615 #define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU_SHIFT                           0
1616 #define OMAP4430_WKUPDEP_GPIO3_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1617
1618 /* Used by PM_L4PER_GPIO3_WKDEP */
1619 #define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA_SHIFT                         6
1620 #define OMAP4430_WKUPDEP_GPIO3_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1621
1622 /* Used by PM_L4PER_GPIO4_WKDEP */
1623 #define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU_SHIFT                           0
1624 #define OMAP4430_WKUPDEP_GPIO4_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1625
1626 /* Used by PM_L4PER_GPIO4_WKDEP */
1627 #define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA_SHIFT                         6
1628 #define OMAP4430_WKUPDEP_GPIO4_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1629
1630 /* Used by PM_L4PER_GPIO5_WKDEP */
1631 #define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU_SHIFT                           0
1632 #define OMAP4430_WKUPDEP_GPIO5_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1633
1634 /* Used by PM_L4PER_GPIO5_WKDEP */
1635 #define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA_SHIFT                         6
1636 #define OMAP4430_WKUPDEP_GPIO5_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1637
1638 /* Used by PM_L4PER_GPIO6_WKDEP */
1639 #define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU_SHIFT                           0
1640 #define OMAP4430_WKUPDEP_GPIO6_IRQ1_MPU_MASK                            BITFIELD(0, 0)
1641
1642 /* Used by PM_L4PER_GPIO6_WKDEP */
1643 #define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA_SHIFT                         6
1644 #define OMAP4430_WKUPDEP_GPIO6_IRQ2_TESLA_MASK                          BITFIELD(6, 6)
1645
1646 /* Used by PM_DSS_DSS_WKDEP */
1647 #define OMAP4430_WKUPDEP_HDMIDMA_SDMA_SHIFT                             19
1648 #define OMAP4430_WKUPDEP_HDMIDMA_SDMA_MASK                              BITFIELD(19, 19)
1649
1650 /* Used by PM_DSS_DSS_WKDEP */
1651 #define OMAP4430_WKUPDEP_HDMIIRQ_DUCATI_SHIFT                           13
1652 #define OMAP4430_WKUPDEP_HDMIIRQ_DUCATI_MASK                            BITFIELD(13, 13)
1653
1654 /* Used by PM_DSS_DSS_WKDEP */
1655 #define OMAP4430_WKUPDEP_HDMIIRQ_MPU_SHIFT                              12
1656 #define OMAP4430_WKUPDEP_HDMIIRQ_MPU_MASK                               BITFIELD(12, 12)
1657
1658 /* Used by PM_DSS_DSS_WKDEP */
1659 #define OMAP4430_WKUPDEP_HDMIIRQ_TESLA_SHIFT                            14
1660 #define OMAP4430_WKUPDEP_HDMIIRQ_TESLA_MASK                             BITFIELD(14, 14)
1661
1662 /* Used by PM_L4PER_HECC1_WKDEP */
1663 #define OMAP4430_WKUPDEP_HECC1_MPU_SHIFT                                0
1664 #define OMAP4430_WKUPDEP_HECC1_MPU_MASK                                 BITFIELD(0, 0)
1665
1666 /* Used by PM_L4PER_HECC2_WKDEP */
1667 #define OMAP4430_WKUPDEP_HECC2_MPU_SHIFT                                0
1668 #define OMAP4430_WKUPDEP_HECC2_MPU_MASK                                 BITFIELD(0, 0)
1669
1670 /* Used by PM_L3INIT_HSI_WKDEP */
1671 #define OMAP4430_WKUPDEP_HSI_DSP_TESLA_SHIFT                            6
1672 #define OMAP4430_WKUPDEP_HSI_DSP_TESLA_MASK                             BITFIELD(6, 6)
1673
1674 /* Used by PM_L3INIT_HSI_WKDEP */
1675 #define OMAP4430_WKUPDEP_HSI_MCU_DUCATI_SHIFT                           1
1676 #define OMAP4430_WKUPDEP_HSI_MCU_DUCATI_MASK                            BITFIELD(1, 1)
1677
1678 /* Used by PM_L3INIT_HSI_WKDEP */
1679 #define OMAP4430_WKUPDEP_HSI_MCU_MPU_SHIFT                              0
1680 #define OMAP4430_WKUPDEP_HSI_MCU_MPU_MASK                               BITFIELD(0, 0)
1681
1682 /* Used by PM_L4PER_I2C1_WKDEP */
1683 #define OMAP4430_WKUPDEP_I2C1_DMA_SDMA_SHIFT                            7
1684 #define OMAP4430_WKUPDEP_I2C1_DMA_SDMA_MASK                             BITFIELD(7, 7)
1685
1686 /* Used by PM_L4PER_I2C1_WKDEP */
1687 #define OMAP4430_WKUPDEP_I2C1_IRQ_DUCATI_SHIFT                          1
1688 #define OMAP4430_WKUPDEP_I2C1_IRQ_DUCATI_MASK                           BITFIELD(1, 1)
1689
1690 /* Used by PM_L4PER_I2C1_WKDEP */
1691 #define OMAP4430_WKUPDEP_I2C1_IRQ_MPU_SHIFT                             0
1692 #define OMAP4430_WKUPDEP_I2C1_IRQ_MPU_MASK                              BITFIELD(0, 0)
1693
1694 /* Used by PM_L4PER_I2C2_WKDEP */
1695 #define OMAP4430_WKUPDEP_I2C2_DMA_SDMA_SHIFT                            7
1696 #define OMAP4430_WKUPDEP_I2C2_DMA_SDMA_MASK                             BITFIELD(7, 7)
1697
1698 /* Used by PM_L4PER_I2C2_WKDEP */
1699 #define OMAP4430_WKUPDEP_I2C2_IRQ_DUCATI_SHIFT                          1
1700 #define OMAP4430_WKUPDEP_I2C2_IRQ_DUCATI_MASK                           BITFIELD(1, 1)
1701
1702 /* Used by PM_L4PER_I2C2_WKDEP */
1703 #define OMAP4430_WKUPDEP_I2C2_IRQ_MPU_SHIFT                             0
1704 #define OMAP4430_WKUPDEP_I2C2_IRQ_MPU_MASK                              BITFIELD(0, 0)
1705
1706 /* Used by PM_L4PER_I2C3_WKDEP */
1707 #define OMAP4430_WKUPDEP_I2C3_DMA_SDMA_SHIFT                            7
1708 #define OMAP4430_WKUPDEP_I2C3_DMA_SDMA_MASK                             BITFIELD(7, 7)
1709
1710 /* Used by PM_L4PER_I2C3_WKDEP */
1711 #define OMAP4430_WKUPDEP_I2C3_IRQ_DUCATI_SHIFT                          1
1712 #define OMAP4430_WKUPDEP_I2C3_IRQ_DUCATI_MASK                           BITFIELD(1, 1)
1713
1714 /* Used by PM_L4PER_I2C3_WKDEP */
1715 #define OMAP4430_WKUPDEP_I2C3_IRQ_MPU_SHIFT                             0
1716 #define OMAP4430_WKUPDEP_I2C3_IRQ_MPU_MASK                              BITFIELD(0, 0)
1717
1718 /* Used by PM_L4PER_I2C4_WKDEP */
1719 #define OMAP4430_WKUPDEP_I2C4_DMA_SDMA_SHIFT                            7
1720 #define OMAP4430_WKUPDEP_I2C4_DMA_SDMA_MASK                             BITFIELD(7, 7)
1721
1722 /* Used by PM_L4PER_I2C4_WKDEP */
1723 #define OMAP4430_WKUPDEP_I2C4_IRQ_DUCATI_SHIFT                          1
1724 #define OMAP4430_WKUPDEP_I2C4_IRQ_DUCATI_MASK                           BITFIELD(1, 1)
1725
1726 /* Used by PM_L4PER_I2C4_WKDEP */
1727 #define OMAP4430_WKUPDEP_I2C4_IRQ_MPU_SHIFT                             0
1728 #define OMAP4430_WKUPDEP_I2C4_IRQ_MPU_MASK                              BITFIELD(0, 0)
1729
1730 /* Used by PM_L4PER_I2C5_WKDEP */
1731 #define OMAP4430_WKUPDEP_I2C5_DMA_SDMA_SHIFT                            7
1732 #define OMAP4430_WKUPDEP_I2C5_DMA_SDMA_MASK                             BITFIELD(7, 7)
1733
1734 /* Used by PM_L4PER_I2C5_WKDEP */
1735 #define OMAP4430_WKUPDEP_I2C5_IRQ_MPU_SHIFT                             0
1736 #define OMAP4430_WKUPDEP_I2C5_IRQ_MPU_MASK                              BITFIELD(0, 0)
1737
1738 /* Used by PM_WKUP_KEYBOARD_WKDEP */
1739 #define OMAP4430_WKUPDEP_KEYBOARD_MPU_SHIFT                             0
1740 #define OMAP4430_WKUPDEP_KEYBOARD_MPU_MASK                              BITFIELD(0, 0)
1741
1742 /* Used by PM_ABE_MCASP_WKDEP */
1743 #define OMAP4430_WKUPDEP_MCASP1_DMA_SDMA_SHIFT                          7
1744 #define OMAP4430_WKUPDEP_MCASP1_DMA_SDMA_MASK                           BITFIELD(7, 7)
1745
1746 /* Used by PM_ABE_MCASP_WKDEP */
1747 #define OMAP4430_WKUPDEP_MCASP1_DMA_TESLA_SHIFT                         6
1748 #define OMAP4430_WKUPDEP_MCASP1_DMA_TESLA_MASK                          BITFIELD(6, 6)
1749
1750 /* Used by PM_ABE_MCASP_WKDEP */
1751 #define OMAP4430_WKUPDEP_MCASP1_IRQ_MPU_SHIFT                           0
1752 #define OMAP4430_WKUPDEP_MCASP1_IRQ_MPU_MASK                            BITFIELD(0, 0)
1753
1754 /* Used by PM_ABE_MCASP_WKDEP */
1755 #define OMAP4430_WKUPDEP_MCASP1_IRQ_TESLA_SHIFT                         2
1756 #define OMAP4430_WKUPDEP_MCASP1_IRQ_TESLA_MASK                          BITFIELD(2, 2)
1757
1758 /* Used by PM_L4PER_MCASP2_WKDEP */
1759 #define OMAP4430_WKUPDEP_MCASP2_DMA_SDMA_SHIFT                          7
1760 #define OMAP4430_WKUPDEP_MCASP2_DMA_SDMA_MASK                           BITFIELD(7, 7)
1761
1762 /* Used by PM_L4PER_MCASP2_WKDEP */
1763 #define OMAP4430_WKUPDEP_MCASP2_DMA_TESLA_SHIFT                         6
1764 #define OMAP4430_WKUPDEP_MCASP2_DMA_TESLA_MASK                          BITFIELD(6, 6)
1765
1766 /* Used by PM_L4PER_MCASP2_WKDEP */
1767 #define OMAP4430_WKUPDEP_MCASP2_IRQ_MPU_SHIFT                           0
1768 #define OMAP4430_WKUPDEP_MCASP2_IRQ_MPU_MASK                            BITFIELD(0, 0)
1769
1770 /* Used by PM_L4PER_MCASP2_WKDEP */
1771 #define OMAP4430_WKUPDEP_MCASP2_IRQ_TESLA_SHIFT                         2
1772 #define OMAP4430_WKUPDEP_MCASP2_IRQ_TESLA_MASK                          BITFIELD(2, 2)
1773
1774 /* Used by PM_L4PER_MCASP3_WKDEP */
1775 #define OMAP4430_WKUPDEP_MCASP3_DMA_SDMA_SHIFT                          7
1776 #define OMAP4430_WKUPDEP_MCASP3_DMA_SDMA_MASK                           BITFIELD(7, 7)
1777
1778 /* Used by PM_L4PER_MCASP3_WKDEP */
1779 #define OMAP4430_WKUPDEP_MCASP3_DMA_TESLA_SHIFT                         6
1780 #define OMAP4430_WKUPDEP_MCASP3_DMA_TESLA_MASK                          BITFIELD(6, 6)
1781
1782 /* Used by PM_L4PER_MCASP3_WKDEP */
1783 #define OMAP4430_WKUPDEP_MCASP3_IRQ_MPU_SHIFT                           0
1784 #define OMAP4430_WKUPDEP_MCASP3_IRQ_MPU_MASK                            BITFIELD(0, 0)
1785
1786 /* Used by PM_L4PER_MCASP3_WKDEP */
1787 #define OMAP4430_WKUPDEP_MCASP3_IRQ_TESLA_SHIFT                         2
1788 #define OMAP4430_WKUPDEP_MCASP3_IRQ_TESLA_MASK                          BITFIELD(2, 2)
1789
1790 /* Used by PM_ABE_MCBSP1_WKDEP */
1791 #define OMAP4430_WKUPDEP_MCBSP1_MPU_SHIFT                               0
1792 #define OMAP4430_WKUPDEP_MCBSP1_MPU_MASK                                BITFIELD(0, 0)
1793
1794 /* Used by PM_ABE_MCBSP1_WKDEP */
1795 #define OMAP4430_WKUPDEP_MCBSP1_SDMA_SHIFT                              3
1796 #define OMAP4430_WKUPDEP_MCBSP1_SDMA_MASK                               BITFIELD(3, 3)
1797
1798 /* Used by PM_ABE_MCBSP1_WKDEP */
1799 #define OMAP4430_WKUPDEP_MCBSP1_TESLA_SHIFT                             2
1800 #define OMAP4430_WKUPDEP_MCBSP1_TESLA_MASK                              BITFIELD(2, 2)
1801
1802 /* Used by PM_ABE_MCBSP2_WKDEP */
1803 #define OMAP4430_WKUPDEP_MCBSP2_MPU_SHIFT                               0
1804 #define OMAP4430_WKUPDEP_MCBSP2_MPU_MASK                                BITFIELD(0, 0)
1805
1806 /* Used by PM_ABE_MCBSP2_WKDEP */
1807 #define OMAP4430_WKUPDEP_MCBSP2_SDMA_SHIFT                              3
1808 #define OMAP4430_WKUPDEP_MCBSP2_SDMA_MASK                               BITFIELD(3, 3)
1809
1810 /* Used by PM_ABE_MCBSP2_WKDEP */
1811 #define OMAP4430_WKUPDEP_MCBSP2_TESLA_SHIFT                             2
1812 #define OMAP4430_WKUPDEP_MCBSP2_TESLA_MASK                              BITFIELD(2, 2)
1813
1814 /* Used by PM_ABE_MCBSP3_WKDEP */
1815 #define OMAP4430_WKUPDEP_MCBSP3_MPU_SHIFT                               0
1816 #define OMAP4430_WKUPDEP_MCBSP3_MPU_MASK                                BITFIELD(0, 0)
1817
1818 /* Used by PM_ABE_MCBSP3_WKDEP */
1819 #define OMAP4430_WKUPDEP_MCBSP3_SDMA_SHIFT                              3
1820 #define OMAP4430_WKUPDEP_MCBSP3_SDMA_MASK                               BITFIELD(3, 3)
1821
1822 /* Used by PM_ABE_MCBSP3_WKDEP */
1823 #define OMAP4430_WKUPDEP_MCBSP3_TESLA_SHIFT                             2
1824 #define OMAP4430_WKUPDEP_MCBSP3_TESLA_MASK                              BITFIELD(2, 2)
1825
1826 /* Used by PM_L4PER_MCBSP4_WKDEP */
1827 #define OMAP4430_WKUPDEP_MCBSP4_MPU_SHIFT                               0
1828 #define OMAP4430_WKUPDEP_MCBSP4_MPU_MASK                                BITFIELD(0, 0)
1829
1830 /* Used by PM_L4PER_MCBSP4_WKDEP */
1831 #define OMAP4430_WKUPDEP_MCBSP4_SDMA_SHIFT                              3
1832 #define OMAP4430_WKUPDEP_MCBSP4_SDMA_MASK                               BITFIELD(3, 3)
1833
1834 /* Used by PM_L4PER_MCBSP4_WKDEP */
1835 #define OMAP4430_WKUPDEP_MCBSP4_TESLA_SHIFT                             2
1836 #define OMAP4430_WKUPDEP_MCBSP4_TESLA_MASK                              BITFIELD(2, 2)
1837
1838 /* Used by PM_L4PER_MCSPI1_WKDEP */
1839 #define OMAP4430_WKUPDEP_MCSPI1_DUCATI_SHIFT                            1
1840 #define OMAP4430_WKUPDEP_MCSPI1_DUCATI_MASK                             BITFIELD(1, 1)
1841
1842 /* Used by PM_L4PER_MCSPI1_WKDEP */
1843 #define OMAP4430_WKUPDEP_MCSPI1_MPU_SHIFT                               0
1844 #define OMAP4430_WKUPDEP_MCSPI1_MPU_MASK                                BITFIELD(0, 0)
1845
1846 /* Used by PM_L4PER_MCSPI1_WKDEP */
1847 #define OMAP4430_WKUPDEP_MCSPI1_SDMA_SHIFT                              3
1848 #define OMAP4430_WKUPDEP_MCSPI1_SDMA_MASK                               BITFIELD(3, 3)
1849
1850 /* Used by PM_L4PER_MCSPI1_WKDEP */
1851 #define OMAP4430_WKUPDEP_MCSPI1_TESLA_SHIFT                             2
1852 #define OMAP4430_WKUPDEP_MCSPI1_TESLA_MASK                              BITFIELD(2, 2)
1853
1854 /* Used by PM_L4PER_MCSPI2_WKDEP */
1855 #define OMAP4430_WKUPDEP_MCSPI2_DUCATI_SHIFT                            1
1856 #define OMAP4430_WKUPDEP_MCSPI2_DUCATI_MASK                             BITFIELD(1, 1)
1857
1858 /* Used by PM_L4PER_MCSPI2_WKDEP */
1859 #define OMAP4430_WKUPDEP_MCSPI2_MPU_SHIFT                               0
1860 #define OMAP4430_WKUPDEP_MCSPI2_MPU_MASK                                BITFIELD(0, 0)
1861
1862 /* Used by PM_L4PER_MCSPI2_WKDEP */
1863 #define OMAP4430_WKUPDEP_MCSPI2_SDMA_SHIFT                              3
1864 #define OMAP4430_WKUPDEP_MCSPI2_SDMA_MASK                               BITFIELD(3, 3)
1865
1866 /* Used by PM_L4PER_MCSPI3_WKDEP */
1867 #define OMAP4430_WKUPDEP_MCSPI3_MPU_SHIFT                               0
1868 #define OMAP4430_WKUPDEP_MCSPI3_MPU_MASK                                BITFIELD(0, 0)
1869
1870 /* Used by PM_L4PER_MCSPI3_WKDEP */
1871 #define OMAP4430_WKUPDEP_MCSPI3_SDMA_SHIFT                              3
1872 #define OMAP4430_WKUPDEP_MCSPI3_SDMA_MASK                               BITFIELD(3, 3)
1873
1874 /* Used by PM_L4PER_MCSPI4_WKDEP */
1875 #define OMAP4430_WKUPDEP_MCSPI4_MPU_SHIFT                               0
1876 #define OMAP4430_WKUPDEP_MCSPI4_MPU_MASK                                BITFIELD(0, 0)
1877
1878 /* Used by PM_L4PER_MCSPI4_WKDEP */
1879 #define OMAP4430_WKUPDEP_MCSPI4_SDMA_SHIFT                              3
1880 #define OMAP4430_WKUPDEP_MCSPI4_SDMA_MASK                               BITFIELD(3, 3)
1881
1882 /* Used by PM_L3INIT_MMC1_WKDEP */
1883 #define OMAP4430_WKUPDEP_MMC1_DUCATI_SHIFT                              1
1884 #define OMAP4430_WKUPDEP_MMC1_DUCATI_MASK                               BITFIELD(1, 1)
1885
1886 /* Used by PM_L3INIT_MMC1_WKDEP */
1887 #define OMAP4430_WKUPDEP_MMC1_MPU_SHIFT                                 0
1888 #define OMAP4430_WKUPDEP_MMC1_MPU_MASK                                  BITFIELD(0, 0)
1889
1890 /* Used by PM_L3INIT_MMC1_WKDEP */
1891 #define OMAP4430_WKUPDEP_MMC1_SDMA_SHIFT                                3
1892 #define OMAP4430_WKUPDEP_MMC1_SDMA_MASK                                 BITFIELD(3, 3)
1893
1894 /* Used by PM_L3INIT_MMC1_WKDEP */
1895 #define OMAP4430_WKUPDEP_MMC1_TESLA_SHIFT                               2
1896 #define OMAP4430_WKUPDEP_MMC1_TESLA_MASK                                BITFIELD(2, 2)
1897
1898 /* Used by PM_L3INIT_MMC2_WKDEP */
1899 #define OMAP4430_WKUPDEP_MMC2_DUCATI_SHIFT                              1
1900 #define OMAP4430_WKUPDEP_MMC2_DUCATI_MASK                               BITFIELD(1, 1)
1901
1902 /* Used by PM_L3INIT_MMC2_WKDEP */
1903 #define OMAP4430_WKUPDEP_MMC2_MPU_SHIFT                                 0
1904 #define OMAP4430_WKUPDEP_MMC2_MPU_MASK                                  BITFIELD(0, 0)
1905
1906 /* Used by PM_L3INIT_MMC2_WKDEP */
1907 #define OMAP4430_WKUPDEP_MMC2_SDMA_SHIFT                                3
1908 #define OMAP4430_WKUPDEP_MMC2_SDMA_MASK                                 BITFIELD(3, 3)
1909
1910 /* Used by PM_L3INIT_MMC2_WKDEP */
1911 #define OMAP4430_WKUPDEP_MMC2_TESLA_SHIFT                               2
1912 #define OMAP4430_WKUPDEP_MMC2_TESLA_MASK                                BITFIELD(2, 2)
1913
1914 /* Used by PM_L3INIT_MMC6_WKDEP */
1915 #define OMAP4430_WKUPDEP_MMC6_DUCATI_SHIFT                              1
1916 #define OMAP4430_WKUPDEP_MMC6_DUCATI_MASK                               BITFIELD(1, 1)
1917
1918 /* Used by PM_L3INIT_MMC6_WKDEP */
1919 #define OMAP4430_WKUPDEP_MMC6_MPU_SHIFT                                 0
1920 #define OMAP4430_WKUPDEP_MMC6_MPU_MASK                                  BITFIELD(0, 0)
1921
1922 /* Used by PM_L3INIT_MMC6_WKDEP */
1923 #define OMAP4430_WKUPDEP_MMC6_TESLA_SHIFT                               2
1924 #define OMAP4430_WKUPDEP_MMC6_TESLA_MASK                                BITFIELD(2, 2)
1925
1926 /* Used by PM_L4PER_MMCSD3_WKDEP */
1927 #define OMAP4430_WKUPDEP_MMCSD3_DUCATI_SHIFT                            1
1928 #define OMAP4430_WKUPDEP_MMCSD3_DUCATI_MASK                             BITFIELD(1, 1)
1929
1930 /* Used by PM_L4PER_MMCSD3_WKDEP */
1931 #define OMAP4430_WKUPDEP_MMCSD3_MPU_SHIFT                               0
1932 #define OMAP4430_WKUPDEP_MMCSD3_MPU_MASK                                BITFIELD(0, 0)
1933
1934 /* Used by PM_L4PER_MMCSD3_WKDEP */
1935 #define OMAP4430_WKUPDEP_MMCSD3_SDMA_SHIFT                              3
1936 #define OMAP4430_WKUPDEP_MMCSD3_SDMA_MASK                               BITFIELD(3, 3)
1937
1938 /* Used by PM_L4PER_MMCSD4_WKDEP */
1939 #define OMAP4430_WKUPDEP_MMCSD4_DUCATI_SHIFT                            1
1940 #define OMAP4430_WKUPDEP_MMCSD4_DUCATI_MASK                             BITFIELD(1, 1)
1941
1942 /* Used by PM_L4PER_MMCSD4_WKDEP */
1943 #define OMAP4430_WKUPDEP_MMCSD4_MPU_SHIFT                               0
1944 #define OMAP4430_WKUPDEP_MMCSD4_MPU_MASK                                BITFIELD(0, 0)
1945
1946 /* Used by PM_L4PER_MMCSD4_WKDEP */
1947 #define OMAP4430_WKUPDEP_MMCSD4_SDMA_SHIFT                              3
1948 #define OMAP4430_WKUPDEP_MMCSD4_SDMA_MASK                               BITFIELD(3, 3)
1949
1950 /* Used by PM_L4PER_MMCSD5_WKDEP */
1951 #define OMAP4430_WKUPDEP_MMCSD5_DUCATI_SHIFT                            1
1952 #define OMAP4430_WKUPDEP_MMCSD5_DUCATI_MASK                             BITFIELD(1, 1)
1953
1954 /* Used by PM_L4PER_MMCSD5_WKDEP */
1955 #define OMAP4430_WKUPDEP_MMCSD5_MPU_SHIFT                               0
1956 #define OMAP4430_WKUPDEP_MMCSD5_MPU_MASK                                BITFIELD(0, 0)
1957
1958 /* Used by PM_L4PER_MMCSD5_WKDEP */
1959 #define OMAP4430_WKUPDEP_MMCSD5_SDMA_SHIFT                              3
1960 #define OMAP4430_WKUPDEP_MMCSD5_SDMA_MASK                               BITFIELD(3, 3)
1961
1962 /* Used by PM_L3INIT_PCIESS_WKDEP */
1963 #define OMAP4430_WKUPDEP_PCIESS_MPU_SHIFT                               0
1964 #define OMAP4430_WKUPDEP_PCIESS_MPU_MASK                                BITFIELD(0, 0)
1965
1966 /* Used by PM_L3INIT_PCIESS_WKDEP */
1967 #define OMAP4430_WKUPDEP_PCIESS_TESLA_SHIFT                             2
1968 #define OMAP4430_WKUPDEP_PCIESS_TESLA_MASK                              BITFIELD(2, 2)
1969
1970 /* Used by PM_ABE_PDM_WKDEP */
1971 #define OMAP4430_WKUPDEP_PDM_DMA_SDMA_SHIFT                             7
1972 #define OMAP4430_WKUPDEP_PDM_DMA_SDMA_MASK                              BITFIELD(7, 7)
1973
1974 /* Used by PM_ABE_PDM_WKDEP */
1975 #define OMAP4430_WKUPDEP_PDM_DMA_TESLA_SHIFT                            6
1976 #define OMAP4430_WKUPDEP_PDM_DMA_TESLA_MASK                             BITFIELD(6, 6)
1977
1978 /* Used by PM_ABE_PDM_WKDEP */
1979 #define OMAP4430_WKUPDEP_PDM_IRQ_MPU_SHIFT                              0
1980 #define OMAP4430_WKUPDEP_PDM_IRQ_MPU_MASK                               BITFIELD(0, 0)
1981
1982 /* Used by PM_ABE_PDM_WKDEP */
1983 #define OMAP4430_WKUPDEP_PDM_IRQ_TESLA_SHIFT                            2
1984 #define OMAP4430_WKUPDEP_PDM_IRQ_TESLA_MASK                             BITFIELD(2, 2)
1985
1986 /* Used by PM_WKUP_RTC_WKDEP */
1987 #define OMAP4430_WKUPDEP_RTC_MPU_SHIFT                                  0
1988 #define OMAP4430_WKUPDEP_RTC_MPU_MASK                                   BITFIELD(0, 0)
1989
1990 /* Used by PM_L3INIT_SATA_WKDEP */
1991 #define OMAP4430_WKUPDEP_SATA_MPU_SHIFT                                 0
1992 #define OMAP4430_WKUPDEP_SATA_MPU_MASK                                  BITFIELD(0, 0)
1993
1994 /* Used by PM_L3INIT_SATA_WKDEP */
1995 #define OMAP4430_WKUPDEP_SATA_TESLA_SHIFT                               2
1996 #define OMAP4430_WKUPDEP_SATA_TESLA_MASK                                BITFIELD(2, 2)
1997
1998 /* Used by PM_ABE_SLIMBUS_WKDEP */
1999 #define OMAP4430_WKUPDEP_SLIMBUS1_DMA_SDMA_SHIFT                        7
2000 #define OMAP4430_WKUPDEP_SLIMBUS1_DMA_SDMA_MASK                         BITFIELD(7, 7)
2001
2002 /* Used by PM_ABE_SLIMBUS_WKDEP */
2003 #define OMAP4430_WKUPDEP_SLIMBUS1_DMA_TESLA_SHIFT                       6
2004 #define OMAP4430_WKUPDEP_SLIMBUS1_DMA_TESLA_MASK                        BITFIELD(6, 6)
2005
2006 /* Used by PM_ABE_SLIMBUS_WKDEP */
2007 #define OMAP4430_WKUPDEP_SLIMBUS1_IRQ_MPU_SHIFT                         0
2008 #define OMAP4430_WKUPDEP_SLIMBUS1_IRQ_MPU_MASK                          BITFIELD(0, 0)
2009
2010 /* Used by PM_ABE_SLIMBUS_WKDEP */
2011 #define OMAP4430_WKUPDEP_SLIMBUS1_IRQ_TESLA_SHIFT                       2
2012 #define OMAP4430_WKUPDEP_SLIMBUS1_IRQ_TESLA_MASK                        BITFIELD(2, 2)
2013
2014 /* Used by PM_L4PER_SLIMBUS2_WKDEP */
2015 #define OMAP4430_WKUPDEP_SLIMBUS2_DMA_SDMA_SHIFT                        7
2016 #define OMAP4430_WKUPDEP_SLIMBUS2_DMA_SDMA_MASK                         BITFIELD(7, 7)
2017
2018 /* Used by PM_L4PER_SLIMBUS2_WKDEP */
2019 #define OMAP4430_WKUPDEP_SLIMBUS2_DMA_TESLA_SHIFT                       6
2020 #define OMAP4430_WKUPDEP_SLIMBUS2_DMA_TESLA_MASK                        BITFIELD(6, 6)
2021
2022 /* Used by PM_L4PER_SLIMBUS2_WKDEP */
2023 #define OMAP4430_WKUPDEP_SLIMBUS2_IRQ_MPU_SHIFT                         0
2024 #define OMAP4430_WKUPDEP_SLIMBUS2_IRQ_MPU_MASK                          BITFIELD(0, 0)
2025
2026 /* Used by PM_L4PER_SLIMBUS2_WKDEP */
2027 #define OMAP4430_WKUPDEP_SLIMBUS2_IRQ_TESLA_SHIFT                       2
2028 #define OMAP4430_WKUPDEP_SLIMBUS2_IRQ_TESLA_MASK                        BITFIELD(2, 2)
2029
2030 /* Used by PM_ALWON_SR_CORE_WKDEP */
2031 #define OMAP4430_WKUPDEP_SR_CORE_DUCATI_SHIFT                           1
2032 #define OMAP4430_WKUPDEP_SR_CORE_DUCATI_MASK                            BITFIELD(1, 1)
2033
2034 /* Used by PM_ALWON_SR_CORE_WKDEP */
2035 #define OMAP4430_WKUPDEP_SR_CORE_MPU_SHIFT                              0
2036 #define OMAP4430_WKUPDEP_SR_CORE_MPU_MASK                               BITFIELD(0, 0)
2037
2038 /* Used by PM_ALWON_SR_IVA_WKDEP */
2039 #define OMAP4430_WKUPDEP_SR_IVA_DUCATI_SHIFT                            1
2040 #define OMAP4430_WKUPDEP_SR_IVA_DUCATI_MASK                             BITFIELD(1, 1)
2041
2042 /* Used by PM_ALWON_SR_IVA_WKDEP */
2043 #define OMAP4430_WKUPDEP_SR_IVA_MPU_SHIFT                               0
2044 #define OMAP4430_WKUPDEP_SR_IVA_MPU_MASK                                BITFIELD(0, 0)
2045
2046 /* Used by PM_ALWON_SR_MPU_WKDEP */
2047 #define OMAP4430_WKUPDEP_SR_MPU_MPU_SHIFT                               0
2048 #define OMAP4430_WKUPDEP_SR_MPU_MPU_MASK                                BITFIELD(0, 0)
2049
2050 /* Used by PM_WKUP_TIMER12_WKDEP */
2051 #define OMAP4430_WKUPDEP_TIMER12_MPU_SHIFT                              0
2052 #define OMAP4430_WKUPDEP_TIMER12_MPU_MASK                               BITFIELD(0, 0)
2053
2054 /* Used by PM_WKUP_TIMER1_WKDEP */
2055 #define OMAP4430_WKUPDEP_TIMER1_MPU_SHIFT                               0
2056 #define OMAP4430_WKUPDEP_TIMER1_MPU_MASK                                BITFIELD(0, 0)
2057
2058 /* Used by PM_ABE_TIMER5_WKDEP */
2059 #define OMAP4430_WKUPDEP_TIMER5_MPU_SHIFT                               0
2060 #define OMAP4430_WKUPDEP_TIMER5_MPU_MASK                                BITFIELD(0, 0)
2061
2062 /* Used by PM_ABE_TIMER5_WKDEP */
2063 #define OMAP4430_WKUPDEP_TIMER5_TESLA_SHIFT                             2
2064 #define OMAP4430_WKUPDEP_TIMER5_TESLA_MASK                              BITFIELD(2, 2)
2065
2066 /* Used by PM_ABE_TIMER6_WKDEP */
2067 #define OMAP4430_WKUPDEP_TIMER6_MPU_SHIFT                               0
2068 #define OMAP4430_WKUPDEP_TIMER6_MPU_MASK                                BITFIELD(0, 0)
2069
2070 /* Used by PM_ABE_TIMER6_WKDEP */
2071 #define OMAP4430_WKUPDEP_TIMER6_TESLA_SHIFT                             2
2072 #define OMAP4430_WKUPDEP_TIMER6_TESLA_MASK                              BITFIELD(2, 2)
2073
2074 /* Used by PM_ABE_TIMER7_WKDEP */
2075 #define OMAP4430_WKUPDEP_TIMER7_MPU_SHIFT                               0
2076 #define OMAP4430_WKUPDEP_TIMER7_MPU_MASK                                BITFIELD(0, 0)
2077
2078 /* Used by PM_ABE_TIMER7_WKDEP */
2079 #define OMAP4430_WKUPDEP_TIMER7_TESLA_SHIFT                             2
2080 #define OMAP4430_WKUPDEP_TIMER7_TESLA_MASK                              BITFIELD(2, 2)
2081
2082 /* Used by PM_ABE_TIMER8_WKDEP */
2083 #define OMAP4430_WKUPDEP_TIMER8_MPU_SHIFT                               0
2084 #define OMAP4430_WKUPDEP_TIMER8_MPU_MASK                                BITFIELD(0, 0)
2085
2086 /* Used by PM_ABE_TIMER8_WKDEP */
2087 #define OMAP4430_WKUPDEP_TIMER8_TESLA_SHIFT                             2
2088 #define OMAP4430_WKUPDEP_TIMER8_TESLA_MASK                              BITFIELD(2, 2)
2089
2090 /* Used by PM_L4PER_UART1_WKDEP */
2091 #define OMAP4430_WKUPDEP_UART1_MPU_SHIFT                                0
2092 #define OMAP4430_WKUPDEP_UART1_MPU_MASK                                 BITFIELD(0, 0)
2093
2094 /* Used by PM_L4PER_UART1_WKDEP */
2095 #define OMAP4430_WKUPDEP_UART1_SDMA_SHIFT                               3
2096 #define OMAP4430_WKUPDEP_UART1_SDMA_MASK                                BITFIELD(3, 3)
2097
2098 /* Used by PM_L4PER_UART2_WKDEP */
2099 #define OMAP4430_WKUPDEP_UART2_MPU_SHIFT                                0
2100 #define OMAP4430_WKUPDEP_UART2_MPU_MASK                                 BITFIELD(0, 0)
2101
2102 /* Used by PM_L4PER_UART2_WKDEP */
2103 #define OMAP4430_WKUPDEP_UART2_SDMA_SHIFT                               3
2104 #define OMAP4430_WKUPDEP_UART2_SDMA_MASK                                BITFIELD(3, 3)
2105
2106 /* Used by PM_L4PER_UART3_WKDEP */
2107 #define OMAP4430_WKUPDEP_UART3_DUCATI_SHIFT                             1
2108 #define OMAP4430_WKUPDEP_UART3_DUCATI_MASK                              BITFIELD(1, 1)
2109
2110 /* Used by PM_L4PER_UART3_WKDEP */
2111 #define OMAP4430_WKUPDEP_UART3_MPU_SHIFT                                0
2112 #define OMAP4430_WKUPDEP_UART3_MPU_MASK                                 BITFIELD(0, 0)
2113
2114 /* Used by PM_L4PER_UART3_WKDEP */
2115 #define OMAP4430_WKUPDEP_UART3_SDMA_SHIFT                               3
2116 #define OMAP4430_WKUPDEP_UART3_SDMA_MASK                                BITFIELD(3, 3)
2117
2118 /* Used by PM_L4PER_UART3_WKDEP */
2119 #define OMAP4430_WKUPDEP_UART3_TESLA_SHIFT                              2
2120 #define OMAP4430_WKUPDEP_UART3_TESLA_MASK                               BITFIELD(2, 2)
2121
2122 /* Used by PM_L4PER_UART4_WKDEP */
2123 #define OMAP4430_WKUPDEP_UART4_MPU_SHIFT                                0
2124 #define OMAP4430_WKUPDEP_UART4_MPU_MASK                                 BITFIELD(0, 0)
2125
2126 /* Used by PM_L4PER_UART4_WKDEP */
2127 #define OMAP4430_WKUPDEP_UART4_SDMA_SHIFT                               3
2128 #define OMAP4430_WKUPDEP_UART4_SDMA_MASK                                BITFIELD(3, 3)
2129
2130 /* Used by PM_L3INIT_UNIPRO1_WKDEP */
2131 #define OMAP4430_WKUPDEP_UNIPRO1_DUCATI_SHIFT                           1
2132 #define OMAP4430_WKUPDEP_UNIPRO1_DUCATI_MASK                            BITFIELD(1, 1)
2133
2134 /* Used by PM_L3INIT_UNIPRO1_WKDEP */
2135 #define OMAP4430_WKUPDEP_UNIPRO1_MPU_SHIFT                              0
2136 #define OMAP4430_WKUPDEP_UNIPRO1_MPU_MASK                               BITFIELD(0, 0)
2137
2138 /* Used by PM_L3INIT_USB_HOST_WKDEP */
2139 #define OMAP4430_WKUPDEP_USB_HOST_DUCATI_SHIFT                          1
2140 #define OMAP4430_WKUPDEP_USB_HOST_DUCATI_MASK                           BITFIELD(1, 1)
2141
2142 /* Used by PM_L3INIT_USB_HOST_FS_WKDEP */
2143 #define OMAP4430_WKUPDEP_USB_HOST_FS_DUCATI_SHIFT                       1
2144 #define OMAP4430_WKUPDEP_USB_HOST_FS_DUCATI_MASK                        BITFIELD(1, 1)
2145
2146 /* Used by PM_L3INIT_USB_HOST_FS_WKDEP */
2147 #define OMAP4430_WKUPDEP_USB_HOST_FS_MPU_SHIFT                          0
2148 #define OMAP4430_WKUPDEP_USB_HOST_FS_MPU_MASK                           BITFIELD(0, 0)
2149
2150 /* Used by PM_L3INIT_USB_HOST_WKDEP */
2151 #define OMAP4430_WKUPDEP_USB_HOST_MPU_SHIFT                             0
2152 #define OMAP4430_WKUPDEP_USB_HOST_MPU_MASK                              BITFIELD(0, 0)
2153
2154 /* Used by PM_L3INIT_USB_OTG_WKDEP */
2155 #define OMAP4430_WKUPDEP_USB_OTG_DUCATI_SHIFT                           1
2156 #define OMAP4430_WKUPDEP_USB_OTG_DUCATI_MASK                            BITFIELD(1, 1)
2157
2158 /* Used by PM_L3INIT_USB_OTG_WKDEP */
2159 #define OMAP4430_WKUPDEP_USB_OTG_MPU_SHIFT                              0
2160 #define OMAP4430_WKUPDEP_USB_OTG_MPU_MASK                               BITFIELD(0, 0)
2161
2162 /* Used by PM_L3INIT_USB_TLL_WKDEP */
2163 #define OMAP4430_WKUPDEP_USB_TLL_DUCATI_SHIFT                           1
2164 #define OMAP4430_WKUPDEP_USB_TLL_DUCATI_MASK                            BITFIELD(1, 1)
2165
2166 /* Used by PM_L3INIT_USB_TLL_WKDEP */
2167 #define OMAP4430_WKUPDEP_USB_TLL_MPU_SHIFT                              0
2168 #define OMAP4430_WKUPDEP_USB_TLL_MPU_MASK                               BITFIELD(0, 0)
2169
2170 /* Used by PM_WKUP_USIM_WKDEP */
2171 #define OMAP4430_WKUPDEP_USIM_MPU_SHIFT                                 0
2172 #define OMAP4430_WKUPDEP_USIM_MPU_MASK                                  BITFIELD(0, 0)
2173
2174 /* Used by PM_WKUP_USIM_WKDEP */
2175 #define OMAP4430_WKUPDEP_USIM_SDMA_SHIFT                                3
2176 #define OMAP4430_WKUPDEP_USIM_SDMA_MASK                                 BITFIELD(3, 3)
2177
2178 /* Used by PM_WKUP_WDT2_WKDEP */
2179 #define OMAP4430_WKUPDEP_WDT2_DUCATI_SHIFT                              1
2180 #define OMAP4430_WKUPDEP_WDT2_DUCATI_MASK                               BITFIELD(1, 1)
2181
2182 /* Used by PM_WKUP_WDT2_WKDEP */
2183 #define OMAP4430_WKUPDEP_WDT2_MPU_SHIFT                                 0
2184 #define OMAP4430_WKUPDEP_WDT2_MPU_MASK                                  BITFIELD(0, 0)
2185
2186 /* Used by PM_ABE_WDT3_WKDEP */
2187 #define OMAP4430_WKUPDEP_WDT3_MPU_SHIFT                                 0
2188 #define OMAP4430_WKUPDEP_WDT3_MPU_MASK                                  BITFIELD(0, 0)
2189
2190 /* Used by PM_L3INIT_HSI_WKDEP */
2191 #define OMAP4430_WKUPDEP_WGM_HSI_WAKE_MPU_SHIFT                         8
2192 #define OMAP4430_WKUPDEP_WGM_HSI_WAKE_MPU_MASK                          BITFIELD(8, 8)
2193
2194 /* Used by PM_L3INIT_XHPI_WKDEP */
2195 #define OMAP4430_WKUPDEP_XHPI_DUCATI_SHIFT                              1
2196 #define OMAP4430_WKUPDEP_XHPI_DUCATI_MASK                               BITFIELD(1, 1)
2197
2198 /* Used by PRM_IO_PMCTRL */
2199 #define OMAP4430_WUCLK_CTRL_SHIFT                                       8
2200 #define OMAP4430_WUCLK_CTRL_MASK                                        BITFIELD(8, 8)
2201
2202 /* Used by PRM_IO_PMCTRL */
2203 #define OMAP4430_WUCLK_STATUS_SHIFT                                     9
2204 #define OMAP4430_WUCLK_STATUS_MASK                                      BITFIELD(9, 9)
2205 #endif