OMAP3+: OPP: Replace voltage values with Macros
[pandora-kernel.git] / arch / arm / mach-omap2 / opp3xxx_data.c
1 /*
2  * OMAP3 OPP table definitions.
3  *
4  * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/
5  *      Nishanth Menon
6  *      Kevin Hilman
7  * Copyright (C) 2010-2011 Nokia Corporation.
8  *      Eduardo Valentin
9  *      Paul Walmsley
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
16  * kind, whether express or implied; without even the implied warranty
17  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  */
20 #include <linux/module.h>
21
22 #include <plat/cpu.h>
23
24 #include "control.h"
25 #include "omap_opp_data.h"
26
27 /* 34xx */
28
29 /* VDD1 */
30
31 #define OMAP3430_VDD_MPU_OPP1_UV                975000
32 #define OMAP3430_VDD_MPU_OPP2_UV                1075000
33 #define OMAP3430_VDD_MPU_OPP3_UV                1200000
34 #define OMAP3430_VDD_MPU_OPP4_UV                1270000
35 #define OMAP3430_VDD_MPU_OPP5_UV                1350000
36
37 struct omap_volt_data omap34xx_vddmpu_volt_data[] = {
38         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c),
39         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c),
40         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18),
41         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18),
42         VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18),
43         VOLT_DATA_DEFINE(0, 0, 0, 0),
44 };
45
46 /* VDD2 */
47
48 #define OMAP3430_VDD_CORE_OPP1_UV               975000
49 #define OMAP3430_VDD_CORE_OPP2_UV               1050000
50 #define OMAP3430_VDD_CORE_OPP3_UV               1150000
51
52 struct omap_volt_data omap34xx_vddcore_volt_data[] = {
53         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c),
54         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c),
55         VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18),
56         VOLT_DATA_DEFINE(0, 0, 0, 0),
57 };
58
59 /* 36xx */
60
61 /* VDD1 */
62
63 #define OMAP3630_VDD_MPU_OPP50_UV               1012500
64 #define OMAP3630_VDD_MPU_OPP100_UV              1200000
65 #define OMAP3630_VDD_MPU_OPP120_UV              1325000
66 #define OMAP3630_VDD_MPU_OPP1G_UV               1375000
67
68 struct omap_volt_data omap36xx_vddmpu_volt_data[] = {
69         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c),
70         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16),
71         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23),
72         VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27),
73         VOLT_DATA_DEFINE(0, 0, 0, 0),
74 };
75
76 /* VDD2 */
77
78 #define OMAP3630_VDD_CORE_OPP50_UV              1000000
79 #define OMAP3630_VDD_CORE_OPP100_UV             1200000
80
81 struct omap_volt_data omap36xx_vddcore_volt_data[] = {
82         VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c),
83         VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16),
84         VOLT_DATA_DEFINE(0, 0, 0, 0),
85 };
86
87 /* OPP data */
88
89 static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
90         /* MPU OPP1 */
91         OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
92         /* MPU OPP2 */
93         OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
94         /* MPU OPP3 */
95         OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
96         /* MPU OPP4 */
97         OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
98         /* MPU OPP5 */
99         OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
100
101         /*
102          * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
103          * almost the same than the one at 83MHz thus providing very little
104          * gain for the power point of view. In term of energy it will even
105          * increase the consumption due to the very negative performance
106          * impact that frequency will do to the MPU and the whole system in
107          * general.
108          */
109         OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),
110         /* L3 OPP2 */
111         OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),
112         /* L3 OPP3 */
113         OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),
114
115         /* DSP OPP1 */
116         OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),
117         /* DSP OPP2 */
118         OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),
119         /* DSP OPP3 */
120         OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),
121         /* DSP OPP4 */
122         OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),
123         /* DSP OPP5 */
124         OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),
125 };
126
127 static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
128         /* MPU OPP1 - OPP50 */
129         OPP_INITIALIZER("mpu", true,  300000000, OMAP3630_VDD_MPU_OPP50_UV),
130         /* MPU OPP2 - OPP100 */
131         OPP_INITIALIZER("mpu", true,  600000000, OMAP3630_VDD_MPU_OPP100_UV),
132         /* MPU OPP3 - OPP-Turbo */
133         OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),
134         /* MPU OPP4 - OPP-SB */
135         OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),
136
137         /* L3 OPP1 - OPP50 */
138         OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),
139         /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
140         OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),
141
142         /* DSP OPP1 - OPP50 */
143         OPP_INITIALIZER("iva", true,  260000000, OMAP3630_VDD_MPU_OPP50_UV),
144         /* DSP OPP2 - OPP100 */
145         OPP_INITIALIZER("iva", true,  520000000, OMAP3630_VDD_MPU_OPP100_UV),
146         /* DSP OPP3 - OPP-Turbo */
147         OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),
148         /* DSP OPP4 - OPP-SB */
149         OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
150 };
151
152 /**
153  * omap3_opp_init() - initialize omap3 opp table
154  */
155 static int __init omap3_opp_init(void)
156 {
157         int r = -ENODEV;
158
159         if (!cpu_is_omap34xx())
160                 return r;
161
162         if (cpu_is_omap3630())
163                 r = omap_init_opp_table(omap36xx_opp_def_list,
164                         ARRAY_SIZE(omap36xx_opp_def_list));
165         else
166                 r = omap_init_opp_table(omap34xx_opp_def_list,
167                         ARRAY_SIZE(omap34xx_opp_def_list));
168
169         return r;
170 }
171 device_initcall(omap3_opp_init);