2 * linux/arch/arm/mach-omap2/mcbsp.c
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Multichannel mode not supported.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
18 #include <linux/platform_device.h>
19 #include <linux/slab.h>
21 #include <mach/irqs.h>
24 #include <plat/mcbsp.h>
29 /* McBSP internal signal muxing functions */
31 void omap2_mcbsp1_mux_clkr_src(u8 mux)
35 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
36 if (mux == CLKR_SRC_CLKR)
37 v &= ~OMAP2_MCBSP1_CLKR_MASK;
38 else if (mux == CLKR_SRC_CLKX)
39 v |= OMAP2_MCBSP1_CLKR_MASK;
40 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
42 EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src);
44 void omap2_mcbsp1_mux_fsr_src(u8 mux)
48 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
49 if (mux == FSR_SRC_FSR)
50 v &= ~OMAP2_MCBSP1_FSR_MASK;
51 else if (mux == FSR_SRC_FSX)
52 v |= OMAP2_MCBSP1_FSR_MASK;
53 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
55 EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src);
57 /* McBSP CLKS source switching function */
59 int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
61 struct omap_mcbsp *mcbsp;
66 if (!omap_mcbsp_check_valid_id(id)) {
67 pr_err("%s: Invalid id (%d)\n", __func__, id + 1);
70 mcbsp = id_to_mcbsp_ptr(id);
72 if (fck_src_id == MCBSP_CLKS_PAD_SRC)
73 fck_src_name = "pad_fck";
74 else if (fck_src_id == MCBSP_CLKS_PRCM_SRC)
75 fck_src_name = "prcm_fck";
79 fck_src = clk_get(mcbsp->dev, fck_src_name);
80 if (IS_ERR_OR_NULL(fck_src)) {
81 pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks",
86 clk_disable(mcbsp->fclk);
88 r = clk_set_parent(mcbsp->fclk, fck_src);
89 if (IS_ERR_VALUE(r)) {
90 pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n",
91 "clks", fck_src_name);
96 clk_enable(mcbsp->fclk);
102 EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
107 #ifdef CONFIG_SOC_OMAP2420
108 struct resource omap2420_mcbsp_res[][6] = {
111 .start = OMAP24XX_MCBSP1_BASE,
112 .end = OMAP24XX_MCBSP1_BASE + SZ_256,
113 .flags = IORESOURCE_MEM,
117 .start = INT_24XX_MCBSP1_IRQ_RX,
118 .flags = IORESOURCE_IRQ,
122 .start = INT_24XX_MCBSP1_IRQ_TX,
123 .flags = IORESOURCE_IRQ,
127 .start = OMAP24XX_DMA_MCBSP1_RX,
128 .flags = IORESOURCE_DMA,
132 .start = OMAP24XX_DMA_MCBSP1_TX,
133 .flags = IORESOURCE_DMA,
138 .start = OMAP24XX_MCBSP2_BASE,
139 .end = OMAP24XX_MCBSP2_BASE + SZ_256,
140 .flags = IORESOURCE_MEM,
144 .start = INT_24XX_MCBSP2_IRQ_RX,
145 .flags = IORESOURCE_IRQ,
149 .start = INT_24XX_MCBSP2_IRQ_TX,
150 .flags = IORESOURCE_IRQ,
154 .start = OMAP24XX_DMA_MCBSP2_RX,
155 .flags = IORESOURCE_DMA,
159 .start = OMAP24XX_DMA_MCBSP2_TX,
160 .flags = IORESOURCE_DMA,
164 #define OMAP2420_MCBSP_RES_SZ ARRAY_SIZE(omap2420_mcbsp_res[1])
165 #define OMAP2420_MCBSP_COUNT ARRAY_SIZE(omap2420_mcbsp_res)
167 #define omap2420_mcbsp_res NULL
168 #define OMAP2420_MCBSP_RES_SZ 0
169 #define OMAP2420_MCBSP_COUNT 0
172 #define omap2420_mcbsp_pdata NULL
174 #ifdef CONFIG_SOC_OMAP2430
175 struct resource omap2430_mcbsp_res[][6] = {
178 .start = OMAP24XX_MCBSP1_BASE,
179 .end = OMAP24XX_MCBSP1_BASE + SZ_256,
180 .flags = IORESOURCE_MEM,
184 .start = INT_24XX_MCBSP1_IRQ_RX,
185 .flags = IORESOURCE_IRQ,
189 .start = INT_24XX_MCBSP1_IRQ_TX,
190 .flags = IORESOURCE_IRQ,
194 .start = OMAP24XX_DMA_MCBSP1_RX,
195 .flags = IORESOURCE_DMA,
199 .start = OMAP24XX_DMA_MCBSP1_TX,
200 .flags = IORESOURCE_DMA,
205 .start = OMAP24XX_MCBSP2_BASE,
206 .end = OMAP24XX_MCBSP2_BASE + SZ_256,
207 .flags = IORESOURCE_MEM,
211 .start = INT_24XX_MCBSP2_IRQ_RX,
212 .flags = IORESOURCE_IRQ,
216 .start = INT_24XX_MCBSP2_IRQ_TX,
217 .flags = IORESOURCE_IRQ,
221 .start = OMAP24XX_DMA_MCBSP2_RX,
222 .flags = IORESOURCE_DMA,
226 .start = OMAP24XX_DMA_MCBSP2_TX,
227 .flags = IORESOURCE_DMA,
232 .start = OMAP2430_MCBSP3_BASE,
233 .end = OMAP2430_MCBSP3_BASE + SZ_256,
234 .flags = IORESOURCE_MEM,
238 .start = INT_24XX_MCBSP3_IRQ_RX,
239 .flags = IORESOURCE_IRQ,
243 .start = INT_24XX_MCBSP3_IRQ_TX,
244 .flags = IORESOURCE_IRQ,
248 .start = OMAP24XX_DMA_MCBSP3_RX,
249 .flags = IORESOURCE_DMA,
253 .start = OMAP24XX_DMA_MCBSP3_TX,
254 .flags = IORESOURCE_DMA,
259 .start = OMAP2430_MCBSP4_BASE,
260 .end = OMAP2430_MCBSP4_BASE + SZ_256,
261 .flags = IORESOURCE_MEM,
265 .start = INT_24XX_MCBSP4_IRQ_RX,
266 .flags = IORESOURCE_IRQ,
270 .start = INT_24XX_MCBSP4_IRQ_TX,
271 .flags = IORESOURCE_IRQ,
275 .start = OMAP24XX_DMA_MCBSP4_RX,
276 .flags = IORESOURCE_DMA,
280 .start = OMAP24XX_DMA_MCBSP4_TX,
281 .flags = IORESOURCE_DMA,
286 .start = OMAP2430_MCBSP5_BASE,
287 .end = OMAP2430_MCBSP5_BASE + SZ_256,
288 .flags = IORESOURCE_MEM,
292 .start = INT_24XX_MCBSP5_IRQ_RX,
293 .flags = IORESOURCE_IRQ,
297 .start = INT_24XX_MCBSP5_IRQ_TX,
298 .flags = IORESOURCE_IRQ,
302 .start = OMAP24XX_DMA_MCBSP5_RX,
303 .flags = IORESOURCE_DMA,
307 .start = OMAP24XX_DMA_MCBSP5_TX,
308 .flags = IORESOURCE_DMA,
312 #define OMAP2430_MCBSP_RES_SZ ARRAY_SIZE(omap2430_mcbsp_res[1])
313 #define OMAP2430_MCBSP_COUNT ARRAY_SIZE(omap2430_mcbsp_res)
315 #define omap2430_mcbsp_res NULL
316 #define OMAP2430_MCBSP_RES_SZ 0
317 #define OMAP2430_MCBSP_COUNT 0
320 #define omap2430_mcbsp_pdata NULL
322 #ifdef CONFIG_ARCH_OMAP3
323 struct resource omap34xx_mcbsp_res[][7] = {
326 .start = OMAP34XX_MCBSP1_BASE,
327 .end = OMAP34XX_MCBSP1_BASE + SZ_256,
328 .flags = IORESOURCE_MEM,
332 .start = INT_24XX_MCBSP1_IRQ_RX,
333 .flags = IORESOURCE_IRQ,
337 .start = INT_24XX_MCBSP1_IRQ_TX,
338 .flags = IORESOURCE_IRQ,
342 .start = OMAP24XX_DMA_MCBSP1_RX,
343 .flags = IORESOURCE_DMA,
347 .start = OMAP24XX_DMA_MCBSP1_TX,
348 .flags = IORESOURCE_DMA,
353 .start = OMAP34XX_MCBSP2_BASE,
354 .end = OMAP34XX_MCBSP2_BASE + SZ_256,
355 .flags = IORESOURCE_MEM,
359 .start = OMAP34XX_MCBSP2_ST_BASE,
360 .end = OMAP34XX_MCBSP2_ST_BASE + SZ_256,
361 .flags = IORESOURCE_MEM,
365 .start = INT_24XX_MCBSP2_IRQ_RX,
366 .flags = IORESOURCE_IRQ,
370 .start = INT_24XX_MCBSP2_IRQ_TX,
371 .flags = IORESOURCE_IRQ,
375 .start = OMAP24XX_DMA_MCBSP2_RX,
376 .flags = IORESOURCE_DMA,
380 .start = OMAP24XX_DMA_MCBSP2_TX,
381 .flags = IORESOURCE_DMA,
386 .start = OMAP34XX_MCBSP3_BASE,
387 .end = OMAP34XX_MCBSP3_BASE + SZ_256,
388 .flags = IORESOURCE_MEM,
392 .start = OMAP34XX_MCBSP3_ST_BASE,
393 .end = OMAP34XX_MCBSP3_ST_BASE + SZ_256,
394 .flags = IORESOURCE_MEM,
398 .start = INT_24XX_MCBSP3_IRQ_RX,
399 .flags = IORESOURCE_IRQ,
403 .start = INT_24XX_MCBSP3_IRQ_TX,
404 .flags = IORESOURCE_IRQ,
408 .start = OMAP24XX_DMA_MCBSP3_RX,
409 .flags = IORESOURCE_DMA,
413 .start = OMAP24XX_DMA_MCBSP3_TX,
414 .flags = IORESOURCE_DMA,
419 .start = OMAP34XX_MCBSP4_BASE,
420 .end = OMAP34XX_MCBSP4_BASE + SZ_256,
421 .flags = IORESOURCE_MEM,
425 .start = INT_24XX_MCBSP4_IRQ_RX,
426 .flags = IORESOURCE_IRQ,
430 .start = INT_24XX_MCBSP4_IRQ_TX,
431 .flags = IORESOURCE_IRQ,
435 .start = OMAP24XX_DMA_MCBSP4_RX,
436 .flags = IORESOURCE_DMA,
440 .start = OMAP24XX_DMA_MCBSP4_TX,
441 .flags = IORESOURCE_DMA,
446 .start = OMAP34XX_MCBSP5_BASE,
447 .end = OMAP34XX_MCBSP5_BASE + SZ_256,
448 .flags = IORESOURCE_MEM,
452 .start = INT_24XX_MCBSP5_IRQ_RX,
453 .flags = IORESOURCE_IRQ,
457 .start = INT_24XX_MCBSP5_IRQ_TX,
458 .flags = IORESOURCE_IRQ,
462 .start = OMAP24XX_DMA_MCBSP5_RX,
463 .flags = IORESOURCE_DMA,
467 .start = OMAP24XX_DMA_MCBSP5_TX,
468 .flags = IORESOURCE_DMA,
473 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
475 .buffer_size = 0x80, /* The FIFO has 128 locations */
478 .buffer_size = 0x500, /* The FIFO has 1024 + 256 locations */
481 .buffer_size = 0x80, /* The FIFO has 128 locations */
484 .buffer_size = 0x80, /* The FIFO has 128 locations */
487 .buffer_size = 0x80, /* The FIFO has 128 locations */
490 #define OMAP34XX_MCBSP_RES_SZ ARRAY_SIZE(omap34xx_mcbsp_res[1])
491 #define OMAP34XX_MCBSP_COUNT ARRAY_SIZE(omap34xx_mcbsp_res)
493 #define omap34xx_mcbsp_pdata NULL
494 #define omap34XX_mcbsp_res NULL
495 #define OMAP34XX_MCBSP_RES_SZ 0
496 #define OMAP34XX_MCBSP_COUNT 0
499 struct resource omap44xx_mcbsp_res[][6] = {
503 .start = OMAP44XX_MCBSP1_BASE,
504 .end = OMAP44XX_MCBSP1_BASE + SZ_256,
505 .flags = IORESOURCE_MEM,
509 .start = OMAP44XX_MCBSP1_DMA_BASE,
510 .end = OMAP44XX_MCBSP1_DMA_BASE + SZ_256,
511 .flags = IORESOURCE_MEM,
516 .flags = IORESOURCE_IRQ,
520 .start = OMAP44XX_IRQ_MCBSP1,
521 .flags = IORESOURCE_IRQ,
525 .start = OMAP44XX_DMA_MCBSP1_RX,
526 .flags = IORESOURCE_DMA,
530 .start = OMAP44XX_DMA_MCBSP1_TX,
531 .flags = IORESOURCE_DMA,
537 .start = OMAP44XX_MCBSP2_BASE,
538 .end = OMAP44XX_MCBSP2_BASE + SZ_256,
539 .flags = IORESOURCE_MEM,
543 .start = OMAP44XX_MCBSP2_DMA_BASE,
544 .end = OMAP44XX_MCBSP2_DMA_BASE + SZ_256,
545 .flags = IORESOURCE_MEM,
550 .flags = IORESOURCE_IRQ,
554 .start = OMAP44XX_IRQ_MCBSP2,
555 .flags = IORESOURCE_IRQ,
559 .start = OMAP44XX_DMA_MCBSP2_RX,
560 .flags = IORESOURCE_DMA,
564 .start = OMAP44XX_DMA_MCBSP2_TX,
565 .flags = IORESOURCE_DMA,
571 .start = OMAP44XX_MCBSP3_BASE,
572 .end = OMAP44XX_MCBSP3_BASE + SZ_256,
573 .flags = IORESOURCE_MEM,
577 .start = OMAP44XX_MCBSP3_DMA_BASE,
578 .end = OMAP44XX_MCBSP3_DMA_BASE + SZ_256,
579 .flags = IORESOURCE_MEM,
584 .flags = IORESOURCE_IRQ,
588 .start = OMAP44XX_IRQ_MCBSP3,
589 .flags = IORESOURCE_IRQ,
593 .start = OMAP44XX_DMA_MCBSP3_RX,
594 .flags = IORESOURCE_DMA,
598 .start = OMAP44XX_DMA_MCBSP3_TX,
599 .flags = IORESOURCE_DMA,
604 .start = OMAP44XX_MCBSP4_BASE,
605 .end = OMAP44XX_MCBSP4_BASE + SZ_256,
606 .flags = IORESOURCE_MEM,
611 .flags = IORESOURCE_IRQ,
615 .start = OMAP44XX_IRQ_MCBSP4,
616 .flags = IORESOURCE_IRQ,
620 .start = OMAP44XX_DMA_MCBSP4_RX,
621 .flags = IORESOURCE_DMA,
625 .start = OMAP44XX_DMA_MCBSP4_TX,
626 .flags = IORESOURCE_DMA,
630 #define omap44xx_mcbsp_pdata NULL
631 #define OMAP44XX_MCBSP_RES_SZ ARRAY_SIZE(omap44xx_mcbsp_res[1])
632 #define OMAP44XX_MCBSP_COUNT ARRAY_SIZE(omap44xx_mcbsp_res)
634 static int __init omap2_mcbsp_init(void)
636 if (cpu_is_omap2420())
637 omap_mcbsp_count = OMAP2420_MCBSP_COUNT;
638 else if (cpu_is_omap2430())
639 omap_mcbsp_count = OMAP2430_MCBSP_COUNT;
640 else if (cpu_is_omap34xx())
641 omap_mcbsp_count = OMAP34XX_MCBSP_COUNT;
642 else if (cpu_is_omap44xx())
643 omap_mcbsp_count = OMAP44XX_MCBSP_COUNT;
645 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
650 if (cpu_is_omap2420())
651 omap_mcbsp_register_board_cfg(omap2420_mcbsp_res[0],
652 OMAP2420_MCBSP_RES_SZ,
653 omap2420_mcbsp_pdata,
654 OMAP2420_MCBSP_COUNT);
655 if (cpu_is_omap2430())
656 omap_mcbsp_register_board_cfg(omap2430_mcbsp_res[0],
657 OMAP2420_MCBSP_RES_SZ,
658 omap2430_mcbsp_pdata,
659 OMAP2430_MCBSP_COUNT);
660 if (cpu_is_omap34xx())
661 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_res[0],
662 OMAP34XX_MCBSP_RES_SZ,
663 omap34xx_mcbsp_pdata,
664 OMAP34XX_MCBSP_COUNT);
665 if (cpu_is_omap44xx())
666 omap_mcbsp_register_board_cfg(omap44xx_mcbsp_res[0],
667 OMAP44XX_MCBSP_RES_SZ,
668 omap44xx_mcbsp_pdata,
669 OMAP44XX_MCBSP_COUNT);
671 return omap_mcbsp_init();
673 arch_initcall(omap2_mcbsp_init);