arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009-11 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <plat/common.h>
  25 #include <plat/cpu.h>
  26
  27 #include <mach/id.h>
  28
  29 #include "control.h"
  30
  31 static struct omap_chip_id omap_chip;
  32 static unsigned int omap_revision;
  33
  34 u32 omap_features;
  35
  36 unsigned int omap_rev(void)
  37 {
  38         return omap_revision;
  39 }
  40 EXPORT_SYMBOL(omap_rev);
  41
  42 /**
  43  * omap_chip_is - test whether currently running OMAP matches a chip type
  44  * @oc: omap_chip_t to test against
  45  *
  46  * Test whether the currently-running OMAP chip matches the supplied
  47  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  48  */
  49 int omap_chip_is(struct omap_chip_id oci)
  50 {
  51         return (oci.oc & omap_chip.oc) ? 1 : 0;
  52 }
  53 EXPORT_SYMBOL(omap_chip_is);
  54
  55 int omap_type(void)
  56 {
  57         u32 val = 0;
  58
  59         if (cpu_is_omap24xx()) {
  60                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  61         } else if (cpu_is_omap34xx()) {
  62                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  63         } else if (cpu_is_omap44xx()) {
  64                 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
  65         } else {
  66                 pr_err("Cannot detect omap type!\n");
  67                 goto out;
  68         }
  69
  70         val &= OMAP2_DEVICETYPE_MASK;
  71         val >>= 8;
  72
  73 out:
  74         return val;
  75 }
  76 EXPORT_SYMBOL(omap_type);
  77
  78
  79 /*----------------------------------------------------------------------------*/
  80
  81 #define OMAP_TAP_IDCODE         0x0204
  82 #define OMAP_TAP_DIE_ID_0       0x0218
  83 #define OMAP_TAP_DIE_ID_1       0x021C
  84 #define OMAP_TAP_DIE_ID_2       0x0220
  85 #define OMAP_TAP_DIE_ID_3       0x0224
  86
  87 #define OMAP_TAP_DIE_ID_44XX_0  0x0200
  88 #define OMAP_TAP_DIE_ID_44XX_1  0x0208
  89 #define OMAP_TAP_DIE_ID_44XX_2  0x020c
  90 #define OMAP_TAP_DIE_ID_44XX_3  0x0210
  91
  92 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  93
  94 struct omap_id {
  95         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  96         u8      dev;            /* Device type from production_id reg */
  97         u32     type;           /* Combined type id copied to omap_revision */
  98 };
  99
 100 /* Register values to detect the OMAP version */
 101 static struct omap_id omap_ids[] __initdata = {
 102         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
 103         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
 104         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
 105         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
 106         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
 107         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
 108 };
 109
 110 static void __iomem *tap_base;
 111 static u16 tap_prod_id;
 112
 113 void omap_get_die_id(struct omap_die_id *odi)
 114 {
 115         if (cpu_is_omap44xx()) {
 116                 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
 117                 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
 118                 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);
 119                 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_3);
 120
 121                 return;
 122         }
 123         odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
 124         odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
 125         odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
 126         odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
 127 }
 128
 129 static void __init omap24xx_check_revision(void)
 130 {
 131         int i, j;
 132         u32 idcode, prod_id;
 133         u16 hawkeye;
 134         u8  dev_type, rev;
 135         struct omap_die_id odi;
 136
 137         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 138         prod_id = read_tap_reg(tap_prod_id);
 139         hawkeye = (idcode >> 12) & 0xffff;
 140         rev = (idcode >> 28) & 0x0f;
 141         dev_type = (prod_id >> 16) & 0x0f;
 142         omap_get_die_id(&odi);
 143
 144         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 145                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 146         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
 147         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 148                  odi.id_1, (odi.id_1 >> 28) & 0xf);
 149         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
 150         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
 151         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 152                  prod_id, dev_type);
 153
 154         /* Check hawkeye ids */
 155         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 156                 if (hawkeye == omap_ids[i].hawkeye)
 157                         break;
 158         }
 159
 160         if (i == ARRAY_SIZE(omap_ids)) {
 161                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 162                 return;
 163         }
 164
 165         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 166                 if (dev_type == omap_ids[j].dev)
 167                         break;
 168         }
 169
 170         if (j == ARRAY_SIZE(omap_ids)) {
 171                 printk(KERN_ERR "Unknown OMAP device type. "
 172                                 "Handling it as OMAP%04x\n",
 173                                 omap_ids[i].type >> 16);
 174                 j = i;
 175         }
 176
 177         pr_info("OMAP%04x", omap_rev() >> 16);
 178         if ((omap_rev() >> 8) & 0x0f)
 179                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 180         pr_info("\n");
 181 }
 182
 183 #define OMAP3_CHECK_FEATURE(status,feat)                                \
 184         if (((status & OMAP3_ ##feat## _MASK)                           \
 185                 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) {   \
 186                 omap_features |= OMAP3_HAS_ ##feat;                     \
 187         }
 188
 189 static void __init omap3_check_features(void)
 190 {
 191         u32 status;
 192
 193         omap_features = 0;
 194
 195         status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
 196
 197         OMAP3_CHECK_FEATURE(status, L2CACHE);
 198         OMAP3_CHECK_FEATURE(status, IVA);
 199         OMAP3_CHECK_FEATURE(status, SGX);
 200         OMAP3_CHECK_FEATURE(status, NEON);
 201         OMAP3_CHECK_FEATURE(status, ISP);
 202         if (cpu_is_omap3630())
 203                 omap_features |= OMAP3_HAS_192MHZ_CLK;
 204         if (cpu_is_omap3430() || cpu_is_omap3630())
 205                 omap_features |= OMAP3_HAS_IO_WAKEUP;
 206         if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
 207             omap_rev() == OMAP3430_REV_ES3_1_2)
 208                 omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
 209
 210         omap_features |= OMAP3_HAS_SDRC;
 211
 212         /*
 213          * TODO: Get additional info (where applicable)
 214          *       e.g. Size of L2 cache.
 215          */
 216 }
 217
 218 static void __init omap4_check_features(void)
 219 {
 220         u32 si_type;
 221
 222         if (cpu_is_omap443x())
 223                 omap_features |= OMAP4_HAS_MPU_1GHZ;
 224
 225
 226         if (cpu_is_omap446x()) {
 227                 si_type =
 228                         read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
 229                 switch ((si_type & (3 << 16)) >> 16) {
 230                 case 2:
 231                         /* High performance device */
 232                         omap_features |= OMAP4_HAS_MPU_1_5GHZ;
 233                         break;
 234                 case 1:
 235                 default:
 236                         /* Standard device */
 237                         omap_features |= OMAP4_HAS_MPU_1_2GHZ;
 238                         break;
 239                 }
 240         }
 241 }
 242
 243 static void __init ti816x_check_features(void)
 244 {
 245         omap_features = OMAP3_HAS_NEON;
 246 }
 247
 248 static void __init omap3_check_revision(void)
 249 {
 250         u32 cpuid, idcode;
 251         u16 hawkeye;
 252         u8 rev;
 253
 254         omap_chip.oc = CHIP_IS_OMAP3430;
 255
 256         /*
 257          * We cannot access revision registers on ES1.0.
 258          * If the processor type is Cortex-A8 and the revision is 0x0
 259          * it means its Cortex r0p0 which is 3430 ES1.0.
 260          */
 261         cpuid = read_cpuid(CPUID_ID);
 262         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 263                 omap_revision = OMAP3430_REV_ES1_0;
 264                 omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 265                 return;
 266         }
 267
 268         /*
 269          * Detection for 34xx ES2.0 and above can be done with just
 270          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 271          * Note that rev does not map directly to our defined processor
 272          * revision numbers as ES1.0 uses value 0.
 273          */
 274         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 275         hawkeye = (idcode >> 12) & 0xffff;
 276         rev = (idcode >> 28) & 0xff;
 277
 278         switch (hawkeye) {
 279         case 0xb7ae:
 280                 /* Handle 34xx/35xx devices */
 281                 switch (rev) {
 282                 case 0: /* Take care of early samples */
 283                 case 1:
 284                         omap_revision = OMAP3430_REV_ES2_0;
 285                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 286                         break;
 287                 case 2:
 288                         omap_revision = OMAP3430_REV_ES2_1;
 289                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 290                         break;
 291                 case 3:
 292                         omap_revision = OMAP3430_REV_ES3_0;
 293                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 294                         break;
 295                 case 4:
 296                         omap_revision = OMAP3430_REV_ES3_1;
 297                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 298                         break;
 299                 case 7:
 300                 /* FALLTHROUGH */
 301                 default:
 302                         /* Use the latest known revision as default */
 303                         omap_revision = OMAP3430_REV_ES3_1_2;
 304
 305                         /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
 306                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 307                 }
 308                 break;
 309         case 0xb868:
 310                 /* Handle OMAP35xx/AM35xx devices
 311                  *
 312                  * Set the device to be OMAP3505 here. Actual device
 313                  * is identified later based on the features.
 314                  *
 315                  * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 316                  */
 317                 omap_revision = OMAP3505_REV(rev);
 318                 omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 319                 break;
 320         case 0xb891:
 321                 /* Handle 36xx devices */
 322                 omap_chip.oc |= CHIP_IS_OMAP3630ES1;
 323
 324                 switch(rev) {
 325                 case 0: /* Take care of early samples */
 326                         omap_revision = OMAP3630_REV_ES1_0;
 327                         break;
 328                 case 1:
 329                         omap_revision = OMAP3630_REV_ES1_1;
 330                         omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
 331                         break;
 332                 case 2:
 333                 default:
 334                         omap_revision =  OMAP3630_REV_ES1_2;
 335                         omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
 336                 }
 337                 break;
 338         case 0xb81e:
 339                 omap_chip.oc = CHIP_IS_TI816X;
 340
 341                 switch (rev) {
 342                 case 0:
 343                         omap_revision = TI8168_REV_ES1_0;
 344                         break;
 345                 case 1:
 346                         omap_revision = TI8168_REV_ES1_1;
 347                         break;
 348                 default:
 349                         omap_revision =  TI8168_REV_ES1_1;
 350                 }
 351                 break;
 352         default:
 353                 /* Unknown default to latest silicon rev as default*/
 354                 omap_revision =  OMAP3630_REV_ES1_2;
 355                 omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
 356         }
 357 }
 358
 359 static void __init omap4_check_revision(void)
 360 {
 361         u32 idcode;
 362         u16 hawkeye;
 363         u8 rev;
 364
 365         /*
 366          * The IC rev detection is done with hawkeye and rev.
 367          * Note that rev does not map directly to defined processor
 368          * revision numbers as ES1.0 uses value 0.
 369          */
 370         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 371         hawkeye = (idcode >> 12) & 0xffff;
 372         rev = (idcode >> 28) & 0xf;
 373
 374         /*
 375          * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
 376          * Use ARM register to detect the correct ES version
 377          */
 378         if (!rev && (hawkeye != 0xb94e)) {
 379                 idcode = read_cpuid(CPUID_ID);
 380                 rev = (idcode & 0xf) - 1;
 381         }
 382
 383         switch (hawkeye) {
 384         case 0xb852:
 385                 switch (rev) {
 386                 case 0:
 387                         omap_revision = OMAP4430_REV_ES1_0;
 388                         omap_chip.oc |= CHIP_IS_OMAP4430ES1;
 389                         break;
 390                 case 1:
 391                 default:
 392                         omap_revision = OMAP4430_REV_ES2_0;
 393                         omap_chip.oc |= CHIP_IS_OMAP4430ES2;
 394                 }
 395                 break;
 396         case 0xb95c:
 397                 switch (rev) {
 398                 case 3:
 399                         omap_revision = OMAP4430_REV_ES2_1;
 400                         omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
 401                         break;
 402                 case 4:
 403                 default:
 404                         omap_revision = OMAP4430_REV_ES2_2;
 405                         omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
 406                 }
 407                 break;
 408         case 0xb94e:
 409                 switch (rev) {
 410                 case 0:
 411                 default:
 412                         omap_revision = OMAP4460_REV_ES1_0;
 413                         omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
 414                         break;
 415                 }
 416                 break;
 417         default:
 418                 /* Unknown default to latest silicon rev as default */
 419                 omap_revision = OMAP4430_REV_ES2_2;
 420                 omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
 421         }
 422
 423         pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
 424                 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));
 425 }
 426
 427 #define OMAP3_SHOW_FEATURE(feat)                \
 428         if (omap3_has_ ##feat())                \
 429                 printk(#feat" ");
 430
 431 static void __init omap3_cpuinfo(void)
 432 {
 433         u8 rev = GET_OMAP_REVISION();
 434         char cpu_name[16], cpu_rev[16];
 435
 436         /* OMAP3430 and OMAP3530 are assumed to be same.
 437          *
 438          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 439          * on available features. Upon detection, update the CPU id
 440          * and CPU class bits.
 441          */
 442         if (cpu_is_omap3630()) {
 443                 strcpy(cpu_name, "OMAP3630");
 444         } else if (cpu_is_omap3505()) {
 445                 /*
 446                  * AM35xx devices
 447                  */
 448                 if (omap3_has_sgx()) {
 449                         omap_revision = OMAP3517_REV(rev);
 450                         strcpy(cpu_name, "AM3517");
 451                 } else {
 452                         /* Already set in omap3_check_revision() */
 453                         strcpy(cpu_name, "AM3505");
 454                 }
 455         } else if (cpu_is_ti816x()) {
 456                 strcpy(cpu_name, "TI816X");
 457         } else if (omap3_has_iva() && omap3_has_sgx()) {
 458                 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 459                 strcpy(cpu_name, "OMAP3430/3530");
 460         } else if (omap3_has_iva()) {
 461                 omap_revision = OMAP3525_REV(rev);
 462                 strcpy(cpu_name, "OMAP3525");
 463         } else if (omap3_has_sgx()) {
 464                 omap_revision = OMAP3515_REV(rev);
 465                 strcpy(cpu_name, "OMAP3515");
 466         } else {
 467                 omap_revision = OMAP3503_REV(rev);
 468                 strcpy(cpu_name, "OMAP3503");
 469         }
 470
 471         if (cpu_is_omap3630() || cpu_is_ti816x()) {
 472                 switch (rev) {
 473                 case OMAP_REVBITS_00:
 474                         strcpy(cpu_rev, "1.0");
 475                         break;
 476                 case OMAP_REVBITS_01:
 477                         strcpy(cpu_rev, "1.1");
 478                         break;
 479                 case OMAP_REVBITS_02:
 480                         /* FALLTHROUGH */
 481                 default:
 482                         /* Use the latest known revision as default */
 483                         strcpy(cpu_rev, "1.2");
 484                 }
 485         } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
 486                 switch (rev) {
 487                 case OMAP_REVBITS_00:
 488                         strcpy(cpu_rev, "1.0");
 489                         break;
 490                 case OMAP_REVBITS_01:
 491                         /* FALLTHROUGH */
 492                 default:
 493                         /* Use the latest known revision as default */
 494                         strcpy(cpu_rev, "1.1");
 495                 }
 496         } else {
 497                 switch (rev) {
 498                 case OMAP_REVBITS_00:
 499                         strcpy(cpu_rev, "1.0");
 500                         break;
 501                 case OMAP_REVBITS_01:
 502                         strcpy(cpu_rev, "2.0");
 503                         break;
 504                 case OMAP_REVBITS_02:
 505                         strcpy(cpu_rev, "2.1");
 506                         break;
 507                 case OMAP_REVBITS_03:
 508                         strcpy(cpu_rev, "3.0");
 509                         break;
 510                 case OMAP_REVBITS_04:
 511                         strcpy(cpu_rev, "3.1");
 512                         break;
 513                 case OMAP_REVBITS_05:
 514                         /* FALLTHROUGH */
 515                 default:
 516                         /* Use the latest known revision as default */
 517                         strcpy(cpu_rev, "3.1.2");
 518                 }
 519         }
 520
 521         /* Print verbose information */
 522         pr_info("%s ES%s (", cpu_name, cpu_rev);
 523
 524         OMAP3_SHOW_FEATURE(l2cache);
 525         OMAP3_SHOW_FEATURE(iva);
 526         OMAP3_SHOW_FEATURE(sgx);
 527         OMAP3_SHOW_FEATURE(neon);
 528         OMAP3_SHOW_FEATURE(isp);
 529         OMAP3_SHOW_FEATURE(192mhz_clk);
 530
 531         printk(")\n");
 532 }
 533
 534 /*
 535  * Try to detect the exact revision of the omap we're running on
 536  */
 537 void __init omap2_check_revision(void)
 538 {
 539         /*
 540          * At this point we have an idea about the processor revision set
 541          * earlier with omap2_set_globals_tap().
 542          */
 543         if (cpu_is_omap24xx()) {
 544                 omap24xx_check_revision();
 545         } else if (cpu_is_omap34xx()) {
 546                 omap3_check_revision();
 547
 548                 /* TI816X doesn't have feature register */
 549                 if (!cpu_is_ti816x())
 550                         omap3_check_features();
 551                 else
 552                         ti816x_check_features();
 553
 554                 omap3_cpuinfo();
 555                 return;
 556         } else if (cpu_is_omap44xx()) {
 557                 omap4_check_revision();
 558                 omap4_check_features();
 559                 return;
 560         } else {
 561                 pr_err("OMAP revision unknown, please fix!\n");
 562         }
 563
 564         /*
 565          * OK, now we know the exact revision. Initialize omap_chip bits
 566          * for powerdowmain and clockdomain code.
 567          */
 568         if (cpu_is_omap243x()) {
 569                 /* Currently only supports 2430ES2.1 and 2430-all */
 570                 omap_chip.oc |= CHIP_IS_OMAP2430;
 571                 return;
 572         } else if (cpu_is_omap242x()) {
 573                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 574                 omap_chip.oc |= CHIP_IS_OMAP2420;
 575                 return;
 576         }
 577
 578         pr_err("Uninitialized omap_chip, please fix!\n");
 579 }
 580
 581 /*
 582  * Set up things for map_io and processor detection later on. Gets called
 583  * pretty much first thing from board init. For multi-omap, this gets
 584  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 585  * detect the exact revision later on in omap2_detect_revision() once map_io
 586  * is done.
 587  */
 588 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 589 {
 590         omap_revision = omap2_globals->class;
 591         tap_base = omap2_globals->tap;
 592
 593         if (cpu_is_omap34xx())
 594                 tap_prod_id = 0x0210;
 595         else
 596                 tap_prod_id = 0x0208;
 597 }